usb_hcd_int.h
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1 
28 /* Define to prevent recursive inclusion -------------------------------------*/
29 #ifndef __HCD_INT_H__
30 #define __HCD_INT_H__
31 
32 /* Includes ------------------------------------------------------------------*/
33 #include "usb_hcd.h"
34 
35 
58 typedef struct _USBH_HCD_INT
59 {
60  uint8_t (* SOF) (USB_OTG_CORE_HANDLE *pdev);
61  uint8_t (* DevConnected) (USB_OTG_CORE_HANDLE *pdev);
62  uint8_t (* DevDisconnected) (USB_OTG_CORE_HANDLE *pdev);
63  uint8_t (* DevPortEnabled) (USB_OTG_CORE_HANDLE *pdev);
64  uint8_t (* DevPortDisabled) (USB_OTG_CORE_HANDLE *pdev);
65 
67 
78 #define CLEAR_HC_INT(HC_REGS, intr) \
79  {\
80  USB_OTG_HCINTn_TypeDef hcint_clear; \
81  hcint_clear.d32 = 0; \
82  hcint_clear.b.intr = 1; \
83  USB_OTG_WRITE_REG32(&((HC_REGS)->HCINT), hcint_clear.d32);\
84  }\
85 
86 #define MASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
87  INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
88  INTMSK.b.chhltd = 0; \
89  USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
90 
91 #define UNMASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
92  INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
93  INTMSK.b.chhltd = 1; \
94  USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
95 
96 #define MASK_HOST_INT_ACK(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
97  INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
98  INTMSK.b.ack = 0; \
99  USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, GINTMSK.d32);}
100 
101 #define UNMASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef INTMSK; \
102  INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
103  INTMSK.b.ack = 1; \
104  USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
105 
120 /* Callbacks handler */
125 
132 #endif //__HCD_INT_H__
133 
134 
142 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
143 
Host layer Header file.
USBH_HCD_INT_cb_TypeDef * USBH_HCD_INT_fops
uint8_t(* DevPortEnabled)(USB_OTG_CORE_HANDLE *pdev)
Definition: usb_hcd_int.h:63
uint8_t(* SOF)(USB_OTG_CORE_HANDLE *pdev)
Definition: usb_hcd_int.h:60
void Disconnect_Callback_Handler(USB_OTG_CORE_HANDLE *pdev)
struct _USBH_HCD_INT USBH_HCD_INT_cb_TypeDef
uint8_t(* DevDisconnected)(USB_OTG_CORE_HANDLE *pdev)
Definition: usb_hcd_int.h:62
void ConnectCallback_Handler(USB_OTG_CORE_HANDLE *pdev)
uint8_t(* DevConnected)(USB_OTG_CORE_HANDLE *pdev)
Definition: usb_hcd_int.h:61
uint8_t(* DevPortDisabled)(USB_OTG_CORE_HANDLE *pdev)
Definition: usb_hcd_int.h:64
uint32_t USBH_OTG_ISR_Handler(USB_OTG_CORE_HANDLE *pdev)
HOST_Handle_ISR This function handles all USB Host Interrupts.
Definition: usb_hcd_int.c:118
void Overcurrent_Callback_Handler(USB_OTG_CORE_HANDLE *pdev)


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:20