Macros
Collaboration diagram for SYSCFG_DMA_Remap_Config:

Macros

#define IS_SYSCFG_DMA_REMAP(REMAP)
 
#define SYSCFG_DMARemap_ADC2ADC4   SYSCFG_CFGR1_ADC24_DMA_RMP
 
#define SYSCFG_DMARemap_DAC2Ch1   SYSCFG_CFGR1_DAC2Ch1_DMA_RMP /* Remap DAC2 Ch1 DMA requests */
 
#define SYSCFG_DMARemap_TIM16   SYSCFG_CFGR1_TIM16_DMA_RMP
 
#define SYSCFG_DMARemap_TIM17   SYSCFG_CFGR1_TIM17_DMA_RMP
 
#define SYSCFG_DMARemap_TIM6DAC1   SYSCFG_DMARemap_TIM6DAC1Ch1
 
#define SYSCFG_DMARemap_TIM6DAC1Ch1   SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP /* Remap TIM6/DAC1 Ch1 DMA requests */
 
#define SYSCFG_DMARemap_TIM7DAC1Ch2   SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP /* Remap TIM7/DAC1 Ch2 DMA requests */
 
#define SYSCFG_DMARemap_TIM7DAC2   SYSCFG_DMARemap_TIM7DAC1Ch2
 
#define SYSCFG_DMARemapCh2_ADC2   ((uint32_t)0x80000200) /* Remap ADC2 DMA1 Ch2 requests */
 
#define SYSCFG_DMARemapCh2_I2C1_TX   ((uint32_t)0x80000040) /* Remap I2C1 TX DMA CH2 requests */
 
#define SYSCFG_DMARemapCh2_SPI1_RX   ((uint32_t)0x80000003) /* Remap SPI1 RX DMA CH2 requests */
 
#define SYSCFG_DMARemapCh3_I2C1_RX   ((uint32_t)0x80000010) /* Remap I2C1 RX DMA CH3 requests */
 
#define SYSCFG_DMARemapCh3_SPI1_TX   ((uint32_t)0x8000000C) /* Remap SPI1 TX DMA CH2 requests */
 
#define SYSCFG_DMARemapCh4_ADC2   ((uint32_t)0x80000300) /* Remap ADC2 DMA1 Ch4 requests */
 
#define SYSCFG_DMARemapCh4_I2C1_TX   ((uint32_t)0x80000080) /* Remap I2C1 TX DMA CH4 requests */
 
#define SYSCFG_DMARemapCh4_SPI1_RX   ((uint32_t)0x80000001) /* Remap SPI1 RX DMA CH4 requests */
 
#define SYSCFG_DMARemapCh5_I2C1_RX   ((uint32_t)0x80000020) /* Remap I2C1 RX DMA CH5 requests */
 
#define SYSCFG_DMARemapCh5_SPI1_TX   ((uint32_t)0x80000004) /* Remap SPI1 TX DMA CH5 requests */
 
#define SYSCFG_DMARemapCh6_I2C1_TX   ((uint32_t)0x800000C0) /* Remap I2C1 TX DMA CH6 requests */
 
#define SYSCFG_DMARemapCh6_SPI1_RX   ((uint32_t)0x80000002) /* Remap SPI1 RX DMA CH6 requests */
 
#define SYSCFG_DMARemapCh7_I2C1_RX   ((uint32_t)0x80000030) /* Remap I2C1 RX DMA CH7 requests */
 
#define SYSCFG_DMARemapCh7_SPI1_TX   ((uint32_t)0x80000008) /* Remap SPI1 TX DMA CH7 requests */
 

Detailed Description

Macro Definition Documentation

#define IS_SYSCFG_DMA_REMAP (   REMAP)
Value:
(((REMAP) == SYSCFG_DMARemap_TIM17) || \
((REMAP) == SYSCFG_DMARemap_TIM16) || \
((REMAP) == SYSCFG_DMARemap_ADC2ADC4) || \
((REMAP) == SYSCFG_DMARemap_TIM6DAC1Ch1) || \
((REMAP) == SYSCFG_DMARemap_TIM7DAC1Ch2) || \
((REMAP) == SYSCFG_DMARemap_DAC2Ch1) || \
((REMAP) == SYSCFG_DMARemapCh2_SPI1_RX) || \
((REMAP) == SYSCFG_DMARemapCh4_SPI1_RX) || \
((REMAP) == SYSCFG_DMARemapCh6_SPI1_RX) || \
((REMAP) == SYSCFG_DMARemapCh5_SPI1_TX) || \
((REMAP) == SYSCFG_DMARemapCh5_SPI1_TX) || \
((REMAP) == SYSCFG_DMARemapCh7_SPI1_TX) || \
((REMAP) == SYSCFG_DMARemapCh7_I2C1_RX) || \
((REMAP) == SYSCFG_DMARemapCh3_I2C1_RX) || \
((REMAP) == SYSCFG_DMARemapCh5_I2C1_RX) || \
((REMAP) == SYSCFG_DMARemapCh6_I2C1_TX) || \
((REMAP) == SYSCFG_DMARemapCh2_I2C1_TX) || \
((REMAP) == SYSCFG_DMARemapCh4_I2C1_TX) || \
((REMAP) == SYSCFG_DMARemapCh4_ADC2) || \
#define SYSCFG_DMARemapCh4_SPI1_RX
#define SYSCFG_DMARemapCh7_I2C1_RX
#define SYSCFG_DMARemapCh5_I2C1_RX
#define SYSCFG_DMARemapCh4_ADC2
#define SYSCFG_DMARemapCh2_ADC2
#define SYSCFG_DMARemapCh5_SPI1_TX
#define SYSCFG_DMARemap_TIM7DAC1Ch2
#define SYSCFG_DMARemapCh7_SPI1_TX
#define SYSCFG_DMARemapCh2_I2C1_TX
#define SYSCFG_DMARemapCh6_SPI1_RX
#define SYSCFG_DMARemap_DAC2Ch1
#define SYSCFG_DMARemap_TIM16
#define SYSCFG_DMARemapCh2_SPI1_RX
#define SYSCFG_DMARemapCh6_I2C1_TX
#define SYSCFG_DMARemapCh3_I2C1_RX
#define SYSCFG_DMARemapCh4_I2C1_TX
#define SYSCFG_DMARemap_TIM17
#define SYSCFG_DMARemap_TIM6DAC1Ch1
#define SYSCFG_DMARemap_ADC2ADC4

Definition at line 165 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemap_ADC2ADC4   SYSCFG_CFGR1_ADC24_DMA_RMP

Remap ADC2 and ADC4 DMA requests

Definition at line 136 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemap_DAC2Ch1   SYSCFG_CFGR1_DAC2Ch1_DMA_RMP /* Remap DAC2 Ch1 DMA requests */

Definition at line 140 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemap_TIM16   SYSCFG_CFGR1_TIM16_DMA_RMP

Remap TIM16 DMA requests from channel3 to channel4

Definition at line 135 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemap_TIM17   SYSCFG_CFGR1_TIM17_DMA_RMP

Remap TIM17 DMA requests from channel1 to channel2

Definition at line 134 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemap_TIM6DAC1   SYSCFG_DMARemap_TIM6DAC1Ch1

Remap TIM6/DAC1 DMA requests

Definition at line 162 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemap_TIM6DAC1Ch1   SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP /* Remap TIM6/DAC1 Ch1 DMA requests */

Definition at line 138 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemap_TIM7DAC1Ch2   SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP /* Remap TIM7/DAC1 Ch2 DMA requests */

Definition at line 139 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemap_TIM7DAC2   SYSCFG_DMARemap_TIM7DAC1Ch2

Remap TIM7/DAC2 DMA requests

Definition at line 163 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh2_ADC2   ((uint32_t)0x80000200) /* Remap ADC2 DMA1 Ch2 requests */

Definition at line 159 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh2_I2C1_TX   ((uint32_t)0x80000040) /* Remap I2C1 TX DMA CH2 requests */

Definition at line 155 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh2_SPI1_RX   ((uint32_t)0x80000003) /* Remap SPI1 RX DMA CH2 requests */

Definition at line 142 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh3_I2C1_RX   ((uint32_t)0x80000010) /* Remap I2C1 RX DMA CH3 requests */

Definition at line 151 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh3_SPI1_TX   ((uint32_t)0x8000000C) /* Remap SPI1 TX DMA CH2 requests */

Definition at line 146 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh4_ADC2   ((uint32_t)0x80000300) /* Remap ADC2 DMA1 Ch4 requests */

Definition at line 158 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh4_I2C1_TX   ((uint32_t)0x80000080) /* Remap I2C1 TX DMA CH4 requests */

Definition at line 156 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh4_SPI1_RX   ((uint32_t)0x80000001) /* Remap SPI1 RX DMA CH4 requests */

Definition at line 143 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh5_I2C1_RX   ((uint32_t)0x80000020) /* Remap I2C1 RX DMA CH5 requests */

Definition at line 152 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh5_SPI1_TX   ((uint32_t)0x80000004) /* Remap SPI1 TX DMA CH5 requests */

Definition at line 147 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh6_I2C1_TX   ((uint32_t)0x800000C0) /* Remap I2C1 TX DMA CH6 requests */

Definition at line 154 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh6_SPI1_RX   ((uint32_t)0x80000002) /* Remap SPI1 RX DMA CH6 requests */

Definition at line 144 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh7_I2C1_RX   ((uint32_t)0x80000030) /* Remap I2C1 RX DMA CH7 requests */

Definition at line 150 of file stm32f30x_syscfg.h.

#define SYSCFG_DMARemapCh7_SPI1_TX   ((uint32_t)0x80000008) /* Remap SPI1 TX DMA CH7 requests */

Definition at line 148 of file stm32f30x_syscfg.h.



rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Fri Jul 24 2020 03:20:14