Macros | Typedefs | Enumerations
Configuration_section_for_CMSIS
Collaboration diagram for Configuration_section_for_CMSIS:

Macros

#define __CM4_REV   0x0001
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __FPU_PRESENT   1
 
#define __MPU_PRESENT   0
 Configuration of the Cortex-M3 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1
 
#define __NVIC_PRIO_BITS   4
 
#define __NVIC_PRIO_BITS   4
 
#define __Vendor_SysTickConfig   0
 
#define __Vendor_SysTickConfig   0
 

Typedefs

typedef enum IRQn IRQn_Type
 STM32F10x Interrupt Number Definition, according to the selected device in Library_configuration_section. More...
 
typedef enum IRQn IRQn_Type
 STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_section. More...
 

Enumerations

enum  IRQn {
  NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10,
  SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1,
  WWDG_IRQn = 0, PVD_IRQn = 1, TAMP_STAMP_IRQn = 2, RTC_WKUP_IRQn = 3,
  FLASH_IRQn = 4, RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7,
  EXTI2_IRQn = 8, EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Stream0_IRQn = 11,
  DMA1_Stream1_IRQn = 12, DMA1_Stream2_IRQn = 13, DMA1_Stream3_IRQn = 14, DMA1_Stream4_IRQn = 15,
  DMA1_Stream5_IRQn = 16, DMA1_Stream6_IRQn = 17, ADC_IRQn = 18, NonMaskableInt_IRQn = -14,
  MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5,
  DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WWDG_IRQn = 0,
  PVD_IRQn = 1, TAMPER_IRQn = 2, RTC_IRQn = 3, FLASH_IRQn = 4,
  RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7, EXTI2_IRQn = 8,
  EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Channel1_IRQn = 11, DMA1_Channel2_IRQn = 12,
  DMA1_Channel3_IRQn = 13, DMA1_Channel4_IRQn = 14, DMA1_Channel5_IRQn = 15, DMA1_Channel6_IRQn = 16,
  DMA1_Channel7_IRQn = 17
}
 STM32F10x Interrupt Number Definition, according to the selected device in Library_configuration_section. More...
 
enum  IRQn {
  NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10,
  SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1,
  WWDG_IRQn = 0, PVD_IRQn = 1, TAMP_STAMP_IRQn = 2, RTC_WKUP_IRQn = 3,
  FLASH_IRQn = 4, RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7,
  EXTI2_IRQn = 8, EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Stream0_IRQn = 11,
  DMA1_Stream1_IRQn = 12, DMA1_Stream2_IRQn = 13, DMA1_Stream3_IRQn = 14, DMA1_Stream4_IRQn = 15,
  DMA1_Stream5_IRQn = 16, DMA1_Stream6_IRQn = 17, ADC_IRQn = 18, NonMaskableInt_IRQn = -14,
  MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5,
  DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WWDG_IRQn = 0,
  PVD_IRQn = 1, TAMPER_IRQn = 2, RTC_IRQn = 3, FLASH_IRQn = 4,
  RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7, EXTI2_IRQn = 8,
  EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Channel1_IRQn = 11, DMA1_Channel2_IRQn = 12,
  DMA1_Channel3_IRQn = 13, DMA1_Channel4_IRQn = 14, DMA1_Channel5_IRQn = 15, DMA1_Channel6_IRQn = 16,
  DMA1_Channel7_IRQn = 17
}
 STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_section. More...
 

Detailed Description

Macro Definition Documentation

#define __CM4_REV   0x0001

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

Definition at line 176 of file stm32f4xx.h.

#define __FPU_PRESENT   1

FPU present

Definition at line 180 of file stm32f4xx.h.

#define __MPU_PRESENT   0

Configuration of the Cortex-M3 Processor and Core Peripherals.

Other STM32 devices does not provide an MPU

Definition at line 158 of file stm32f10x.h.

#define __MPU_PRESENT   1

STM32F4XX provides an MPU

Definition at line 177 of file stm32f4xx.h.

#define __NVIC_PRIO_BITS   4

STM32 uses 4 Bits for the Priority Levels

Definition at line 160 of file stm32f10x.h.

#define __NVIC_PRIO_BITS   4

STM32F4XX uses 4 Bits for the Priority Levels

Definition at line 178 of file stm32f4xx.h.

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 161 of file stm32f10x.h.

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 179 of file stm32f4xx.h.

Typedef Documentation

typedef enum IRQn IRQn_Type

STM32F10x Interrupt Number Definition, according to the selected device in Library_configuration_section.

typedef enum IRQn IRQn_Type

STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_section.

Enumeration Type Documentation

enum IRQn

STM32F10x Interrupt Number Definition, according to the selected device in Library_configuration_section.

Enumerator
NonMaskableInt_IRQn 

2 Non Maskable Interrupt

MemoryManagement_IRQn 

4 Cortex-M4 Memory Management Interrupt

BusFault_IRQn 

5 Cortex-M4 Bus Fault Interrupt

UsageFault_IRQn 

6 Cortex-M4 Usage Fault Interrupt

SVCall_IRQn 

11 Cortex-M4 SV Call Interrupt

DebugMonitor_IRQn 

12 Cortex-M4 Debug Monitor Interrupt

PendSV_IRQn 

14 Cortex-M4 Pend SV Interrupt

SysTick_IRQn 

15 Cortex-M4 System Tick Interrupt

WWDG_IRQn 

Window WatchDog Interrupt

PVD_IRQn 

PVD through EXTI Line detection Interrupt

TAMP_STAMP_IRQn 

Tamper and TimeStamp interrupts through the EXTI line

RTC_WKUP_IRQn 

RTC Wakeup interrupt through the EXTI line

FLASH_IRQn 

FLASH global Interrupt

RCC_IRQn 

RCC global Interrupt

EXTI0_IRQn 

EXTI Line0 Interrupt

EXTI1_IRQn 

EXTI Line1 Interrupt

EXTI2_IRQn 

EXTI Line2 Interrupt

EXTI3_IRQn 

EXTI Line3 Interrupt

EXTI4_IRQn 

EXTI Line4 Interrupt

DMA1_Stream0_IRQn 

DMA1 Stream 0 global Interrupt

DMA1_Stream1_IRQn 

DMA1 Stream 1 global Interrupt

DMA1_Stream2_IRQn 

DMA1 Stream 2 global Interrupt

DMA1_Stream3_IRQn 

DMA1 Stream 3 global Interrupt

DMA1_Stream4_IRQn 

DMA1 Stream 4 global Interrupt

DMA1_Stream5_IRQn 

DMA1 Stream 5 global Interrupt

DMA1_Stream6_IRQn 

DMA1 Stream 6 global Interrupt

ADC_IRQn 

ADC1, ADC2 and ADC3 global Interrupts

NonMaskableInt_IRQn 

2 Non Maskable Interrupt

MemoryManagement_IRQn 

4 Cortex-M3 Memory Management Interrupt

BusFault_IRQn 

5 Cortex-M3 Bus Fault Interrupt

UsageFault_IRQn 

6 Cortex-M3 Usage Fault Interrupt

SVCall_IRQn 

11 Cortex-M3 SV Call Interrupt

DebugMonitor_IRQn 

12 Cortex-M3 Debug Monitor Interrupt

PendSV_IRQn 

14 Cortex-M3 Pend SV Interrupt

SysTick_IRQn 

15 Cortex-M3 System Tick Interrupt

WWDG_IRQn 

Window WatchDog Interrupt

PVD_IRQn 

PVD through EXTI Line detection Interrupt

TAMPER_IRQn 

Tamper Interrupt

RTC_IRQn 

RTC global Interrupt

FLASH_IRQn 

FLASH global Interrupt

RCC_IRQn 

RCC global Interrupt

EXTI0_IRQn 

EXTI Line0 Interrupt

EXTI1_IRQn 

EXTI Line1 Interrupt

EXTI2_IRQn 

EXTI Line2 Interrupt

EXTI3_IRQn 

EXTI Line3 Interrupt

EXTI4_IRQn 

EXTI Line4 Interrupt

DMA1_Channel1_IRQn 

DMA1 Channel 1 global Interrupt

DMA1_Channel2_IRQn 

DMA1 Channel 2 global Interrupt

DMA1_Channel3_IRQn 

DMA1 Channel 3 global Interrupt

DMA1_Channel4_IRQn 

DMA1 Channel 4 global Interrupt

DMA1_Channel5_IRQn 

DMA1 Channel 5 global Interrupt

DMA1_Channel6_IRQn 

DMA1 Channel 6 global Interrupt

DMA1_Channel7_IRQn 

DMA1 Channel 7 global Interrupt

Definition at line 167 of file stm32f10x.h.

enum IRQn

STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_section.

Enumerator
NonMaskableInt_IRQn 

2 Non Maskable Interrupt

MemoryManagement_IRQn 

4 Cortex-M4 Memory Management Interrupt

BusFault_IRQn 

5 Cortex-M4 Bus Fault Interrupt

UsageFault_IRQn 

6 Cortex-M4 Usage Fault Interrupt

SVCall_IRQn 

11 Cortex-M4 SV Call Interrupt

DebugMonitor_IRQn 

12 Cortex-M4 Debug Monitor Interrupt

PendSV_IRQn 

14 Cortex-M4 Pend SV Interrupt

SysTick_IRQn 

15 Cortex-M4 System Tick Interrupt

WWDG_IRQn 

Window WatchDog Interrupt

PVD_IRQn 

PVD through EXTI Line detection Interrupt

TAMP_STAMP_IRQn 

Tamper and TimeStamp interrupts through the EXTI line

RTC_WKUP_IRQn 

RTC Wakeup interrupt through the EXTI line

FLASH_IRQn 

FLASH global Interrupt

RCC_IRQn 

RCC global Interrupt

EXTI0_IRQn 

EXTI Line0 Interrupt

EXTI1_IRQn 

EXTI Line1 Interrupt

EXTI2_IRQn 

EXTI Line2 Interrupt

EXTI3_IRQn 

EXTI Line3 Interrupt

EXTI4_IRQn 

EXTI Line4 Interrupt

DMA1_Stream0_IRQn 

DMA1 Stream 0 global Interrupt

DMA1_Stream1_IRQn 

DMA1 Stream 1 global Interrupt

DMA1_Stream2_IRQn 

DMA1 Stream 2 global Interrupt

DMA1_Stream3_IRQn 

DMA1 Stream 3 global Interrupt

DMA1_Stream4_IRQn 

DMA1 Stream 4 global Interrupt

DMA1_Stream5_IRQn 

DMA1 Stream 5 global Interrupt

DMA1_Stream6_IRQn 

DMA1 Stream 6 global Interrupt

ADC_IRQn 

ADC1, ADC2 and ADC3 global Interrupts

NonMaskableInt_IRQn 

2 Non Maskable Interrupt

MemoryManagement_IRQn 

4 Cortex-M3 Memory Management Interrupt

BusFault_IRQn 

5 Cortex-M3 Bus Fault Interrupt

UsageFault_IRQn 

6 Cortex-M3 Usage Fault Interrupt

SVCall_IRQn 

11 Cortex-M3 SV Call Interrupt

DebugMonitor_IRQn 

12 Cortex-M3 Debug Monitor Interrupt

PendSV_IRQn 

14 Cortex-M3 Pend SV Interrupt

SysTick_IRQn 

15 Cortex-M3 System Tick Interrupt

WWDG_IRQn 

Window WatchDog Interrupt

PVD_IRQn 

PVD through EXTI Line detection Interrupt

TAMPER_IRQn 

Tamper Interrupt

RTC_IRQn 

RTC global Interrupt

FLASH_IRQn 

FLASH global Interrupt

RCC_IRQn 

RCC global Interrupt

EXTI0_IRQn 

EXTI Line0 Interrupt

EXTI1_IRQn 

EXTI Line1 Interrupt

EXTI2_IRQn 

EXTI Line2 Interrupt

EXTI3_IRQn 

EXTI Line3 Interrupt

EXTI4_IRQn 

EXTI Line4 Interrupt

DMA1_Channel1_IRQn 

DMA1 Channel 1 global Interrupt

DMA1_Channel2_IRQn 

DMA1 Channel 2 global Interrupt

DMA1_Channel3_IRQn 

DMA1 Channel 3 global Interrupt

DMA1_Channel4_IRQn 

DMA1 Channel 4 global Interrupt

DMA1_Channel5_IRQn 

DMA1 Channel 5 global Interrupt

DMA1_Channel6_IRQn 

DMA1 Channel 6 global Interrupt

DMA1_Channel7_IRQn 

DMA1 Channel 7 global Interrupt

Definition at line 186 of file stm32f4xx.h.



rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:23