gpio_11xx_2.h

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/*
 * @brief LPC11xx GPIO driver for CHIP_LPC11CXX, CHIP_LPC110X, CHIP_LPC11XXLV,
 * and CHIP_LPC1125 families only.
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2013
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */
 
#ifndef __GPIO_11XX_2_H_
#define __GPIO_11XX_2_H_
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined(CHIP_LPC11CXX) || defined(CHIP_LPC110X) || defined(CHIP_LPC11XXLV) || defined(CHIP_LPC1125)
 
typedef struct {                                
        __IO uint32_t DATA[4096];                       
        uint32_t RESERVED1[4096];
        __IO uint32_t DIR;                                      
        __IO uint32_t IS;                                       
        __IO uint32_t IBE;                                      
        __IO uint32_t IEV;                                      
        __IO uint32_t IE;                                       
        __I  uint32_t RIS;                                      
        __I  uint32_t MIS;                                      
        __O  uint32_t IC;                                       
        uint32_t RESERVED2[8184];                       /* Padding added for aligning contiguous GPIO blocks */
} LPC_GPIO_T;
 
void Chip_GPIO_Init(LPC_GPIO_T *pGPIO);
 
void Chip_GPIO_DeInit(LPC_GPIO_T *pGPIO);
 
STATIC INLINE void Chip_GPIO_WritePortBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit, bool setting)
{
        pGPIO[port].DATA[1 << bit] = setting << bit;
}
 
STATIC INLINE void Chip_GPIO_SetPinState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool setting)
{
        pGPIO[port].DATA[1 << pin] = setting << pin;
}
 
STATIC INLINE bool Chip_GPIO_ReadPortBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit)
{
        return (bool) ((pGPIO[port].DATA[1 << bit] >> bit) & 1);
}
 
STATIC INLINE bool Chip_GPIO_GetPinState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
{
        return (pGPIO[port].DATA[1 << pin]) != 0;
}
 
void Chip_GPIO_WriteDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit, bool setting);
 
STATIC INLINE void Chip_GPIO_SetPinDIROutput(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
{
        pGPIO[port].DIR |= (1UL << pin);
}
 
STATIC INLINE void Chip_GPIO_SetPinDIRInput(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
{
        pGPIO[port].DIR &= ~(1UL << pin);
}
 
void Chip_GPIO_SetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool output);
 
STATIC INLINE bool Chip_GPIO_ReadDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit)
{
        return (bool) (((pGPIO[port].DIR) >> bit) & 1);
}
 
STATIC INLINE bool Chip_GPIO_GetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
{
        return (bool) (pGPIO[port].DIR >> pin) & 1;
}
 
void Chip_GPIO_SetDir(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t bit, uint8_t out);
 
STATIC INLINE void Chip_GPIO_SetPortDIROutput(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
{
        pGPIO[port].DIR |= pinMask;
}
 
STATIC INLINE void Chip_GPIO_SetPortDIRInput(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
{
        pGPIO[port].DIR &= ~pinMask;
}
 
void Chip_GPIO_SetPortDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask, bool outSet);
 
STATIC INLINE uint32_t Chip_GPIO_GetPortDIR(LPC_GPIO_T *pGPIO, uint8_t port)
{
        return pGPIO[port].DIR;
}
 
STATIC INLINE void Chip_GPIO_SetPortValue(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t value)
{
        pGPIO[port].DATA[0xFFF] = value;
}
 
STATIC INLINE uint32_t Chip_GPIO_GetPortValue(LPC_GPIO_T *pGPIO, uint8_t port)
{
        return pGPIO[port].DATA[0xFFF];
}
 
STATIC INLINE void Chip_GPIO_SetValue(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t bit)
{
        pGPIO[port].DATA[bit] = bit;
}
 
STATIC INLINE void Chip_GPIO_SetPortOutHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
{
        pGPIO[port].DATA[pins] = 0xFFF;
}
 
STATIC INLINE void Chip_GPIO_SetPinOutHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
{
        pGPIO[port].DATA[1 << pin] = (1 << pin);
}
 
STATIC INLINE void Chip_GPIO_ClearValue(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t bit)
{
        pGPIO[port].DATA[bit] = ~bit;
}
 
STATIC INLINE void Chip_GPIO_SetPortOutLow(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
{
        pGPIO[port].DATA[pins] = 0;
}
 
STATIC INLINE void Chip_GPIO_SetPinOutLow(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
{
        pGPIO[port].DATA[1 << pin] = 0;
}
 
STATIC INLINE void Chip_GPIO_SetPortToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
{
        pGPIO[port].DATA[pins] ^= 0xFFF;
}
 
STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
{
        pGPIO[port].DATA[1 << pin] ^= (1 << pin);
}
 
STATIC INLINE uint32_t Chip_GPIO_ReadValue(LPC_GPIO_T *pGPIO, uint8_t port)
{
        return pGPIO[port].DATA[4095];
}
 
STATIC INLINE void Chip_GPIO_SetPinModeEdge(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IS &= ~pinmask;
}
 
STATIC INLINE void Chip_GPIO_SetPinModeLevel(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IS |= pinmask;
}
 
STATIC INLINE uint32_t Chip_GPIO_IsLevelEnabled(LPC_GPIO_T *pGPIO, uint8_t port)
{
    return pGPIO[port].IS;
}
 
STATIC INLINE void Chip_GPIO_SetEdgeModeBoth(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IBE |= pinmask;
}
 
STATIC INLINE void Chip_GPIO_SetEdgeModeSingle(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IBE &= ~pinmask;
}
 
STATIC INLINE uint32_t Chip_GPIO_GetEdgeModeDir(LPC_GPIO_T *pGPIO, uint8_t port)
{
    return pGPIO[port].IBE;
}
 
STATIC INLINE void Chip_GPIO_SetModeHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IEV |= pinmask;
}
 
STATIC INLINE void Chip_GPIO_SetModeLow(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IEV &= ~pinmask;
}
 
STATIC INLINE uint32_t Chip_GPIO_GetModeHighLow(LPC_GPIO_T *pGPIO, uint8_t port)
{
    return pGPIO[port].IEV;
}
 
STATIC INLINE void Chip_GPIO_EnableInt(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IE |= pinmask;
}
 
STATIC INLINE void Chip_GPIO_DisableInt(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IE &= ~pinmask;
}
 
STATIC INLINE uint32_t Chip_GPIO_GetEnabledInts(LPC_GPIO_T *pGPIO, uint8_t port)
{
    return pGPIO[port].IE;
}
 
STATIC INLINE uint32_t Chip_GPIO_GetRawInts(LPC_GPIO_T *pGPIO, uint8_t port)
{
    return pGPIO[port].RIS;
}
 
STATIC INLINE uint32_t Chip_GPIO_GetMaskedInts(LPC_GPIO_T *pGPIO, uint8_t port)
{
    return pGPIO[port].MIS;
}
 
STATIC INLINE void Chip_GPIO_ClearInts(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
{
    pGPIO[port].IC = pinmask;
}
 
typedef enum {
        GPIO_INT_ACTIVE_LOW_LEVEL  = 0x0,               
        GPIO_INT_ACTIVE_HIGH_LEVEL = 0x1,               
        GPIO_INT_FALLING_EDGE      = 0x2,               
        GPIO_INT_RISING_EDGE       = 0x3,               
        GPIO_INT_BOTH_EDGES        = 0x6                
} GPIO_INT_MODE_T;
 
void Chip_GPIO_SetupPinInt(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, GPIO_INT_MODE_T mode);
 
#endif /* defined(CHIP_LPC11CXX) || defined(CHIP_LPC110X) || defined(CHIP_LPC11XXLV) || defined(CHIP_LPC1125) */
 
#ifdef __cplusplus
}
#endif
 
#endif /* __GPIO_11XX_2_H_ */