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stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h File Reference

Header file of TIM HAL Extended module. More...

#include "stm32h7xx_hal_def.h"
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Classes

struct  TIM_HallSensor_InitTypeDef
 TIM Hall sensor Configuration Structure definition. More...
 

Macros

#define IS_TIM_BREAKINPUT(__BREAKINPUT__)
 
#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__)
 
#define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__)
 
#define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__)
 
#define IS_TIM_REMAP(__RREMAP__)
 
#define IS_TIM_TISEL(__TISEL__)
 
#define TIM_TIM12_TI1_GPIO   0x00000000U /* !< TIM12 TI1 is connected to GPIO */
 
#define TIM_TIM12_TI1_SPDIF_FS   TIM_TISEL_TI1SEL_0 /* !< TIM12 TI1 is connected to SPDIF FS */
 
#define TIM_TIM15_TI1_GPIO   0x00000000U /* !< TIM15_TI1 is connected to GPIO */
 
#define TIM_TIM15_TI1_RCC_CSI   (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to RCC CSI */
 
#define TIM_TIM15_TI1_RCC_LSE   (TIM_TISEL_TI1SEL_2) /* !< TIM15_TI1 is connected to RCC LSE */
 
#define TIM_TIM15_TI1_RCC_MCO2   (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to RCC MCO2 */
 
#define TIM_TIM15_TI1_TIM2_CH1   TIM_TISEL_TI1SEL_0 /* !< TIM15_TI1 is connected to TIM2 CH1 */
 
#define TIM_TIM15_TI1_TIM3_CH1   TIM_TISEL_TI1SEL_1 /* !< TIM15_TI1 is connected to TIM3 CH1 */
 
#define TIM_TIM15_TI1_TIM4_CH1   (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to TIM4 CH1 */
 
#define TIM_TIM15_TI2_GPIO   0x00000000U /* !< TIM15_TI2 is connected to GPIO */
 
#define TIM_TIM15_TI2_TIM2_CH2   (TIM_TISEL_TI2SEL_0) /* !< TIM15_TI2 is connected to TIM2 CH2 */
 
#define TIM_TIM15_TI2_TIM3_CH2   (TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM3 CH2 */
 
#define TIM_TIM15_TI2_TIM4_CH2   (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM4 CH2 */
 
#define TIM_TIM16_TI1_GPIO   0x00000000U /* !< TIM16 TI1 is connected to GPIO */
 
#define TIM_TIM16_TI1_RCC_LSE   TIM_TISEL_TI1SEL_1 /* !< TIM16 TI1 is connected to RCC LSE */
 
#define TIM_TIM16_TI1_RCC_LSI   TIM_TISEL_TI1SEL_0 /* !< TIM16 TI1 is connected to RCC LSI */
 
#define TIM_TIM16_TI1_WKUP_IT   (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM16 TI1 is connected to WKUP_IT */
 
#define TIM_TIM17_TI1_GPIO   0x00000000U /* !< TIM17 TI1 is connected to GPIO */
 
#define TIM_TIM17_TI1_RCC_HSE1MHZ   TIM_TISEL_TI1SEL_1 /* !< TIM17 TI1 is connected to RCC HSE 1Mhz */
 
#define TIM_TIM17_TI1_RCC_MCO1   (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM17 TI1 is connected to RCC MCO1 */
 
#define TIM_TIM17_TI1_SPDIF_FS   TIM_TISEL_TI1SEL_0 /* !< TIM17 TI1 is connected to SPDIF FS */
 
#define TIM_TIM1_ETR_ADC1_AWD1   (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */
 
#define TIM_TIM1_ETR_ADC1_AWD2   (TIM1_AF1_ETRSEL_2) /* !< TIM1_ETR is connected to ADC1 AWD2 */
 
#define TIM_TIM1_ETR_ADC1_AWD3   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
 
#define TIM_TIM1_ETR_ADC3_AWD1   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< TIM1_ETR is connected to ADC3 AWD1 */
 
#define TIM_TIM1_ETR_ADC3_AWD2   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC3 AWD2 */
 
#define TIM_TIM1_ETR_ADC3_AWD3   TIM1_AF1_ETRSEL_3 /* !< TIM1_ETR is connected to ADC3 AWD3 */
 
#define TIM_TIM1_ETR_COMP1   TIM1_AF1_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 OUT */
 
#define TIM_TIM1_ETR_COMP2   TIM1_AF1_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 OUT */
 
#define TIM_TIM1_ETR_GPIO   0x00000000U /* !< TIM1_ETR is connected to GPIO */
 
#define TIM_TIM1_TI1_COMP1   TIM_TISEL_TI1SEL_0 /* !< TIM1_TI1 is connected to COMP1 OUT */
 
#define TIM_TIM1_TI1_GPIO   0x00000000U /* !< TIM1_TI1 is connected to GPIO */
 
#define TIM_TIM23_ETR_COMP1   (TIM2_AF1_ETRSEL_0) /* !< TIM23_ETR is connected to COMP1 OUT */
 
#define TIM_TIM23_ETR_COMP2   (TIM2_AF1_ETRSEL_1) /* !< TIM23_ETR is connected to COMP2 OUT */
 
#define TIM_TIM23_ETR_GPIO   0x00000000U /* !< TIM23_ETR is connected to GPIO */
 
#define TIM_TIM23_TI4_COMP1   TIM_TISEL_TI4SEL_0 /* !< TIM23_TI4 is connected to COMP1 OUT */
 
#define TIM_TIM23_TI4_COMP1_COMP2   (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM23_TI4 is connected to COMP1 OUT or COMP2 OUT */
 
#define TIM_TIM23_TI4_COMP2   TIM_TISEL_TI4SEL_1 /* !< TIM23_TI4 is connected to COMP2 OUT */
 
#define TIM_TIM23_TI4_GPIO   0x00000000U /* !< TIM23_TI4 is connected to GPIO */
 
#define TIM_TIM24_ETR_GPIO   0x00000000U /* !< TIM24_ETR is connected to GPIO */
 
#define TIM_TIM24_ETR_SAI1_FSA   (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM24_ETR is connected to SAI1 FS_A */
 
#define TIM_TIM24_ETR_SAI1_FSB   TIM2_AF1_ETRSEL_2 /* !< TIM24_ETR is connected to SAI1 FS_B */
 
#define TIM_TIM24_ETR_SAI4_FSA   TIM5_AF1_ETRSEL_0 /* !< TIM24_ETR is connected to SAI4 FS_A */
 
#define TIM_TIM24_ETR_SAI4_FSB   TIM5_AF1_ETRSEL_1 /* !< TIM24_ETR is connected to SAI4 FS_B */
 
#define TIM_TIM24_TI1_CAN_RTP   TIM_TISEL_TI1SEL_1 /* !< TIM24_TI1 is connected to CAN RTP */
 
#define TIM_TIM24_TI1_CAN_SOC   (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM24_TI1 is connected to CAN SOC */
 
#define TIM_TIM24_TI1_CAN_TMP   TIM_TISEL_TI1SEL_0 /* !< TIM24_TI1 is connected to CAN TMP */
 
#define TIM_TIM24_TI1_GPIO   0x00000000U /* !< TIM24_TI1 is connected to GPIO */
 
#define TIM_TIM2_ETR_COMP1   (TIM2_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 OUT */
 
#define TIM_TIM2_ETR_COMP2   (TIM2_AF1_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 OUT */
 
#define TIM_TIM2_ETR_GPIO   0x00000000U /* !< TIM2_ETR is connected to GPIO */
 
#define TIM_TIM2_ETR_RCC_LSE   (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to RCC LSE */
 
#define TIM_TIM2_ETR_SAI1_FSA   TIM2_AF1_ETRSEL_2 /* !< TIM2_ETR is connected to SAI1 FS_A */
 
#define TIM_TIM2_ETR_SAI1_FSB   (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to SAI1 FS_B */
 
#define TIM_TIM2_TI4_COMP1   TIM_TISEL_TI4SEL_0 /* !< TIM2_TI4 is connected to COMP1 OUT */
 
#define TIM_TIM2_TI4_COMP1_COMP2   (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT */
 
#define TIM_TIM2_TI4_COMP2   TIM_TISEL_TI4SEL_1 /* !< TIM2_TI4 is connected to COMP2 OUT */
 
#define TIM_TIM2_TI4_GPIO   0x00000000U /* !< TIM2_TI4 is connected to GPIO */
 
#define TIM_TIM3_ETR_COMP1   TIM3_AF1_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 OUT */
 
#define TIM_TIM3_ETR_GPIO   0x00000000U /* !< TIM3_ETR is connected to GPIO */
 
#define TIM_TIM3_TI1_COMP1   TIM_TISEL_TI1SEL_0 /* !< TIM3_TI1 is connected to COMP1 OUT */
 
#define TIM_TIM3_TI1_COMP1_COMP2   (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM3_TI1 is connected to COMP1 OUT or COMP2 OUT */
 
#define TIM_TIM3_TI1_COMP2   TIM_TISEL_TI1SEL_1 /* !< TIM3_TI1 is connected to COMP2 OUT */
 
#define TIM_TIM3_TI1_GPIO   0x00000000U /* !< TIM3_TI1 is connected to GPIO */
 
#define TIM_TIM5_ETR_GPIO   0x00000000U /* !< TIM5_ETR is connected to GPIO */
 
#define TIM_TIM5_ETR_SAI2_FSA   TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI2 FS_A */
 
#define TIM_TIM5_ETR_SAI2_FSB   TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI2 FS_B */
 
#define TIM_TIM5_ETR_SAI4_FSA   TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI4 FS_A */
 
#define TIM_TIM5_ETR_SAI4_FSB   TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI4 FS_B */
 
#define TIM_TIM5_TI1_CAN_RTP   TIM_TISEL_TI1SEL_1 /* !< TIM5_TI1 is connected to CAN RTP */
 
#define TIM_TIM5_TI1_CAN_TMP   TIM_TISEL_TI1SEL_0 /* !< TIM5_TI1 is connected to CAN TMP */
 
#define TIM_TIM5_TI1_GPIO   0x00000000U /* !< TIM5_TI1 is connected to GPIO */
 
#define TIM_TIM8_ETR_ADC2_AWD1   (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */
 
#define TIM_TIM8_ETR_ADC2_AWD2   (TIM8_AF1_ETRSEL_2) /* !< TIM8_ETR is connected to ADC2 AWD2 */
 
#define TIM_TIM8_ETR_ADC2_AWD3   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
 
#define TIM_TIM8_ETR_ADC3_AWD1   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1) /* !< TIM8_ETR is connected to ADC3 AWD1 */
 
#define TIM_TIM8_ETR_ADC3_AWD2   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC3 AWD2 */
 
#define TIM_TIM8_ETR_ADC3_AWD3   TIM8_AF1_ETRSEL_3 /* !< TIM8_ETR is connected to ADC3 AWD3 */
 
#define TIM_TIM8_ETR_COMP1   TIM8_AF1_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 OUT */
 
#define TIM_TIM8_ETR_COMP2   TIM8_AF1_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 OUT */
 
#define TIM_TIM8_ETR_GPIO   0x00000000U /* !< TIM8_ETR is connected to GPIO */
 
#define TIM_TIM8_TI1_COMP2   TIM_TISEL_TI1SEL_0 /* !< TIM8_TI1 is connected to COMP2 OUT */
 
#define TIM_TIM8_TI1_GPIO   0x00000000U /* !< TIM8_TI1 is connected to GPIO */
 

Functions

void HAL_TIMEx_Break2Callback (TIM_HandleTypeDef *htim)
 
void HAL_TIMEx_BreakCallback (TIM_HandleTypeDef *htim)
 
void HAL_TIMEx_CommutCallback (TIM_HandleTypeDef *htim)
 
void HAL_TIMEx_CommutHalfCpltCallback (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime (TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
 
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState (TIM_HandleTypeDef *htim, uint32_t ChannelN)
 
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5 (TIM_HandleTypeDef *htim, uint32_t Channels)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit (TIM_HandleTypeDef *htim)
 
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init (TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
 
void HAL_TIMEx_HallSensor_MspDeInit (TIM_HandleTypeDef *htim)
 
void HAL_TIMEx_HallSensor_MspInit (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA (TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization (TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_RemapConfig (TIM_HandleTypeDef *htim, uint32_t Remap)
 
HAL_StatusTypeDef HAL_TIMEx_TISelection (TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel)
 
void TIMEx_DMACommutationCplt (DMA_HandleTypeDef *hdma)
 
void TIMEx_DMACommutationHalfCplt (DMA_HandleTypeDef *hdma)
 

Detailed Description

Header file of TIM HAL Extended module.

Author
MCD Application Team
Attention

© Copyright (c) 2017 STMicroelectronics. All rights reserved.

This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause

Definition in file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h.


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autogenerated on Fri Apr 1 2022 02:15:03