stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_CORTEX_H
22 #define STM32H7xx_HAL_CORTEX_H
23 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
30 
38 /* Exported types ------------------------------------------------------------*/
43 #if (__MPU_PRESENT == 1)
44 
48 typedef struct
49 {
50  uint8_t Enable;
52  uint8_t Number;
54  uint32_t BaseAddress;
55  uint8_t Size;
57  uint8_t SubRegionDisable;
59  uint8_t TypeExtField;
61  uint8_t AccessPermission;
63  uint8_t DisableExec;
65  uint8_t IsShareable;
67  uint8_t IsCacheable;
69  uint8_t IsBufferable;
71 }MPU_Region_InitTypeDef;
75 #endif /* __MPU_PRESENT */
76 
81 /* Exported constants --------------------------------------------------------*/
82 
90 #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007)
92 #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006)
94 #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005)
96 #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004)
98 #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003)
107 #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000)
108 #define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004)
109 
114 #if (__MPU_PRESENT == 1)
115 
118 #define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000)
119 #define MPU_HARDFAULT_NMI ((uint32_t)0x00000002)
120 #define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004)
121 #define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006)
122 
129 #define MPU_REGION_ENABLE ((uint8_t)0x01)
130 #define MPU_REGION_DISABLE ((uint8_t)0x00)
131 
138 #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
139 #define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
140 
147 #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
148 #define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
149 
156 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
157 #define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
158 
165 #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
166 #define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
167 
174 #define MPU_TEX_LEVEL0 ((uint8_t)0x00)
175 #define MPU_TEX_LEVEL1 ((uint8_t)0x01)
176 #define MPU_TEX_LEVEL2 ((uint8_t)0x02)
177 
184 #define MPU_REGION_SIZE_32B ((uint8_t)0x04)
185 #define MPU_REGION_SIZE_64B ((uint8_t)0x05)
186 #define MPU_REGION_SIZE_128B ((uint8_t)0x06)
187 #define MPU_REGION_SIZE_256B ((uint8_t)0x07)
188 #define MPU_REGION_SIZE_512B ((uint8_t)0x08)
189 #define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
190 #define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
191 #define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
192 #define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
193 #define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
194 #define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
195 #define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
196 #define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
197 #define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
198 #define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
199 #define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
200 #define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
201 #define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
202 #define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
203 #define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
204 #define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
205 #define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
206 #define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
207 #define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
208 #define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
209 #define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
210 #define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
211 #define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
212 
219 #define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
220 #define MPU_REGION_PRIV_RW ((uint8_t)0x01)
221 #define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
222 #define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
223 #define MPU_REGION_PRIV_RO ((uint8_t)0x05)
224 #define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
225 
232 #define MPU_REGION_NUMBER0 ((uint8_t)0x00)
233 #define MPU_REGION_NUMBER1 ((uint8_t)0x01)
234 #define MPU_REGION_NUMBER2 ((uint8_t)0x02)
235 #define MPU_REGION_NUMBER3 ((uint8_t)0x03)
236 #define MPU_REGION_NUMBER4 ((uint8_t)0x04)
237 #define MPU_REGION_NUMBER5 ((uint8_t)0x05)
238 #define MPU_REGION_NUMBER6 ((uint8_t)0x06)
239 #define MPU_REGION_NUMBER7 ((uint8_t)0x07)
240 #if !defined(CORE_CM4)
241 #define MPU_REGION_NUMBER8 ((uint8_t)0x08)
242 #define MPU_REGION_NUMBER9 ((uint8_t)0x09)
243 #define MPU_REGION_NUMBER10 ((uint8_t)0x0A)
244 #define MPU_REGION_NUMBER11 ((uint8_t)0x0B)
245 #define MPU_REGION_NUMBER12 ((uint8_t)0x0C)
246 #define MPU_REGION_NUMBER13 ((uint8_t)0x0D)
247 #define MPU_REGION_NUMBER14 ((uint8_t)0x0E)
248 #define MPU_REGION_NUMBER15 ((uint8_t)0x0F)
249 #endif /* !defined(CORE_CM4) */
250 
254 #endif /* __MPU_PRESENT */
255 
261 /* Exported Macros -----------------------------------------------------------*/
275 #define CM7_CPUID ((uint32_t)0x00000003)
276 
277 #if defined(DUAL_CORE)
278 #define CM4_CPUID ((uint32_t)0x00000001)
279 #endif /*DUAL_CORE*/
280 
285 /* Exported functions --------------------------------------------------------*/
293 /* Initialization and de-initialization functions *****************************/
294 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
295 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
296 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
297 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
298 void HAL_NVIC_SystemReset(void);
299 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
307 /* Peripheral Control functions ***********************************************/
308 #if (__MPU_PRESENT == 1)
309 void HAL_MPU_Enable(uint32_t MPU_Control);
310 void HAL_MPU_Disable(void);
311 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
312 #endif /* __MPU_PRESENT */
313 uint32_t HAL_NVIC_GetPriorityGrouping(void);
314 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
315 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
316 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
317 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
318 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
319 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
320 void HAL_SYSTICK_IRQHandler(void);
321 void HAL_SYSTICK_Callback(void);
322 uint32_t HAL_GetCurrentCPUID(void);
323 
324 
333 /* Private types -------------------------------------------------------------*/
334 /* Private variables ---------------------------------------------------------*/
335 /* Private constants ---------------------------------------------------------*/
336 /* Private macros ------------------------------------------------------------*/
340 #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
341  ((GROUP) == NVIC_PRIORITYGROUP_1) || \
342  ((GROUP) == NVIC_PRIORITYGROUP_2) || \
343  ((GROUP) == NVIC_PRIORITYGROUP_3) || \
344  ((GROUP) == NVIC_PRIORITYGROUP_4))
345 
346 #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10UL)
347 
348 #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10UL)
349 
350 #define IS_NVIC_DEVICE_IRQ(IRQ) (((int32_t)IRQ) >= 0x00)
351 
352 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
353  ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
354 
355 #if (__MPU_PRESENT == 1)
356 #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
357  ((STATE) == MPU_REGION_DISABLE))
358 
359 #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
360  ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
361 
362 #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
363  ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
364 
365 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
366  ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
367 
368 #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
369  ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
370 
371 #define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
372  ((TYPE) == MPU_TEX_LEVEL1) || \
373  ((TYPE) == MPU_TEX_LEVEL2))
374 
375 #define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
376  ((TYPE) == MPU_REGION_PRIV_RW) || \
377  ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
378  ((TYPE) == MPU_REGION_FULL_ACCESS) || \
379  ((TYPE) == MPU_REGION_PRIV_RO) || \
380  ((TYPE) == MPU_REGION_PRIV_RO_URO))
381 
382 #if !defined(CORE_CM4)
383 #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
384  ((NUMBER) == MPU_REGION_NUMBER1) || \
385  ((NUMBER) == MPU_REGION_NUMBER2) || \
386  ((NUMBER) == MPU_REGION_NUMBER3) || \
387  ((NUMBER) == MPU_REGION_NUMBER4) || \
388  ((NUMBER) == MPU_REGION_NUMBER5) || \
389  ((NUMBER) == MPU_REGION_NUMBER6) || \
390  ((NUMBER) == MPU_REGION_NUMBER7) || \
391  ((NUMBER) == MPU_REGION_NUMBER8) || \
392  ((NUMBER) == MPU_REGION_NUMBER9) || \
393  ((NUMBER) == MPU_REGION_NUMBER10) || \
394  ((NUMBER) == MPU_REGION_NUMBER11) || \
395  ((NUMBER) == MPU_REGION_NUMBER12) || \
396  ((NUMBER) == MPU_REGION_NUMBER13) || \
397  ((NUMBER) == MPU_REGION_NUMBER14) || \
398  ((NUMBER) == MPU_REGION_NUMBER15))
399 #else
400 #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
401  ((NUMBER) == MPU_REGION_NUMBER1) || \
402  ((NUMBER) == MPU_REGION_NUMBER2) || \
403  ((NUMBER) == MPU_REGION_NUMBER3) || \
404  ((NUMBER) == MPU_REGION_NUMBER4) || \
405  ((NUMBER) == MPU_REGION_NUMBER5) || \
406  ((NUMBER) == MPU_REGION_NUMBER6) || \
407  ((NUMBER) == MPU_REGION_NUMBER7))
408 #endif /* !defined(CORE_CM4) */
409 
410 #define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
411  ((SIZE) == MPU_REGION_SIZE_64B) || \
412  ((SIZE) == MPU_REGION_SIZE_128B) || \
413  ((SIZE) == MPU_REGION_SIZE_256B) || \
414  ((SIZE) == MPU_REGION_SIZE_512B) || \
415  ((SIZE) == MPU_REGION_SIZE_1KB) || \
416  ((SIZE) == MPU_REGION_SIZE_2KB) || \
417  ((SIZE) == MPU_REGION_SIZE_4KB) || \
418  ((SIZE) == MPU_REGION_SIZE_8KB) || \
419  ((SIZE) == MPU_REGION_SIZE_16KB) || \
420  ((SIZE) == MPU_REGION_SIZE_32KB) || \
421  ((SIZE) == MPU_REGION_SIZE_64KB) || \
422  ((SIZE) == MPU_REGION_SIZE_128KB) || \
423  ((SIZE) == MPU_REGION_SIZE_256KB) || \
424  ((SIZE) == MPU_REGION_SIZE_512KB) || \
425  ((SIZE) == MPU_REGION_SIZE_1MB) || \
426  ((SIZE) == MPU_REGION_SIZE_2MB) || \
427  ((SIZE) == MPU_REGION_SIZE_4MB) || \
428  ((SIZE) == MPU_REGION_SIZE_8MB) || \
429  ((SIZE) == MPU_REGION_SIZE_16MB) || \
430  ((SIZE) == MPU_REGION_SIZE_32MB) || \
431  ((SIZE) == MPU_REGION_SIZE_64MB) || \
432  ((SIZE) == MPU_REGION_SIZE_128MB) || \
433  ((SIZE) == MPU_REGION_SIZE_256MB) || \
434  ((SIZE) == MPU_REGION_SIZE_512MB) || \
435  ((SIZE) == MPU_REGION_SIZE_1GB) || \
436  ((SIZE) == MPU_REGION_SIZE_2GB) || \
437  ((SIZE) == MPU_REGION_SIZE_4GB))
438 
439 #define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
440 #endif /* __MPU_PRESENT */
441 
454 #ifdef __cplusplus
455 }
456 #endif
457 
458 #endif /* STM32H7xx_HAL_CORTEX_H */
459 
460 
461 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_NVIC_EnableIRQ
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
IRQn
IRQn
Definition: MIMXRT1052.h:78
HAL_NVIC_SystemReset
void HAL_NVIC_SystemReset(void)
HAL_NVIC_DisableIRQ
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
HAL_NVIC_GetActive
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
HAL_NVIC_SetPriorityGrouping
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
HAL_SYSTICK_IRQHandler
void HAL_SYSTICK_IRQHandler(void)
HAL_SYSTICK_Config
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
HAL_GetCurrentCPUID
uint32_t HAL_GetCurrentCPUID(void)
HAL_NVIC_ClearPendingIRQ
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
IRQn_Type
IRQn_Type
STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_sect...
Definition: stm32f407xx.h:66
HAL_SYSTICK_CLKSourceConfig
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
HAL_NVIC_GetPendingIRQ
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
HAL_NVIC_SetPendingIRQ
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
HAL_NVIC_GetPriority
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_NVIC_SetPriority
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
HAL_NVIC_GetPriorityGrouping
uint32_t HAL_NVIC_GetPriorityGrouping(void)
HAL_SYSTICK_Callback
void HAL_SYSTICK_Callback(void)

picovoice_driver
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autogenerated on Fri Apr 1 2022 02:14:54