stm32f7xx_hal_spdifrx.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32F7xx_HAL_SPDIFRX_H
22 #define STM32F7xx_HAL_SPDIFRX_H
23 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f7xx_hal_def.h"
30 
31 
35 #if defined (SPDIFRX)
36 
41 /* Exported types ------------------------------------------------------------*/
49 typedef struct
50 {
51  uint32_t InputSelection;
54  uint32_t Retries;
57  uint32_t WaitForActivity;
60  uint32_t ChannelSelection;
63  uint32_t DataFormat;
66  uint32_t StereoMode;
69  uint32_t PreambleTypeMask;
72  uint32_t ChannelStatusMask;
75  uint32_t ValidityBitMask;
78  uint32_t ParityErrorMask;
80 } SPDIFRX_InitTypeDef;
81 
85 typedef struct
86 {
87  uint32_t DataFormat;
90  uint32_t StereoMode;
93  uint32_t PreambleTypeMask;
96  uint32_t ChannelStatusMask;
99  uint32_t ValidityBitMask;
102  uint32_t ParityErrorMask;
105 } SPDIFRX_SetDataFormatTypeDef;
106 
110 typedef enum
111 {
112  HAL_SPDIFRX_STATE_RESET = 0x00U,
113  HAL_SPDIFRX_STATE_READY = 0x01U,
114  HAL_SPDIFRX_STATE_BUSY = 0x02U,
115  HAL_SPDIFRX_STATE_BUSY_RX = 0x03U,
116  HAL_SPDIFRX_STATE_BUSY_CX = 0x04U,
117  HAL_SPDIFRX_STATE_ERROR = 0x07U
118 } HAL_SPDIFRX_StateTypeDef;
119 
123 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
124 typedef struct __SPDIFRX_HandleTypeDef
125 #else
126 typedef struct
127 #endif
128 {
129  SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */
130 
131  SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */
132 
133  uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */
134 
135  uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */
136 
137  __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */
138 
139  __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter
140  (This field is initialized at the
141  same value as transfer size at the
142  beginning of the transfer and
143  decremented when a sample is received.
144  NbSamplesReceived = RxBufferSize-RxBufferCount) */
145 
146  __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */
147 
148  __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter
149  (This field is initialized at the
150  same value as transfer size at the
151  beginning of the transfer and
152  decremented when a sample is received.
153  NbSamplesReceived = RxBufferSize-RxBufferCount) */
154 
155  DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */
156 
157  DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */
158 
159  __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */
160 
161  __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */
162 
163  __IO uint32_t ErrorCode; /* SPDIFRX Error code */
164 
165 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
166  void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
167  void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
168  void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
169  void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
170  void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
171  void (* MspInitCallback)( struct __SPDIFRX_HandleTypeDef * hspdif);
172  void (* MspDeInitCallback)( struct __SPDIFRX_HandleTypeDef * hspdif);
173 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
174 
175 } SPDIFRX_HandleTypeDef;
180 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
181 
184 typedef enum
185 {
186  HAL_SPDIFRX_RX_HALF_CB_ID = 0x00U,
187  HAL_SPDIFRX_RX_CPLT_CB_ID = 0x01U,
188  HAL_SPDIFRX_CX_HALF_CB_ID = 0x02U,
189  HAL_SPDIFRX_CX_CPLT_CB_ID = 0x03U,
190  HAL_SPDIFRX_ERROR_CB_ID = 0x04U,
191  HAL_SPDIFRX_MSPINIT_CB_ID = 0x05U,
192  HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U
193 }HAL_SPDIFRX_CallbackIDTypeDef;
194 
198 typedef void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef * hspdif);
199 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
200 
201 /* Exported constants --------------------------------------------------------*/
208 #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U)
209 #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U)
210 #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U)
211 #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U)
212 #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U)
213 #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U)
214 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
215 #define HAL_SPDIFRX_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U)
216 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
217 
224 #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U)
225 #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U)
226 #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U)
227 #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U)
228 
235 #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U)
236 #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U)
237 #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U)
238 #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U)
239 
246 #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U)
247 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA)
248 
255 #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U)
256 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK)
257 
264 #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied into the SPDIF_DR */
265 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/
266 
273 #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U)
274 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK)
275 
282 #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U)
283 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK)
284 
291 #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U)
292 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL)
293 
300 #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U)
301 #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U)
302 #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U)
303 
310 #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U)
311 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO)
312 
320 #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU)
321 #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U)
322 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN)
323 
330 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE)
331 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE)
332 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE)
333 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE)
334 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE)
335 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE)
336 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE )
337 
344 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE)
345 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE)
346 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR)
347 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR)
348 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD)
349 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD)
350 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR)
351 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR)
352 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR)
353 
361 /* Exported macros -----------------------------------------------------------*/
370 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
371 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\
372  (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\
373  (__HANDLE__)->MspInitCallback = NULL;\
374  (__HANDLE__)->MspDeInitCallback = NULL;\
375  }while(0)
376 #else
377 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET)
378 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
379 
384 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
385 
390 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
391 
392 
397 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
398 
399 
413 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
414 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__)))
415 
429 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
430 
446 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
447 
459 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
460 
465 /* Exported functions --------------------------------------------------------*/
473 /* Initialization/de-initialization functions **********************************/
474 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
475 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif);
476 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
477 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
478 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat);
479 
480 /* Callbacks Register/UnRegister functions ***********************************/
481 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
482 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, pSPDIFRX_CallbackTypeDef pCallback);
483 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID);
484 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
485 
492 /* I/O operation functions ***************************************************/
493  /* Blocking mode: Polling */
494 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
495 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
496 
497 /* Non-Blocking mode: Interrupt */
498 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
499 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
500 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
501 
502 /* Non-Blocking mode: DMA */
503 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
504 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
505 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
506 
507 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
508 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
509 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
510 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
511 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
512 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
520 /* Peripheral Control and State functions ************************************/
521 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const * const hspdif);
522 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const * const hspdif);
530 /* Private types -------------------------------------------------------------*/
531 /* Private variables ---------------------------------------------------------*/
532 /* Private constants ---------------------------------------------------------*/
533 /* Private macros ------------------------------------------------------------*/
537 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \
538  ((INPUT) == SPDIFRX_INPUT_IN2) || \
539  ((INPUT) == SPDIFRX_INPUT_IN3) || \
540  ((INPUT) == SPDIFRX_INPUT_IN0))
541 
542 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
543  ((RET) == SPDIFRX_MAXRETRIES_3) || \
544  ((RET) == SPDIFRX_MAXRETRIES_15) || \
545  ((RET) == SPDIFRX_MAXRETRIES_63))
546 
547 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
548  ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
549 
550 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
551  ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
552 
553 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
554  ((VAL) == SPDIFRX_VALIDITYMASK_ON))
555 
556 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
557  ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
558 
559 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
560  ((CHANNEL) == SPDIFRX_CHANNEL_B))
561 
562 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
563  ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \
564  ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
565 
566 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
567  ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
568 
569 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
570  ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
571 
576 /* Private functions ---------------------------------------------------------*/
587 #endif /* SPDIFRX */
588 
593 #ifdef __cplusplus
594 }
595 #endif
596 
597 
598 #endif /* __STM32F7xx_HAL_SPDIFRX_H */
599 
600 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
__IO
#define __IO
Definition: imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h:237
Init
napi_value Init(napi_env env, napi_value exports)
Definition: porcupine/demo/c/pvrecorder/node/pv_recorder_napi.c:197
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:51
SPDIFRX_TypeDef
SPDIF-RX Interface.
Definition: stm32f769xx.h:874
stm32f7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.

picovoice_driver
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autogenerated on Fri Apr 1 2022 02:14:53