stm32f469/stm32f469i-disco/Drivers/BSP/Components/cs43l22/cs43l22.c
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1 
36 /* Includes ------------------------------------------------------------------*/
37 #include "cs43l22.h"
38 
64 #define VOLUME_CONVERT(Volume) (((Volume) > 100)? 255:((uint8_t)(((Volume) * 255) / 100)))
65 /* Uncomment this line to enable verifying data sent to codec after each write
66  operation (for debug purpose) */
67 #if !defined (VERIFY_WRITTENDATA)
68 /* #define VERIFY_WRITTENDATA */
69 #endif /* VERIFY_WRITTENDATA */
70 
86 /* Audio codec driver structure initialization */
88 {
92 
96  cs43l22_Stop,
97 
103 };
104 
105 static uint8_t Is_cs43l22_Stop = 1;
106 
107 volatile uint8_t OutputDev = 0;
108 
116 static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
133 uint32_t cs43l22_Init(uint16_t DeviceAddr, uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq)
134 {
135  uint32_t counter = 0;
136 
137  /* Initialize the Control interface of the Audio Codec */
138  AUDIO_IO_Init();
139 
140  /* Keep Codec powered OFF */
141  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x01);
142 
143  /*Save Output device for mute ON/OFF procedure*/
144  switch (OutputDevice)
145  {
147  OutputDev = 0xFA;
148  break;
149 
151  OutputDev = 0xAF;
152  break;
153 
154  case OUTPUT_DEVICE_BOTH:
155  OutputDev = 0xAA;
156  break;
157 
158  case OUTPUT_DEVICE_AUTO:
159  OutputDev = 0x05;
160  break;
161 
162  default:
163  OutputDev = 0x05;
164  break;
165  }
166 
167  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
168 
169  /* Clock configuration: Auto detection */
170  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_CLOCKING_CTL, 0x81);
171 
172  /* Set the Slave Mode and the audio Standard */
174 
175  /* Set the Master volume */
176  counter += cs43l22_SetVolume(DeviceAddr, Volume);
177 
178  /* If the Speaker is enabled, set the Mono mode and volume attenuation level */
179  if(OutputDevice != OUTPUT_DEVICE_HEADPHONE)
180  {
181  /* Set the Speaker Mono mode */
182  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PLAYBACK_CTL2, 0x06);
183 
184  /* Set the Speaker attenuation level */
185  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_SPEAKER_A_VOL, 0x00);
186  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_SPEAKER_B_VOL, 0x00);
187  }
188 
189  /* Additional configuration for the CODEC. These configurations are done to reduce
190  the time needed for the Codec to power off. If these configurations are removed,
191  then a long delay should be added between powering off the Codec and switching
192  off the I2S peripheral MCLK clock (which is the operating clock for Codec).
193  If this delay is not inserted, then the codec will not shut down properly and
194  it results in high noise after shut down. */
195 
196  /* Disable the analog soft ramp */
197  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_ANALOG_ZC_SR_SETT, 0x00);
198  /* Disable the digital soft ramp */
199  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x04);
200  /* Disable the limiter attack level */
201  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_LIMIT_CTL1, 0x00);
202  /* Adjust Bass and Treble levels */
203  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_TONE_CTL, 0x0F);
204  /* Adjust PCM volume level */
205  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PCMA_VOL, 0x0A);
206  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PCMB_VOL, 0x0A);
207 
208  /* Return communication control value */
209  return counter;
210 }
211 
217 void cs43l22_DeInit(void)
218 {
219  /* Deinitialize Audio Codec interface */
220  AUDIO_IO_DeInit();
221 }
222 
228 uint32_t cs43l22_ReadID(uint16_t DeviceAddr)
229 {
230  uint8_t Value;
231  /* Initialize the Control interface of the Audio Codec */
232  AUDIO_IO_Init();
233 
234  Value = AUDIO_IO_Read(DeviceAddr, CS43L22_CHIPID_ADDR);
235  Value = (Value & CS43L22_ID_MASK);
236 
237  return((uint32_t) Value);
238 }
239 
246 uint32_t cs43l22_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
247 {
248  uint32_t counter = 0;
249 
250  if(Is_cs43l22_Stop == 1)
251  {
252  /* Enable the digital soft ramp */
253  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x06);
254 
255  /* Enable Output device */
256  counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
257 
258  /* Power on the Codec */
259  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9E);
260  Is_cs43l22_Stop = 0;
261  }
262 
263  /* Return communication control value */
264  return counter;
265 }
266 
272 uint32_t cs43l22_Pause(uint16_t DeviceAddr)
273 {
274  uint32_t counter = 0;
275 
276  /* Pause the audio file playing */
277  /* Mute the output first */
278  counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_ON);
279 
280  /* Put the Codec in Power save mode */
281  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x01);
282 
283  return counter;
284 }
285 
291 uint32_t cs43l22_Resume(uint16_t DeviceAddr)
292 {
293  uint32_t counter = 0;
294  volatile uint32_t index = 0x00;
295  /* Resumes the audio file playing */
296  /* Unmute the output first */
297  counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
298 
299  for(index = 0x00; index < 0xFF; index++);
300 
301  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
302 
303  /* Exit the Power save mode */
304  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9E);
305 
306  return counter;
307 }
308 
319 uint32_t cs43l22_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
320 {
321  uint32_t counter = 0;
322 
323  /* Mute the output first */
324  counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_ON);
325 
326  /* Disable the digital soft ramp */
327  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x04);
328 
329  /* Power down the DAC and the speaker (PMDAC and PMSPK bits)*/
330  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9F);
331 
332  Is_cs43l22_Stop = 1;
333  return counter;
334 }
335 
344 uint32_t cs43l22_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
345 {
346  uint32_t counter = 0;
347  uint8_t convertedvol = VOLUME_CONVERT(Volume);
348 
349  if(convertedvol > 0xE6)
350  {
351  /* Set the Master volume */
352  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_A_VOL, convertedvol - 0xE7);
353  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_B_VOL, convertedvol - 0xE7);
354  }
355  else
356  {
357  /* Set the Master volume */
358  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_A_VOL, convertedvol + 0x19);
359  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_B_VOL, convertedvol + 0x19);
360  }
361 
362  return counter;
363 }
364 
371 uint32_t cs43l22_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
372 {
373  return 0;
374 }
375 
383 uint32_t cs43l22_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
384 {
385  uint32_t counter = 0;
386 
387  /* Set the Mute mode */
388  if(Cmd == AUDIO_MUTE_ON)
389  {
390  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xFF);
391  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_A_VOL, 0x01);
392  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_B_VOL, 0x01);
393  }
394  else /* AUDIO_MUTE_OFF Disable the Mute */
395  {
396  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_A_VOL, 0x00);
397  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_B_VOL, 0x00);
398  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
399  }
400  return counter;
401 }
402 
412 uint32_t cs43l22_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
413 {
414  uint32_t counter = 0;
415 
416  switch (Output)
417  {
419  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xFA); /* SPK always ON & HP always OFF */
420  OutputDev = 0xFA;
421  break;
422 
424  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xAF); /* SPK always OFF & HP always ON */
425  OutputDev = 0xAF;
426  break;
427 
428  case OUTPUT_DEVICE_BOTH:
429  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xAA); /* SPK always ON & HP always ON */
430  OutputDev = 0xAA;
431  break;
432 
433  case OUTPUT_DEVICE_AUTO:
434  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0x05); /* Detect the HP or the SPK automatically */
435  OutputDev = 0x05;
436  break;
437 
438  default:
439  counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0x05); /* Detect the HP or the SPK automatically */
440  OutputDev = 0x05;
441  break;
442  }
443  return counter;
444 }
445 
451 uint32_t cs43l22_Reset(uint16_t DeviceAddr)
452 {
453  return 0;
454 }
455 
463 static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
464 {
465  uint32_t result = 0;
466 
467  AUDIO_IO_Write(Addr, Reg, Value);
468 
469 #ifdef VERIFY_WRITTENDATA
470  /* Verify that the data has been correctly written */
471  result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
472 #endif /* VERIFY_WRITTENDATA */
473 
474  return result;
475 }
476 
493 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
CS43L22_REG_SPEAKER_B_VOL
#define CS43L22_REG_SPEAKER_B_VOL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:130
CS43L22_REG_MISC_CTL
#define CS43L22_REG_MISC_CTL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:115
CS43L22_REG_PLAYBACK_CTL2
#define CS43L22_REG_PLAYBACK_CTL2
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:116
CS43L22_REG_ANALOG_ZC_SR_SETT
#define CS43L22_REG_ANALOG_ZC_SR_SETT
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:112
CS43L22_REG_LIMIT_CTL1
#define CS43L22_REG_LIMIT_CTL1
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:132
AUDIO_MUTE_ON
#define AUDIO_MUTE_ON
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:89
AUDIO_MUTE_OFF
#define AUDIO_MUTE_OFF
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:90
CS43L22_CHIPID_ADDR
#define CS43L22_CHIPID_ADDR
Chip ID Register: Chip I.D. and Revision Register Read only register Default value: 0x01 [7:3] CHIPID...
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:164
CS43L22_REG_POWER_CTL1
#define CS43L22_REG_POWER_CTL1
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:105
OUTPUT_DEVICE_AUTO
#define OUTPUT_DEVICE_AUTO
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:74
CS43L22_REG_MASTER_B_VOL
#define CS43L22_REG_MASTER_B_VOL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:126
cs43l22_ReadID
uint32_t cs43l22_ReadID(uint16_t DeviceAddr)
Get the CS43L22 ID.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:228
Is_cs43l22_Stop
static uint8_t Is_cs43l22_Stop
Definition: stm32f469/stm32f469i-disco/Drivers/BSP/Components/cs43l22/cs43l22.c:105
CS43L22_ID_MASK
#define CS43L22_ID_MASK
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:150
VOLUME_CONVERT
#define VOLUME_CONVERT(Volume)
Definition: stm32f469/stm32f469i-disco/Drivers/BSP/Components/cs43l22/cs43l22.c:64
CS43L22_REG_SPEAKER_A_VOL
#define CS43L22_REG_SPEAKER_A_VOL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:129
cs43l22_SetVolume
uint32_t cs43l22_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
Sets higher or lower the codec volume level.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:344
cs43l22_Play
uint32_t cs43l22_Play(uint16_t DeviceAddr, uint16_t *pBuffer, uint16_t Size)
Start the audio Codec play feature.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:246
OutputDev
volatile uint8_t OutputDev
Definition: stm32f469/stm32f469i-disco/Drivers/BSP/Components/cs43l22/cs43l22.c:107
AUDIO_IO_Read
uint8_t AUDIO_IO_Read(uint8_t Addr, uint8_t Reg)
Reads a single data.
Definition: stm32f4_discovery.c:680
AUDIO_IO_Write
void AUDIO_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
Writes a single data.
Definition: stm32f4_discovery.c:669
cs43l22_SetMute
uint32_t cs43l22_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
Enables or disables the mute feature on the audio codec.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:383
CS43L22_REG_TONE_CTL
#define CS43L22_REG_TONE_CTL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:124
CS43L22_REG_INTERFACE_CTL1
#define CS43L22_REG_INTERFACE_CTL1
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:108
cs43l22.h
This file contains all the functions prototypes for the cs43l22.c driver.
cs43l22_Init
uint32_t cs43l22_Init(uint16_t DeviceAddr, uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq)
Initializes the audio codec and the control interface.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:133
cs43l22_DeInit
void cs43l22_DeInit(void)
Deinitializes the audio codec.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:217
cs43l22_SetOutputMode
uint32_t cs43l22_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
Switch dynamically (while audio file is played) the output target (speaker or headphone).
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:412
OUTPUT_DEVICE_SPEAKER
#define OUTPUT_DEVICE_SPEAKER
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:71
OUTPUT_DEVICE_BOTH
#define OUTPUT_DEVICE_BOTH
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:73
CODEC_STANDARD
#define CODEC_STANDARD
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/Common/audio.h:67
cs43l22_Reset
uint32_t cs43l22_Reset(uint16_t DeviceAddr)
Resets cs43l22 registers.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:451
AUDIO_DrvTypeDef
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/Common/audio.h:81
CS43L22_REG_PCMA_VOL
#define CS43L22_REG_PCMA_VOL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:119
CODEC_IO_Write
static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
Writes/Read a single data.
Definition: stm32f469/stm32f469i-disco/Drivers/BSP/Components/cs43l22/cs43l22.c:463
CS43L22_REG_POWER_CTL2
#define CS43L22_REG_POWER_CTL2
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:106
CS43L22_REG_PCMB_VOL
#define CS43L22_REG_PCMB_VOL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:120
CS43L22_REG_CLOCKING_CTL
#define CS43L22_REG_CLOCKING_CTL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:107
CS43L22_REG_HEADPHONE_B_VOL
#define CS43L22_REG_HEADPHONE_B_VOL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:128
cs43l22_Resume
uint32_t cs43l22_Resume(uint16_t DeviceAddr)
Resumes playing on the audio codec.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:291
CS43L22_REG_HEADPHONE_A_VOL
#define CS43L22_REG_HEADPHONE_A_VOL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:127
OUTPUT_DEVICE_HEADPHONE
#define OUTPUT_DEVICE_HEADPHONE
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:72
cs43l22_Pause
uint32_t cs43l22_Pause(uint16_t DeviceAddr)
Pauses playing on the audio codec.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:272
AUDIO_IO_Init
void AUDIO_IO_Init(void)
Initializes Audio low level.
Definition: stm32f4_discovery.c:626
AUDIO_IO_DeInit
void AUDIO_IO_DeInit(void)
DeInitializes Audio low level.
Definition: stm32f4_discovery.c:658
CS43L22_REG_MASTER_A_VOL
#define CS43L22_REG_MASTER_A_VOL
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.h:125
cs43l22_SetFrequency
uint32_t cs43l22_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
Sets new frequency.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:371
cs43l22_Stop
uint32_t cs43l22_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
Stops audio Codec playing. It powers down the codec.
Definition: stm32f407/stm32f407g-disc1/Drivers/BSP/Components/cs43l22/cs43l22.c:319
cs43l22_drv
AUDIO_DrvTypeDef cs43l22_drv
Definition: stm32f469/stm32f469i-disco/Drivers/BSP/Components/cs43l22/cs43l22.c:87


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:13:48