Macros
Collaboration diagram for TIM DMA Base Address:

Macros

#define TIM_DMABASE_ARR   0x0000000BU
 
#define TIM_DMABASE_ARR   0x0000000BU
 
#define TIM_DMABASE_ARR   0x0000000BU
 
#define TIM_DMABASE_ARR   0x0000000BU
 
#define TIM_DMABASE_ARR   0x0000000BU
 
#define TIM_DMABASE_BDTR   0x00000011U
 
#define TIM_DMABASE_BDTR   0x00000011U
 
#define TIM_DMABASE_BDTR   0x00000011U
 
#define TIM_DMABASE_BDTR   0x00000011U
 
#define TIM_DMABASE_BDTR   0x00000011U
 
#define TIM_DMABASE_CCER   0x00000008U
 
#define TIM_DMABASE_CCER   0x00000008U
 
#define TIM_DMABASE_CCER   0x00000008U
 
#define TIM_DMABASE_CCER   0x00000008U
 
#define TIM_DMABASE_CCER   0x00000008U
 
#define TIM_DMABASE_CCMR1   0x00000006U
 
#define TIM_DMABASE_CCMR1   0x00000006U
 
#define TIM_DMABASE_CCMR1   0x00000006U
 
#define TIM_DMABASE_CCMR1   0x00000006U
 
#define TIM_DMABASE_CCMR1   0x00000006U
 
#define TIM_DMABASE_CCMR2   0x00000007U
 
#define TIM_DMABASE_CCMR2   0x00000007U
 
#define TIM_DMABASE_CCMR2   0x00000007U
 
#define TIM_DMABASE_CCMR2   0x00000007U
 
#define TIM_DMABASE_CCMR2   0x00000007U
 
#define TIM_DMABASE_CCMR3   0x00000015U
 
#define TIM_DMABASE_CCMR3   0x00000015U
 
#define TIM_DMABASE_CCMR3   0x00000015U
 
#define TIM_DMABASE_CCR1   0x0000000DU
 
#define TIM_DMABASE_CCR1   0x0000000DU
 
#define TIM_DMABASE_CCR1   0x0000000DU
 
#define TIM_DMABASE_CCR1   0x0000000DU
 
#define TIM_DMABASE_CCR1   0x0000000DU
 
#define TIM_DMABASE_CCR2   0x0000000EU
 
#define TIM_DMABASE_CCR2   0x0000000EU
 
#define TIM_DMABASE_CCR2   0x0000000EU
 
#define TIM_DMABASE_CCR2   0x0000000EU
 
#define TIM_DMABASE_CCR2   0x0000000EU
 
#define TIM_DMABASE_CCR3   0x0000000FU
 
#define TIM_DMABASE_CCR3   0x0000000FU
 
#define TIM_DMABASE_CCR3   0x0000000FU
 
#define TIM_DMABASE_CCR3   0x0000000FU
 
#define TIM_DMABASE_CCR3   0x0000000FU
 
#define TIM_DMABASE_CCR4   0x00000010U
 
#define TIM_DMABASE_CCR4   0x00000010U
 
#define TIM_DMABASE_CCR4   0x00000010U
 
#define TIM_DMABASE_CCR4   0x00000010U
 
#define TIM_DMABASE_CCR4   0x00000010U
 
#define TIM_DMABASE_CCR5   0x00000016U
 
#define TIM_DMABASE_CCR5   0x00000016U
 
#define TIM_DMABASE_CCR5   0x00000016U
 
#define TIM_DMABASE_CCR6   0x00000017U
 
#define TIM_DMABASE_CCR6   0x00000017U
 
#define TIM_DMABASE_CCR6   0x00000017U
 
#define TIM_DMABASE_CNT   0x00000009U
 
#define TIM_DMABASE_CNT   0x00000009U
 
#define TIM_DMABASE_CNT   0x00000009U
 
#define TIM_DMABASE_CNT   0x00000009U
 
#define TIM_DMABASE_CNT   0x00000009U
 
#define TIM_DMABASE_CR1   0x00000000U
 
#define TIM_DMABASE_CR1   0x00000000U
 
#define TIM_DMABASE_CR1   0x00000000U
 
#define TIM_DMABASE_CR1   0x00000000U
 
#define TIM_DMABASE_CR1   0x00000000U
 
#define TIM_DMABASE_CR2   0x00000001U
 
#define TIM_DMABASE_CR2   0x00000001U
 
#define TIM_DMABASE_CR2   0x00000001U
 
#define TIM_DMABASE_CR2   0x00000001U
 
#define TIM_DMABASE_CR2   0x00000001U
 
#define TIM_DMABASE_DCR   0x00000012U
 
#define TIM_DMABASE_DCR   0x00000012U
 
#define TIM_DMABASE_DCR   0x00000012U
 
#define TIM_DMABASE_DCR   0x00000012U
 
#define TIM_DMABASE_DCR   0x00000012U
 
#define TIM_DMABASE_DIER   0x00000003U
 
#define TIM_DMABASE_DIER   0x00000003U
 
#define TIM_DMABASE_DIER   0x00000003U
 
#define TIM_DMABASE_DIER   0x00000003U
 
#define TIM_DMABASE_DIER   0x00000003U
 
#define TIM_DMABASE_DMAR   0x00000013U
 
#define TIM_DMABASE_DMAR   0x00000013U
 
#define TIM_DMABASE_DMAR   0x00000013U
 
#define TIM_DMABASE_DMAR   0x00000013U
 
#define TIM_DMABASE_DMAR   0x00000013U
 
#define TIM_DMABASE_EGR   0x00000005U
 
#define TIM_DMABASE_EGR   0x00000005U
 
#define TIM_DMABASE_EGR   0x00000005U
 
#define TIM_DMABASE_EGR   0x00000005U
 
#define TIM_DMABASE_EGR   0x00000005U
 
#define TIM_DMABASE_OR   0x00000014U
 
#define TIM_DMABASE_PSC   0x0000000AU
 
#define TIM_DMABASE_PSC   0x0000000AU
 
#define TIM_DMABASE_PSC   0x0000000AU
 
#define TIM_DMABASE_PSC   0x0000000AU
 
#define TIM_DMABASE_PSC   0x0000000AU
 
#define TIM_DMABASE_RCR   0x0000000CU
 
#define TIM_DMABASE_RCR   0x0000000CU
 
#define TIM_DMABASE_RCR   0x0000000CU
 
#define TIM_DMABASE_RCR   0x0000000CU
 
#define TIM_DMABASE_RCR   0x0000000CU
 
#define TIM_DMABASE_SMCR   0x00000002U
 
#define TIM_DMABASE_SMCR   0x00000002U
 
#define TIM_DMABASE_SMCR   0x00000002U
 
#define TIM_DMABASE_SMCR   0x00000002U
 
#define TIM_DMABASE_SMCR   0x00000002U
 
#define TIM_DMABASE_SR   0x00000004U
 
#define TIM_DMABASE_SR   0x00000004U
 
#define TIM_DMABASE_SR   0x00000004U
 
#define TIM_DMABASE_SR   0x00000004U
 
#define TIM_DMABASE_SR   0x00000004U
 
#define TIM_DMABASE_TISEL   0x0000001AU
 
#define TIM_DMABASE_TISEL   0x0000001AU
 

Detailed Description

Macro Definition Documentation

◆ TIM_DMABASE_ARR [1/5]

#define TIM_DMABASE_ARR   0x0000000BU

◆ TIM_DMABASE_ARR [2/5]

#define TIM_DMABASE_ARR   0x0000000BU

◆ TIM_DMABASE_ARR [3/5]

#define TIM_DMABASE_ARR   0x0000000BU

Definition at line 447 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_ARR [4/5]

#define TIM_DMABASE_ARR   0x0000000BU

◆ TIM_DMABASE_ARR [5/5]

#define TIM_DMABASE_ARR   0x0000000BU

◆ TIM_DMABASE_BDTR [1/5]

#define TIM_DMABASE_BDTR   0x00000011U

◆ TIM_DMABASE_BDTR [2/5]

#define TIM_DMABASE_BDTR   0x00000011U

◆ TIM_DMABASE_BDTR [3/5]

#define TIM_DMABASE_BDTR   0x00000011U

Definition at line 453 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_BDTR [4/5]

#define TIM_DMABASE_BDTR   0x00000011U

◆ TIM_DMABASE_BDTR [5/5]

#define TIM_DMABASE_BDTR   0x00000011U

◆ TIM_DMABASE_CCER [1/5]

#define TIM_DMABASE_CCER   0x00000008U

◆ TIM_DMABASE_CCER [2/5]

#define TIM_DMABASE_CCER   0x00000008U

◆ TIM_DMABASE_CCER [3/5]

#define TIM_DMABASE_CCER   0x00000008U

Definition at line 444 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCER [4/5]

#define TIM_DMABASE_CCER   0x00000008U

◆ TIM_DMABASE_CCER [5/5]

#define TIM_DMABASE_CCER   0x00000008U

◆ TIM_DMABASE_CCMR1 [1/5]

#define TIM_DMABASE_CCMR1   0x00000006U

◆ TIM_DMABASE_CCMR1 [2/5]

#define TIM_DMABASE_CCMR1   0x00000006U

◆ TIM_DMABASE_CCMR1 [3/5]

#define TIM_DMABASE_CCMR1   0x00000006U

Definition at line 442 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCMR1 [4/5]

#define TIM_DMABASE_CCMR1   0x00000006U

◆ TIM_DMABASE_CCMR1 [5/5]

#define TIM_DMABASE_CCMR1   0x00000006U

◆ TIM_DMABASE_CCMR2 [1/5]

#define TIM_DMABASE_CCMR2   0x00000007U

◆ TIM_DMABASE_CCMR2 [2/5]

#define TIM_DMABASE_CCMR2   0x00000007U

◆ TIM_DMABASE_CCMR2 [3/5]

#define TIM_DMABASE_CCMR2   0x00000007U

Definition at line 443 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCMR2 [4/5]

#define TIM_DMABASE_CCMR2   0x00000007U

◆ TIM_DMABASE_CCMR2 [5/5]

#define TIM_DMABASE_CCMR2   0x00000007U

◆ TIM_DMABASE_CCMR3 [1/3]

#define TIM_DMABASE_CCMR3   0x00000015U

Definition at line 457 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCMR3 [2/3]

#define TIM_DMABASE_CCMR3   0x00000015U

◆ TIM_DMABASE_CCMR3 [3/3]

#define TIM_DMABASE_CCMR3   0x00000015U

◆ TIM_DMABASE_CCR1 [1/5]

#define TIM_DMABASE_CCR1   0x0000000DU

◆ TIM_DMABASE_CCR1 [2/5]

#define TIM_DMABASE_CCR1   0x0000000DU

◆ TIM_DMABASE_CCR1 [3/5]

#define TIM_DMABASE_CCR1   0x0000000DU

Definition at line 449 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCR1 [4/5]

#define TIM_DMABASE_CCR1   0x0000000DU

◆ TIM_DMABASE_CCR1 [5/5]

#define TIM_DMABASE_CCR1   0x0000000DU

◆ TIM_DMABASE_CCR2 [1/5]

#define TIM_DMABASE_CCR2   0x0000000EU

◆ TIM_DMABASE_CCR2 [2/5]

#define TIM_DMABASE_CCR2   0x0000000EU

◆ TIM_DMABASE_CCR2 [3/5]

#define TIM_DMABASE_CCR2   0x0000000EU

Definition at line 450 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCR2 [4/5]

#define TIM_DMABASE_CCR2   0x0000000EU

◆ TIM_DMABASE_CCR2 [5/5]

#define TIM_DMABASE_CCR2   0x0000000EU

◆ TIM_DMABASE_CCR3 [1/5]

#define TIM_DMABASE_CCR3   0x0000000FU

◆ TIM_DMABASE_CCR3 [2/5]

#define TIM_DMABASE_CCR3   0x0000000FU

◆ TIM_DMABASE_CCR3 [3/5]

#define TIM_DMABASE_CCR3   0x0000000FU

Definition at line 451 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCR3 [4/5]

#define TIM_DMABASE_CCR3   0x0000000FU

◆ TIM_DMABASE_CCR3 [5/5]

#define TIM_DMABASE_CCR3   0x0000000FU

◆ TIM_DMABASE_CCR4 [1/5]

#define TIM_DMABASE_CCR4   0x00000010U

◆ TIM_DMABASE_CCR4 [2/5]

#define TIM_DMABASE_CCR4   0x00000010U

◆ TIM_DMABASE_CCR4 [3/5]

#define TIM_DMABASE_CCR4   0x00000010U

Definition at line 452 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCR4 [4/5]

#define TIM_DMABASE_CCR4   0x00000010U

◆ TIM_DMABASE_CCR4 [5/5]

#define TIM_DMABASE_CCR4   0x00000010U

◆ TIM_DMABASE_CCR5 [1/3]

#define TIM_DMABASE_CCR5   0x00000016U

Definition at line 458 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCR5 [2/3]

#define TIM_DMABASE_CCR5   0x00000016U

◆ TIM_DMABASE_CCR5 [3/3]

#define TIM_DMABASE_CCR5   0x00000016U

◆ TIM_DMABASE_CCR6 [1/3]

#define TIM_DMABASE_CCR6   0x00000017U

Definition at line 459 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CCR6 [2/3]

#define TIM_DMABASE_CCR6   0x00000017U

◆ TIM_DMABASE_CCR6 [3/3]

#define TIM_DMABASE_CCR6   0x00000017U

◆ TIM_DMABASE_CNT [1/5]

#define TIM_DMABASE_CNT   0x00000009U

◆ TIM_DMABASE_CNT [2/5]

#define TIM_DMABASE_CNT   0x00000009U

◆ TIM_DMABASE_CNT [3/5]

#define TIM_DMABASE_CNT   0x00000009U

Definition at line 445 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CNT [4/5]

#define TIM_DMABASE_CNT   0x00000009U

◆ TIM_DMABASE_CNT [5/5]

#define TIM_DMABASE_CNT   0x00000009U

◆ TIM_DMABASE_CR1 [1/5]

#define TIM_DMABASE_CR1   0x00000000U

◆ TIM_DMABASE_CR1 [2/5]

#define TIM_DMABASE_CR1   0x00000000U

◆ TIM_DMABASE_CR1 [3/5]

#define TIM_DMABASE_CR1   0x00000000U

Definition at line 436 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CR1 [4/5]

#define TIM_DMABASE_CR1   0x00000000U

◆ TIM_DMABASE_CR1 [5/5]

#define TIM_DMABASE_CR1   0x00000000U

◆ TIM_DMABASE_CR2 [1/5]

#define TIM_DMABASE_CR2   0x00000001U

◆ TIM_DMABASE_CR2 [2/5]

#define TIM_DMABASE_CR2   0x00000001U

◆ TIM_DMABASE_CR2 [3/5]

#define TIM_DMABASE_CR2   0x00000001U

Definition at line 437 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_CR2 [4/5]

#define TIM_DMABASE_CR2   0x00000001U

◆ TIM_DMABASE_CR2 [5/5]

#define TIM_DMABASE_CR2   0x00000001U

◆ TIM_DMABASE_DCR [1/5]

#define TIM_DMABASE_DCR   0x00000012U

◆ TIM_DMABASE_DCR [2/5]

#define TIM_DMABASE_DCR   0x00000012U

◆ TIM_DMABASE_DCR [3/5]

#define TIM_DMABASE_DCR   0x00000012U

Definition at line 454 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_DCR [4/5]

#define TIM_DMABASE_DCR   0x00000012U

◆ TIM_DMABASE_DCR [5/5]

#define TIM_DMABASE_DCR   0x00000012U

◆ TIM_DMABASE_DIER [1/5]

#define TIM_DMABASE_DIER   0x00000003U

◆ TIM_DMABASE_DIER [2/5]

#define TIM_DMABASE_DIER   0x00000003U

◆ TIM_DMABASE_DIER [3/5]

#define TIM_DMABASE_DIER   0x00000003U

Definition at line 439 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_DIER [4/5]

#define TIM_DMABASE_DIER   0x00000003U

◆ TIM_DMABASE_DIER [5/5]

#define TIM_DMABASE_DIER   0x00000003U

◆ TIM_DMABASE_DMAR [1/5]

#define TIM_DMABASE_DMAR   0x00000013U

◆ TIM_DMABASE_DMAR [2/5]

#define TIM_DMABASE_DMAR   0x00000013U

◆ TIM_DMABASE_DMAR [3/5]

#define TIM_DMABASE_DMAR   0x00000013U

Definition at line 455 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_DMAR [4/5]

#define TIM_DMABASE_DMAR   0x00000013U

◆ TIM_DMABASE_DMAR [5/5]

#define TIM_DMABASE_DMAR   0x00000013U

◆ TIM_DMABASE_EGR [1/5]

#define TIM_DMABASE_EGR   0x00000005U

◆ TIM_DMABASE_EGR [2/5]

#define TIM_DMABASE_EGR   0x00000005U

◆ TIM_DMABASE_EGR [3/5]

#define TIM_DMABASE_EGR   0x00000005U

Definition at line 441 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_EGR [4/5]

#define TIM_DMABASE_EGR   0x00000005U

◆ TIM_DMABASE_EGR [5/5]

#define TIM_DMABASE_EGR   0x00000005U

◆ TIM_DMABASE_OR

#define TIM_DMABASE_OR   0x00000014U

Definition at line 456 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_PSC [1/5]

#define TIM_DMABASE_PSC   0x0000000AU

◆ TIM_DMABASE_PSC [2/5]

#define TIM_DMABASE_PSC   0x0000000AU

◆ TIM_DMABASE_PSC [3/5]

#define TIM_DMABASE_PSC   0x0000000AU

Definition at line 446 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_PSC [4/5]

#define TIM_DMABASE_PSC   0x0000000AU

◆ TIM_DMABASE_PSC [5/5]

#define TIM_DMABASE_PSC   0x0000000AU

◆ TIM_DMABASE_RCR [1/5]

#define TIM_DMABASE_RCR   0x0000000CU

◆ TIM_DMABASE_RCR [2/5]

#define TIM_DMABASE_RCR   0x0000000CU

◆ TIM_DMABASE_RCR [3/5]

#define TIM_DMABASE_RCR   0x0000000CU

Definition at line 448 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_RCR [4/5]

#define TIM_DMABASE_RCR   0x0000000CU

◆ TIM_DMABASE_RCR [5/5]

#define TIM_DMABASE_RCR   0x0000000CU

◆ TIM_DMABASE_SMCR [1/5]

#define TIM_DMABASE_SMCR   0x00000002U

◆ TIM_DMABASE_SMCR [2/5]

#define TIM_DMABASE_SMCR   0x00000002U

◆ TIM_DMABASE_SMCR [3/5]

#define TIM_DMABASE_SMCR   0x00000002U

Definition at line 438 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_SMCR [4/5]

#define TIM_DMABASE_SMCR   0x00000002U

◆ TIM_DMABASE_SMCR [5/5]

#define TIM_DMABASE_SMCR   0x00000002U

◆ TIM_DMABASE_SR [1/5]

#define TIM_DMABASE_SR   0x00000004U

◆ TIM_DMABASE_SR [2/5]

#define TIM_DMABASE_SR   0x00000004U

◆ TIM_DMABASE_SR [3/5]

#define TIM_DMABASE_SR   0x00000004U

Definition at line 440 of file stm32f7xx_hal_tim.h.

◆ TIM_DMABASE_SR [4/5]

#define TIM_DMABASE_SR   0x00000004U

◆ TIM_DMABASE_SR [5/5]

#define TIM_DMABASE_SR   0x00000004U

◆ TIM_DMABASE_TISEL [1/2]

#define TIM_DMABASE_TISEL   0x0000001AU

◆ TIM_DMABASE_TISEL [2/2]

#define TIM_DMABASE_TISEL   0x0000001AU


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:07