Collaboration diagram for SYSCFG Exported Macros:

Macros
#define	__HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML)
	SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML)
	SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_BKRAML)
	SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_BKRAML)
	SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM7L)
	SYSCFG Break Cortex-M7 Lockup lock. Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM7L)
	SYSCFG Break Cortex-M7 Lockup lock. Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_DTCML)
	SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_DTCML)
	SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_FLASHL)
	SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_FLASHL)
	SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML)
	SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML)
	SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_PVDL)
	SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register. More...

#define	__HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_PVDL)
	SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register. More...

#define	__HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM1L)
	SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM1L)
	SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM2L)
	SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM2L)
	SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM3L)
	SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM3L)
	SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM4L)
	SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM4L)
	SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. More...

#define	__HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__)

#define	__HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__)

#define	__HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__)
	Fast-mode Plus driving capability enable/disable macros. More...

#define	__HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__)
	Fast-mode Plus driving capability enable/disable macros. More...

Detailed Description

Macro Definition Documentation

◆ __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML)

SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 737 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML)

SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 737 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_BKRAML)

SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 786 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_BKRAML)

SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 786 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM7L)

SYSCFG Break Cortex-M7 Lockup lock. Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 793 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM7L)

SYSCFG Break Cortex-M7 Lockup lock. Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 793 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_DTCML)

SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 751 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_DTCML)

SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 751 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_FLASHL)

SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 800 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_FLASHL)

SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 800 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML)

SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 744 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML)

SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 744 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_PVD_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_PVD_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_PVDL)

SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 807 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_PVD_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_PVD_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_PVDL)

SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 807 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM1L)

SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 758 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM1L)

SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 758 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM2L)

SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 765 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM2L)

SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 765 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM3L)

SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 772 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM3L)

SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 772 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK [1/2]

#define __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM4L)

SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 779 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK [2/2]

#define __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM4L)

SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.

Note: The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above.

Definition at line 779 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_FASTMODEPLUS_DISABLE [1/2]

#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE ( __FASTMODEPLUS__ )

Value:

                                                                do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
                                                                CLEAR_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
                                                               }while(0)

Definition at line 830 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_FASTMODEPLUS_DISABLE [2/2]

#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE ( __FASTMODEPLUS__ )

Value:

                                                                do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
                                                                CLEAR_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
                                                               }while(0)

Definition at line 830 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_FASTMODEPLUS_ENABLE [1/2]

#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE ( __FASTMODEPLUS__ )

Value:

                                                                do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
                                                                SET_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
                                                               }while(0)

Fast-mode Plus driving capability enable/disable macros.

Parameters

<strong>FASTMODEPLUS</strong>

This parameter can be a value of :

SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6
SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7
SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8
SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9

Definition at line 826 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.

◆ __HAL_SYSCFG_FASTMODEPLUS_ENABLE [2/2]

#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE ( __FASTMODEPLUS__ )

Value:

                                                                do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
                                                                SET_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
                                                               }while(0)

Fast-mode Plus driving capability enable/disable macros.

Parameters

<strong>FASTMODEPLUS</strong>

This parameter can be a value of :

SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6
SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7
SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8
SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9

Definition at line 826 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h.