SPI Exported Types

Collaboration diagram for SPI Exported Types:

Classes
struct	__SPI_HandleTypeDef
	SPI handle Structure definition. More...
struct	SPI_InitTypeDef
	SPI Configuration Structure definition. More...

Typedefs
typedef struct __SPI_HandleTypeDef	SPI_HandleTypeDef
	SPI handle Structure definition. More...
typedef struct __SPI_HandleTypeDef	SPI_HandleTypeDef
	SPI handle Structure definition. More...
typedef struct __SPI_HandleTypeDef	SPI_HandleTypeDef
	SPI handle Structure definition. More...
typedef struct __SPI_HandleTypeDef	SPI_HandleTypeDef
	SPI handle Structure definition. More...

Enumerations
enum	HAL_SPI_StateTypeDef {   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00UL, HAL_SPI_STATE_READY = 0x01UL, HAL_SPI_STATE_BUSY = 0x02UL, HAL_SPI_STATE_BUSY_TX = 0x03UL,   HAL_SPI_STATE_BUSY_RX = 0x04UL, HAL_SPI_STATE_BUSY_TX_RX = 0x05UL, HAL_SPI_STATE_ERROR = 0x06UL, HAL_SPI_STATE_ABORT = 0x07UL }
	HAL SPI State structure definition. More...
enum	HAL_SPI_StateTypeDef {   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00UL, HAL_SPI_STATE_READY = 0x01UL, HAL_SPI_STATE_BUSY = 0x02UL, HAL_SPI_STATE_BUSY_TX = 0x03UL,   HAL_SPI_STATE_BUSY_RX = 0x04UL, HAL_SPI_STATE_BUSY_TX_RX = 0x05UL, HAL_SPI_STATE_ERROR = 0x06UL, HAL_SPI_STATE_ABORT = 0x07UL }
	HAL SPI State structure definition. More...
enum	HAL_SPI_StateTypeDef {   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00UL, HAL_SPI_STATE_READY = 0x01UL, HAL_SPI_STATE_BUSY = 0x02UL, HAL_SPI_STATE_BUSY_TX = 0x03UL,   HAL_SPI_STATE_BUSY_RX = 0x04UL, HAL_SPI_STATE_BUSY_TX_RX = 0x05UL, HAL_SPI_STATE_ERROR = 0x06UL, HAL_SPI_STATE_ABORT = 0x07UL }
	HAL SPI State structure definition. More...
enum	HAL_SPI_StateTypeDef {   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00U, HAL_SPI_STATE_READY = 0x01U, HAL_SPI_STATE_BUSY = 0x02U, HAL_SPI_STATE_BUSY_TX = 0x03U,   HAL_SPI_STATE_BUSY_RX = 0x04U, HAL_SPI_STATE_BUSY_TX_RX = 0x05U, HAL_SPI_STATE_ERROR = 0x06U, HAL_SPI_STATE_ABORT = 0x07U,   HAL_SPI_STATE_RESET = 0x00UL, HAL_SPI_STATE_READY = 0x01UL, HAL_SPI_STATE_BUSY = 0x02UL, HAL_SPI_STATE_BUSY_TX = 0x03UL,   HAL_SPI_STATE_BUSY_RX = 0x04UL, HAL_SPI_STATE_BUSY_TX_RX = 0x05UL, HAL_SPI_STATE_ERROR = 0x06UL, HAL_SPI_STATE_ABORT = 0x07UL }
	HAL SPI State structure definition. More...

Detailed Description

Typedef Documentation

SPI_HandleTypeDef [1/4]

typedef struct __SPI_HandleTypeDef SPI_HandleTypeDef

SPI handle Structure definition.

SPI_HandleTypeDef [2/4]

typedef struct __SPI_HandleTypeDef SPI_HandleTypeDef

SPI handle Structure definition.

SPI_HandleTypeDef [3/4]

typedef struct __SPI_HandleTypeDef SPI_HandleTypeDef

SPI handle Structure definition.

SPI_HandleTypeDef [4/4]

typedef struct __SPI_HandleTypeDef SPI_HandleTypeDef

SPI handle Structure definition.

Enumeration Type Documentation

HAL_SPI_StateTypeDef [1/4]

enum HAL_SPI_StateTypeDef

HAL SPI State structure definition.

Enumerator
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing

Definition at line 90 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h.

HAL_SPI_StateTypeDef [2/4]

enum HAL_SPI_StateTypeDef

HAL SPI State structure definition.

Enumerator
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing

Definition at line 90 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h.

HAL_SPI_StateTypeDef [3/4]

enum HAL_SPI_StateTypeDef

HAL SPI State structure definition.

Enumerator
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing

Definition at line 101 of file stm32f7xx_hal_spi.h.

HAL_SPI_StateTypeDef [4/4]

enum HAL_SPI_StateTypeDef

HAL SPI State structure definition.

Enumerator
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing
HAL_SPI_STATE_RESET	Peripheral not Initialized
HAL_SPI_STATE_READY	Peripheral Initialized and ready for use
HAL_SPI_STATE_BUSY	an internal process is ongoing
HAL_SPI_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_SPI_STATE_BUSY_RX	Data Reception process is ongoing
HAL_SPI_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_SPI_STATE_ERROR	SPI error state
HAL_SPI_STATE_ABORT	SPI abort is ongoing

Definition at line 131 of file stm32h7xx_hal_spi.h.