Macros
Collaboration diagram for RCC SYS Clock Source:

Macros

#define RCC_SYSCLK_DIV1   RCC_CDCFGR1_CDCPRE_DIV1
 
#define RCC_SYSCLK_DIV1   RCC_CDCFGR1_CDCPRE_DIV1
 
#define RCC_SYSCLK_DIV128   RCC_CDCFGR1_CDCPRE_DIV128
 
#define RCC_SYSCLK_DIV128   RCC_CDCFGR1_CDCPRE_DIV128
 
#define RCC_SYSCLK_DIV16   RCC_CDCFGR1_CDCPRE_DIV16
 
#define RCC_SYSCLK_DIV16   RCC_CDCFGR1_CDCPRE_DIV16
 
#define RCC_SYSCLK_DIV2   RCC_CDCFGR1_CDCPRE_DIV2
 
#define RCC_SYSCLK_DIV2   RCC_CDCFGR1_CDCPRE_DIV2
 
#define RCC_SYSCLK_DIV256   RCC_CDCFGR1_CDCPRE_DIV256
 
#define RCC_SYSCLK_DIV256   RCC_CDCFGR1_CDCPRE_DIV256
 
#define RCC_SYSCLK_DIV4   RCC_CDCFGR1_CDCPRE_DIV4
 
#define RCC_SYSCLK_DIV4   RCC_CDCFGR1_CDCPRE_DIV4
 
#define RCC_SYSCLK_DIV512   RCC_CDCFGR1_CDCPRE_DIV512
 
#define RCC_SYSCLK_DIV512   RCC_CDCFGR1_CDCPRE_DIV512
 
#define RCC_SYSCLK_DIV64   RCC_CDCFGR1_CDCPRE_DIV64
 
#define RCC_SYSCLK_DIV64   RCC_CDCFGR1_CDCPRE_DIV64
 
#define RCC_SYSCLK_DIV8   RCC_CDCFGR1_CDCPRE_DIV8
 
#define RCC_SYSCLK_DIV8   RCC_CDCFGR1_CDCPRE_DIV8
 

Detailed Description

Macro Definition Documentation

◆ RCC_SYSCLK_DIV1 [1/2]

#define RCC_SYSCLK_DIV1   RCC_CDCFGR1_CDCPRE_DIV1

◆ RCC_SYSCLK_DIV1 [2/2]

#define RCC_SYSCLK_DIV1   RCC_CDCFGR1_CDCPRE_DIV1

◆ RCC_SYSCLK_DIV128 [1/2]

#define RCC_SYSCLK_DIV128   RCC_CDCFGR1_CDCPRE_DIV128

◆ RCC_SYSCLK_DIV128 [2/2]

#define RCC_SYSCLK_DIV128   RCC_CDCFGR1_CDCPRE_DIV128

◆ RCC_SYSCLK_DIV16 [1/2]

#define RCC_SYSCLK_DIV16   RCC_CDCFGR1_CDCPRE_DIV16

◆ RCC_SYSCLK_DIV16 [2/2]

#define RCC_SYSCLK_DIV16   RCC_CDCFGR1_CDCPRE_DIV16

◆ RCC_SYSCLK_DIV2 [1/2]

#define RCC_SYSCLK_DIV2   RCC_CDCFGR1_CDCPRE_DIV2

◆ RCC_SYSCLK_DIV2 [2/2]

#define RCC_SYSCLK_DIV2   RCC_CDCFGR1_CDCPRE_DIV2

◆ RCC_SYSCLK_DIV256 [1/2]

#define RCC_SYSCLK_DIV256   RCC_CDCFGR1_CDCPRE_DIV256

◆ RCC_SYSCLK_DIV256 [2/2]

#define RCC_SYSCLK_DIV256   RCC_CDCFGR1_CDCPRE_DIV256

◆ RCC_SYSCLK_DIV4 [1/2]

#define RCC_SYSCLK_DIV4   RCC_CDCFGR1_CDCPRE_DIV4

◆ RCC_SYSCLK_DIV4 [2/2]

#define RCC_SYSCLK_DIV4   RCC_CDCFGR1_CDCPRE_DIV4

◆ RCC_SYSCLK_DIV512 [1/2]

#define RCC_SYSCLK_DIV512   RCC_CDCFGR1_CDCPRE_DIV512

◆ RCC_SYSCLK_DIV512 [2/2]

#define RCC_SYSCLK_DIV512   RCC_CDCFGR1_CDCPRE_DIV512

◆ RCC_SYSCLK_DIV64 [1/2]

#define RCC_SYSCLK_DIV64   RCC_CDCFGR1_CDCPRE_DIV64

◆ RCC_SYSCLK_DIV64 [2/2]

#define RCC_SYSCLK_DIV64   RCC_CDCFGR1_CDCPRE_DIV64

◆ RCC_SYSCLK_DIV8 [1/2]

#define RCC_SYSCLK_DIV8   RCC_CDCFGR1_CDCPRE_DIV8

◆ RCC_SYSCLK_DIV8 [2/2]

#define RCC_SYSCLK_DIV8   RCC_CDCFGR1_CDCPRE_DIV8


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:08