Macros
Collaboration diagram for RCC PLL3 VCI Range:

Macros

#define RCC_PLL3VCIRANGE_0   RCC_PLLCFGR_PLL3RGE_0
 
#define RCC_PLL3VCIRANGE_0   RCC_PLLCFGR_PLL3RGE_0
 
#define RCC_PLL3VCIRANGE_1   RCC_PLLCFGR_PLL3RGE_1
 
#define RCC_PLL3VCIRANGE_1   RCC_PLLCFGR_PLL3RGE_1
 
#define RCC_PLL3VCIRANGE_2   RCC_PLLCFGR_PLL3RGE_2
 
#define RCC_PLL3VCIRANGE_2   RCC_PLLCFGR_PLL3RGE_2
 
#define RCC_PLL3VCIRANGE_3   RCC_PLLCFGR_PLL3RGE_3
 
#define RCC_PLL3VCIRANGE_3   RCC_PLLCFGR_PLL3RGE_3
 

Detailed Description

Macro Definition Documentation

◆ RCC_PLL3VCIRANGE_0 [1/2]

#define RCC_PLL3VCIRANGE_0   RCC_PLLCFGR_PLL3RGE_0

Clock range frequency between 1 and 2 MHz

Definition at line 511 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.

◆ RCC_PLL3VCIRANGE_0 [2/2]

#define RCC_PLL3VCIRANGE_0   RCC_PLLCFGR_PLL3RGE_0

Clock range frequency between 1 and 2 MHz

Definition at line 511 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.

◆ RCC_PLL3VCIRANGE_1 [1/2]

#define RCC_PLL3VCIRANGE_1   RCC_PLLCFGR_PLL3RGE_1

Clock range frequency between 2 and 4 MHz

Definition at line 512 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.

◆ RCC_PLL3VCIRANGE_1 [2/2]

#define RCC_PLL3VCIRANGE_1   RCC_PLLCFGR_PLL3RGE_1

Clock range frequency between 2 and 4 MHz

Definition at line 512 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.

◆ RCC_PLL3VCIRANGE_2 [1/2]

#define RCC_PLL3VCIRANGE_2   RCC_PLLCFGR_PLL3RGE_2

Clock range frequency between 4 and 8 MHz

Definition at line 513 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.

◆ RCC_PLL3VCIRANGE_2 [2/2]

#define RCC_PLL3VCIRANGE_2   RCC_PLLCFGR_PLL3RGE_2

Clock range frequency between 4 and 8 MHz

Definition at line 513 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.

◆ RCC_PLL3VCIRANGE_3 [1/2]

#define RCC_PLL3VCIRANGE_3   RCC_PLLCFGR_PLL3RGE_3

Clock range frequency between 8 and 16 MHz

Definition at line 514 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.

◆ RCC_PLL3VCIRANGE_3 [2/2]

#define RCC_PLL3VCIRANGE_3   RCC_PLLCFGR_PLL3RGE_3

Clock range frequency between 8 and 16 MHz

Definition at line 514 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.



picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:08