Macros | |
| #define | RCC_PLL1VCIRANGE_0 RCC_PLLCFGR_PLL1RGE_0 |
| #define | RCC_PLL1VCIRANGE_0 RCC_PLLCFGR_PLL1RGE_0 |
| #define | RCC_PLL1VCIRANGE_1 RCC_PLLCFGR_PLL1RGE_1 |
| #define | RCC_PLL1VCIRANGE_1 RCC_PLLCFGR_PLL1RGE_1 |
| #define | RCC_PLL1VCIRANGE_2 RCC_PLLCFGR_PLL1RGE_2 |
| #define | RCC_PLL1VCIRANGE_2 RCC_PLLCFGR_PLL1RGE_2 |
| #define | RCC_PLL1VCIRANGE_3 RCC_PLLCFGR_PLL1RGE_3 |
| #define | RCC_PLL1VCIRANGE_3 RCC_PLLCFGR_PLL1RGE_3 |
Detailed Description
Macro Definition Documentation
◆ RCC_PLL1VCIRANGE_0 [1/2]
| #define RCC_PLL1VCIRANGE_0 RCC_PLLCFGR_PLL1RGE_0 |
Clock range frequency between 1 and 2 MHz
Definition at line 289 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h.
◆ RCC_PLL1VCIRANGE_0 [2/2]
| #define RCC_PLL1VCIRANGE_0 RCC_PLLCFGR_PLL1RGE_0 |
Clock range frequency between 1 and 2 MHz
Definition at line 289 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h.
◆ RCC_PLL1VCIRANGE_1 [1/2]
| #define RCC_PLL1VCIRANGE_1 RCC_PLLCFGR_PLL1RGE_1 |
Clock range frequency between 2 and 4 MHz
Definition at line 290 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h.
◆ RCC_PLL1VCIRANGE_1 [2/2]
| #define RCC_PLL1VCIRANGE_1 RCC_PLLCFGR_PLL1RGE_1 |
Clock range frequency between 2 and 4 MHz
Definition at line 290 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h.
◆ RCC_PLL1VCIRANGE_2 [1/2]
| #define RCC_PLL1VCIRANGE_2 RCC_PLLCFGR_PLL1RGE_2 |
Clock range frequency between 4 and 8 MHz
Definition at line 291 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h.
◆ RCC_PLL1VCIRANGE_2 [2/2]
| #define RCC_PLL1VCIRANGE_2 RCC_PLLCFGR_PLL1RGE_2 |
Clock range frequency between 4 and 8 MHz
Definition at line 291 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h.
◆ RCC_PLL1VCIRANGE_3 [1/2]
| #define RCC_PLL1VCIRANGE_3 RCC_PLLCFGR_PLL1RGE_3 |
Clock range frequency between 8 and 16 MHz
Definition at line 292 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h.
◆ RCC_PLL1VCIRANGE_3 [2/2]
| #define RCC_PLL1VCIRANGE_3 RCC_PLLCFGR_PLL1RGE_3 |
Clock range frequency between 8 and 16 MHz
Definition at line 292 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h.