Macros
Collaboration diagram for AHB Clock Source:

Macros

#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1
 
#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1
 
#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1
 
#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1
 
#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128
 
#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128
 
#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128
 
#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128
 
#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16
 
#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16
 
#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16
 
#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16
 
#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2
 
#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2
 
#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2
 
#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2
 
#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256
 
#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256
 
#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256
 
#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256
 
#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4
 
#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4
 
#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4
 
#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4
 
#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512
 
#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512
 
#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512
 
#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512
 
#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64
 
#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64
 
#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64
 
#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64
 
#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8
 
#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8
 
#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8
 
#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8
 

Detailed Description

Macro Definition Documentation

◆ RCC_SYSCLK_DIV1 [1/4]

#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1

Definition at line 224 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV1 [2/4]

#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1

◆ RCC_SYSCLK_DIV1 [3/4]

#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1

◆ RCC_SYSCLK_DIV1 [4/4]

#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1

◆ RCC_SYSCLK_DIV128 [1/4]

#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128

Definition at line 230 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV128 [2/4]

#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128

◆ RCC_SYSCLK_DIV128 [3/4]

#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128

◆ RCC_SYSCLK_DIV128 [4/4]

#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128

◆ RCC_SYSCLK_DIV16 [1/4]

#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16

Definition at line 228 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV16 [2/4]

#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16

◆ RCC_SYSCLK_DIV16 [3/4]

#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16

◆ RCC_SYSCLK_DIV16 [4/4]

#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16

◆ RCC_SYSCLK_DIV2 [1/4]

#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2

Definition at line 225 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV2 [2/4]

#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2

◆ RCC_SYSCLK_DIV2 [3/4]

#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2

◆ RCC_SYSCLK_DIV2 [4/4]

#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2

◆ RCC_SYSCLK_DIV256 [1/4]

#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256

Definition at line 231 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV256 [2/4]

#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256

◆ RCC_SYSCLK_DIV256 [3/4]

#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256

◆ RCC_SYSCLK_DIV256 [4/4]

#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256

◆ RCC_SYSCLK_DIV4 [1/4]

#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4

Definition at line 226 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV4 [2/4]

#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4

◆ RCC_SYSCLK_DIV4 [3/4]

#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4

◆ RCC_SYSCLK_DIV4 [4/4]

#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4

◆ RCC_SYSCLK_DIV512 [1/4]

#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512

Definition at line 232 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV512 [2/4]

#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512

◆ RCC_SYSCLK_DIV512 [3/4]

#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512

◆ RCC_SYSCLK_DIV512 [4/4]

#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512

◆ RCC_SYSCLK_DIV64 [1/4]

#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64

Definition at line 229 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV64 [2/4]

#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64

◆ RCC_SYSCLK_DIV64 [3/4]

#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64

◆ RCC_SYSCLK_DIV64 [4/4]

#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64

◆ RCC_SYSCLK_DIV8 [1/4]

#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8

Definition at line 227 of file stm32f7xx_hal_rcc.h.

◆ RCC_SYSCLK_DIV8 [2/4]

#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8

◆ RCC_SYSCLK_DIV8 [3/4]

#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8

◆ RCC_SYSCLK_DIV8 [4/4]

#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:06