Macros
Collaboration diagram for SPI4/5 Clock Source:

Macros

#define RCC_SPI45CLKSOURCE_CDPCLK1   (0x00000000U)
 
#define RCC_SPI45CLKSOURCE_CDPCLK1   (0x00000000U)
 
#define RCC_SPI45CLKSOURCE_CSI   RCC_CDCCIP1R_SPI45SEL_2
 
#define RCC_SPI45CLKSOURCE_CSI   RCC_CDCCIP1R_SPI45SEL_2
 
#define RCC_SPI45CLKSOURCE_D2PCLK1   RCC_SPI45CLKSOURCE_CDPCLK1 /* D2PCLK1 is used in STM32H74xxx, STM32H75xxx, STM32H72xxx and STM32H73xxx family lines */
 
#define RCC_SPI45CLKSOURCE_D2PCLK1   RCC_SPI45CLKSOURCE_CDPCLK1 /* D2PCLK1 is used in STM32H74xxx, STM32H75xxx, STM32H72xxx and STM32H73xxx family lines */
 
#define RCC_SPI45CLKSOURCE_HSE   (RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_2)
 
#define RCC_SPI45CLKSOURCE_HSE   (RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_2)
 
#define RCC_SPI45CLKSOURCE_HSI   (RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_1)
 
#define RCC_SPI45CLKSOURCE_HSI   (RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_1)
 
#define RCC_SPI45CLKSOURCE_PCLK1   RCC_SPI45CLKSOURCE_CDPCLK1
 
#define RCC_SPI45CLKSOURCE_PCLK1   RCC_SPI45CLKSOURCE_CDPCLK1
 
#define RCC_SPI45CLKSOURCE_PLL2   RCC_CDCCIP1R_SPI45SEL_0
 
#define RCC_SPI45CLKSOURCE_PLL2   RCC_CDCCIP1R_SPI45SEL_0
 
#define RCC_SPI45CLKSOURCE_PLL3   RCC_CDCCIP1R_SPI45SEL_1
 
#define RCC_SPI45CLKSOURCE_PLL3   RCC_CDCCIP1R_SPI45SEL_1
 

Detailed Description

Macro Definition Documentation

◆ RCC_SPI45CLKSOURCE_CDPCLK1 [1/2]

#define RCC_SPI45CLKSOURCE_CDPCLK1   (0x00000000U)

◆ RCC_SPI45CLKSOURCE_CDPCLK1 [2/2]

#define RCC_SPI45CLKSOURCE_CDPCLK1   (0x00000000U)

◆ RCC_SPI45CLKSOURCE_CSI [1/2]

#define RCC_SPI45CLKSOURCE_CSI   RCC_CDCCIP1R_SPI45SEL_2

◆ RCC_SPI45CLKSOURCE_CSI [2/2]

#define RCC_SPI45CLKSOURCE_CSI   RCC_CDCCIP1R_SPI45SEL_2

◆ RCC_SPI45CLKSOURCE_D2PCLK1 [1/2]

#define RCC_SPI45CLKSOURCE_D2PCLK1   RCC_SPI45CLKSOURCE_CDPCLK1 /* D2PCLK1 is used in STM32H74xxx, STM32H75xxx, STM32H72xxx and STM32H73xxx family lines */

◆ RCC_SPI45CLKSOURCE_D2PCLK1 [2/2]

#define RCC_SPI45CLKSOURCE_D2PCLK1   RCC_SPI45CLKSOURCE_CDPCLK1 /* D2PCLK1 is used in STM32H74xxx, STM32H75xxx, STM32H72xxx and STM32H73xxx family lines */

◆ RCC_SPI45CLKSOURCE_HSE [1/2]

#define RCC_SPI45CLKSOURCE_HSE   (RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_2)

◆ RCC_SPI45CLKSOURCE_HSE [2/2]

#define RCC_SPI45CLKSOURCE_HSE   (RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_2)

◆ RCC_SPI45CLKSOURCE_HSI [1/2]

#define RCC_SPI45CLKSOURCE_HSI   (RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_1)

◆ RCC_SPI45CLKSOURCE_HSI [2/2]

#define RCC_SPI45CLKSOURCE_HSI   (RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_1)

◆ RCC_SPI45CLKSOURCE_PCLK1 [1/2]

#define RCC_SPI45CLKSOURCE_PCLK1   RCC_SPI45CLKSOURCE_CDPCLK1

◆ RCC_SPI45CLKSOURCE_PCLK1 [2/2]

#define RCC_SPI45CLKSOURCE_PCLK1   RCC_SPI45CLKSOURCE_CDPCLK1

◆ RCC_SPI45CLKSOURCE_PLL2 [1/2]

#define RCC_SPI45CLKSOURCE_PLL2   RCC_CDCCIP1R_SPI45SEL_0

◆ RCC_SPI45CLKSOURCE_PLL2 [2/2]

#define RCC_SPI45CLKSOURCE_PLL2   RCC_CDCCIP1R_SPI45SEL_0

◆ RCC_SPI45CLKSOURCE_PLL3 [1/2]

#define RCC_SPI45CLKSOURCE_PLL3   RCC_CDCCIP1R_SPI45SEL_1

◆ RCC_SPI45CLKSOURCE_PLL3 [2/2]

#define RCC_SPI45CLKSOURCE_PLL3   RCC_CDCCIP1R_SPI45SEL_1


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:08