Macros
Collaboration diagram for RCCEx LPUART1 Clock Source:

Macros

#define RCC_LPUART1CLKSOURCE_CSI   RCC_SRDCCIPR_LPUART1SEL_2
 
#define RCC_LPUART1CLKSOURCE_CSI   RCC_SRDCCIPR_LPUART1SEL_2
 
#define RCC_LPUART1CLKSOURCE_D3PCLK1   RCC_LPUART1CLKSOURCE_SRDPCLK4
 
#define RCC_LPUART1CLKSOURCE_D3PCLK1   RCC_LPUART1CLKSOURCE_SRDPCLK4
 
#define RCC_LPUART1CLKSOURCE_HSI   (RCC_SRDCCIPR_LPUART1SEL_0 | RCC_SRDCCIPR_LPUART1SEL_1)
 
#define RCC_LPUART1CLKSOURCE_HSI   (RCC_SRDCCIPR_LPUART1SEL_0 | RCC_SRDCCIPR_LPUART1SEL_1)
 
#define RCC_LPUART1CLKSOURCE_LSE   (RCC_SRDCCIPR_LPUART1SEL_2 | RCC_SRDCCIPR_LPUART1SEL_0)
 
#define RCC_LPUART1CLKSOURCE_LSE   (RCC_SRDCCIPR_LPUART1SEL_2 | RCC_SRDCCIPR_LPUART1SEL_0)
 
#define RCC_LPUART1CLKSOURCE_PCLK4   RCC_LPUART1CLKSOURCE_SRDPCLK4
 
#define RCC_LPUART1CLKSOURCE_PCLK4   RCC_LPUART1CLKSOURCE_SRDPCLK4
 
#define RCC_LPUART1CLKSOURCE_PLL2   RCC_SRDCCIPR_LPUART1SEL_0
 
#define RCC_LPUART1CLKSOURCE_PLL2   RCC_SRDCCIPR_LPUART1SEL_0
 
#define RCC_LPUART1CLKSOURCE_PLL3   RCC_SRDCCIPR_LPUART1SEL_1
 
#define RCC_LPUART1CLKSOURCE_PLL3   RCC_SRDCCIPR_LPUART1SEL_1
 
#define RCC_LPUART1CLKSOURCE_SRDPCLK4   (0x00000000U)
 
#define RCC_LPUART1CLKSOURCE_SRDPCLK4   (0x00000000U)
 

Detailed Description

Macro Definition Documentation

◆ RCC_LPUART1CLKSOURCE_CSI [1/2]

#define RCC_LPUART1CLKSOURCE_CSI   RCC_SRDCCIPR_LPUART1SEL_2

◆ RCC_LPUART1CLKSOURCE_CSI [2/2]

#define RCC_LPUART1CLKSOURCE_CSI   RCC_SRDCCIPR_LPUART1SEL_2

◆ RCC_LPUART1CLKSOURCE_D3PCLK1 [1/2]

#define RCC_LPUART1CLKSOURCE_D3PCLK1   RCC_LPUART1CLKSOURCE_SRDPCLK4

◆ RCC_LPUART1CLKSOURCE_D3PCLK1 [2/2]

#define RCC_LPUART1CLKSOURCE_D3PCLK1   RCC_LPUART1CLKSOURCE_SRDPCLK4

◆ RCC_LPUART1CLKSOURCE_HSI [1/2]

#define RCC_LPUART1CLKSOURCE_HSI   (RCC_SRDCCIPR_LPUART1SEL_0 | RCC_SRDCCIPR_LPUART1SEL_1)

◆ RCC_LPUART1CLKSOURCE_HSI [2/2]

#define RCC_LPUART1CLKSOURCE_HSI   (RCC_SRDCCIPR_LPUART1SEL_0 | RCC_SRDCCIPR_LPUART1SEL_1)

◆ RCC_LPUART1CLKSOURCE_LSE [1/2]

#define RCC_LPUART1CLKSOURCE_LSE   (RCC_SRDCCIPR_LPUART1SEL_2 | RCC_SRDCCIPR_LPUART1SEL_0)

◆ RCC_LPUART1CLKSOURCE_LSE [2/2]

#define RCC_LPUART1CLKSOURCE_LSE   (RCC_SRDCCIPR_LPUART1SEL_2 | RCC_SRDCCIPR_LPUART1SEL_0)

◆ RCC_LPUART1CLKSOURCE_PCLK4 [1/2]

#define RCC_LPUART1CLKSOURCE_PCLK4   RCC_LPUART1CLKSOURCE_SRDPCLK4

◆ RCC_LPUART1CLKSOURCE_PCLK4 [2/2]

#define RCC_LPUART1CLKSOURCE_PCLK4   RCC_LPUART1CLKSOURCE_SRDPCLK4

◆ RCC_LPUART1CLKSOURCE_PLL2 [1/2]

#define RCC_LPUART1CLKSOURCE_PLL2   RCC_SRDCCIPR_LPUART1SEL_0

◆ RCC_LPUART1CLKSOURCE_PLL2 [2/2]

#define RCC_LPUART1CLKSOURCE_PLL2   RCC_SRDCCIPR_LPUART1SEL_0

◆ RCC_LPUART1CLKSOURCE_PLL3 [1/2]

#define RCC_LPUART1CLKSOURCE_PLL3   RCC_SRDCCIPR_LPUART1SEL_1

◆ RCC_LPUART1CLKSOURCE_PLL3 [2/2]

#define RCC_LPUART1CLKSOURCE_PLL3   RCC_SRDCCIPR_LPUART1SEL_1

◆ RCC_LPUART1CLKSOURCE_SRDPCLK4 [1/2]

#define RCC_LPUART1CLKSOURCE_SRDPCLK4   (0x00000000U)

◆ RCC_LPUART1CLKSOURCE_SRDPCLK4 [2/2]

#define RCC_LPUART1CLKSOURCE_SRDPCLK4   (0x00000000U)


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:08