Macros
Collaboration diagram for RCCEx LPTIM3/4/5 Clock Source:

Macros

#define RCC_LPTIM345CLKSOURCE_CLKP   (RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_2)
 
#define RCC_LPTIM345CLKSOURCE_CLKP   (RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_2)
 
#define RCC_LPTIM345CLKSOURCE_D3PCLK1   RCC_LPTIM345CLKSOURCE_SRDPCLK4
 
#define RCC_LPTIM345CLKSOURCE_D3PCLK1   RCC_LPTIM345CLKSOURCE_SRDPCLK4
 
#define RCC_LPTIM345CLKSOURCE_LSE   (RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_1)
 
#define RCC_LPTIM345CLKSOURCE_LSE   (RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_1)
 
#define RCC_LPTIM345CLKSOURCE_LSI   RCC_SRDCCIPR_LPTIM3SEL_2
 
#define RCC_LPTIM345CLKSOURCE_LSI   RCC_SRDCCIPR_LPTIM3SEL_2
 
#define RCC_LPTIM345CLKSOURCE_PCLK4   RCC_LPTIM345CLKSOURCE_SRDPCLK4
 
#define RCC_LPTIM345CLKSOURCE_PCLK4   RCC_LPTIM345CLKSOURCE_SRDPCLK4
 
#define RCC_LPTIM345CLKSOURCE_PLL2   RCC_SRDCCIPR_LPTIM3SEL_0
 
#define RCC_LPTIM345CLKSOURCE_PLL2   RCC_SRDCCIPR_LPTIM3SEL_0
 
#define RCC_LPTIM345CLKSOURCE_PLL3   RCC_SRDCCIPR_LPTIM3SEL_1
 
#define RCC_LPTIM345CLKSOURCE_PLL3   RCC_SRDCCIPR_LPTIM3SEL_1
 
#define RCC_LPTIM345CLKSOURCE_SRDPCLK4   (0x00000000U)
 
#define RCC_LPTIM345CLKSOURCE_SRDPCLK4   (0x00000000U)
 

Detailed Description

Macro Definition Documentation

◆ RCC_LPTIM345CLKSOURCE_CLKP [1/2]

#define RCC_LPTIM345CLKSOURCE_CLKP   (RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_2)

◆ RCC_LPTIM345CLKSOURCE_CLKP [2/2]

#define RCC_LPTIM345CLKSOURCE_CLKP   (RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_2)

◆ RCC_LPTIM345CLKSOURCE_D3PCLK1 [1/2]

#define RCC_LPTIM345CLKSOURCE_D3PCLK1   RCC_LPTIM345CLKSOURCE_SRDPCLK4

◆ RCC_LPTIM345CLKSOURCE_D3PCLK1 [2/2]

#define RCC_LPTIM345CLKSOURCE_D3PCLK1   RCC_LPTIM345CLKSOURCE_SRDPCLK4

◆ RCC_LPTIM345CLKSOURCE_LSE [1/2]

#define RCC_LPTIM345CLKSOURCE_LSE   (RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_1)

◆ RCC_LPTIM345CLKSOURCE_LSE [2/2]

#define RCC_LPTIM345CLKSOURCE_LSE   (RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_1)

◆ RCC_LPTIM345CLKSOURCE_LSI [1/2]

#define RCC_LPTIM345CLKSOURCE_LSI   RCC_SRDCCIPR_LPTIM3SEL_2

◆ RCC_LPTIM345CLKSOURCE_LSI [2/2]

#define RCC_LPTIM345CLKSOURCE_LSI   RCC_SRDCCIPR_LPTIM3SEL_2

◆ RCC_LPTIM345CLKSOURCE_PCLK4 [1/2]

#define RCC_LPTIM345CLKSOURCE_PCLK4   RCC_LPTIM345CLKSOURCE_SRDPCLK4

◆ RCC_LPTIM345CLKSOURCE_PCLK4 [2/2]

#define RCC_LPTIM345CLKSOURCE_PCLK4   RCC_LPTIM345CLKSOURCE_SRDPCLK4

◆ RCC_LPTIM345CLKSOURCE_PLL2 [1/2]

#define RCC_LPTIM345CLKSOURCE_PLL2   RCC_SRDCCIPR_LPTIM3SEL_0

◆ RCC_LPTIM345CLKSOURCE_PLL2 [2/2]

#define RCC_LPTIM345CLKSOURCE_PLL2   RCC_SRDCCIPR_LPTIM3SEL_0

◆ RCC_LPTIM345CLKSOURCE_PLL3 [1/2]

#define RCC_LPTIM345CLKSOURCE_PLL3   RCC_SRDCCIPR_LPTIM3SEL_1

◆ RCC_LPTIM345CLKSOURCE_PLL3 [2/2]

#define RCC_LPTIM345CLKSOURCE_PLL3   RCC_SRDCCIPR_LPTIM3SEL_1

◆ RCC_LPTIM345CLKSOURCE_SRDPCLK4 [1/2]

#define RCC_LPTIM345CLKSOURCE_SRDPCLK4   (0x00000000U)

◆ RCC_LPTIM345CLKSOURCE_SRDPCLK4 [2/2]

#define RCC_LPTIM345CLKSOURCE_SRDPCLK4   (0x00000000U)


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:09