Macros | |
| #define | __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) |
| Enable or disable the automatic hardware adjustment of TRIM bits. More... | |
| #define | __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) |
| Enable or disable the automatic hardware adjustment of TRIM bits. More... | |
| #define | __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE() SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) |
| Enable the automatic hardware adjustment of TRIM bits. More... | |
| #define | __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE() SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) |
| Enable the automatic hardware adjustment of TRIM bits. More... | |
| #define | __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_CEN) |
| Disable the oscillator clock for frequency error counter. More... | |
| #define | __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_CEN) |
| Disable the oscillator clock for frequency error counter. More... | |
| #define | __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE() SET_BIT(CRS->CR, CRS_CR_CEN) |
| Enable the oscillator clock for frequency error counter. More... | |
| #define | __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE() SET_BIT(CRS->CR, CRS_CR_CEN) |
| Enable the oscillator clock for frequency error counter. More... | |
| #define | __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U) |
| Macro to calculate reload value to be set in CRS register according to target and sync frequencies. More... | |
| #define | __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U) |
| Macro to calculate reload value to be set in CRS register according to target and sync frequencies. More... | |
Detailed Description
Macro Definition Documentation
◆ __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE [1/2]
| #define __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE | ( | ) | CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) |
Enable or disable the automatic hardware adjustment of TRIM bits.
- Return values
-
None
Definition at line 3859 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE [2/2]
| #define __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE | ( | ) | CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) |
Enable or disable the automatic hardware adjustment of TRIM bits.
- Return values
-
None
Definition at line 3863 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE [1/2]
| #define __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE | ( | ) | SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) |
Enable the automatic hardware adjustment of TRIM bits.
- Note
- When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected.
- Return values
-
None
Definition at line 3853 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE [2/2]
| #define __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE | ( | ) | SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) |
Enable the automatic hardware adjustment of TRIM bits.
- Note
- When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected.
- Return values
-
None
Definition at line 3857 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE [1/2]
| #define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE | ( | ) | CLEAR_BIT(CRS->CR, CRS_CR_CEN) |
Disable the oscillator clock for frequency error counter.
- Return values
-
None
Definition at line 3846 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE [2/2]
| #define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE | ( | ) | CLEAR_BIT(CRS->CR, CRS_CR_CEN) |
Disable the oscillator clock for frequency error counter.
- Return values
-
None
Definition at line 3850 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE [1/2]
| #define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE | ( | ) | SET_BIT(CRS->CR, CRS_CR_CEN) |
Enable the oscillator clock for frequency error counter.
- Note
- when the CEN bit is set the CRS_CFGR register becomes write-protected.
- Return values
-
None
Definition at line 3840 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE [2/2]
| #define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE | ( | ) | SET_BIT(CRS->CR, CRS_CR_CEN) |
Enable the oscillator clock for frequency error counter.
- Note
- when the CEN bit is set the CRS_CFGR register becomes write-protected.
- Return values
-
None
Definition at line 3844 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_RELOADVALUE_CALCULATE [1/2]
| #define __HAL_RCC_CRS_RELOADVALUE_CALCULATE | ( | __FTARGET__, | |
| __FSYNC__ | |||
| ) | (((__FTARGET__) / (__FSYNC__)) - 1U) |
Macro to calculate reload value to be set in CRS register according to target and sync frequencies.
- Note
- The RELOAD value should be selected according to the ratio between the target frequency and the frequency of the synchronization source after pre-scaling. It is then decreased by one in order to reach the expected synchronization on the zero value. The formula is the following: RELOAD = (fTARGET / fSYNC) -1
- Parameters
-
<strong>FTARGET</strong> Target frequency (value in Hz) <strong>FSYNC</strong> Synchronization signal frequency (value in Hz)
- Return values
-
None
Definition at line 3871 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.
◆ __HAL_RCC_CRS_RELOADVALUE_CALCULATE [2/2]
| #define __HAL_RCC_CRS_RELOADVALUE_CALCULATE | ( | __FTARGET__, | |
| __FSYNC__ | |||
| ) | (((__FTARGET__) / (__FSYNC__)) - 1U) |
Macro to calculate reload value to be set in CRS register according to target and sync frequencies.
- Note
- The RELOAD value should be selected according to the ratio between the target frequency and the frequency of the synchronization source after pre-scaling. It is then decreased by one in order to reach the expected synchronization on the zero value. The formula is the following: RELOAD = (fTARGET / fSYNC) -1
- Parameters
-
<strong>FTARGET</strong> Target frequency (value in Hz) <strong>FSYNC</strong> Synchronization signal frequency (value in Hz)
- Return values
-
None
Definition at line 3875 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h.