I2S Exported Types

Collaboration diagram for I2S Exported Types:

Classes
struct	__I2S_HandleTypeDef
	I2S handle Structure definition. More...
struct	I2S_HandleTypeDef
	I2S handle Structure definition. More...
struct	I2S_InitTypeDef
	I2S Init structure definition. More...

Typedefs
typedef struct __I2S_HandleTypeDef	I2S_HandleTypeDef
	I2S handle Structure definition. More...
typedef struct __I2S_HandleTypeDef	I2S_HandleTypeDef
	I2S handle Structure definition. More...
typedef struct __I2S_HandleTypeDef	I2S_HandleTypeDef
	I2S handle Structure definition. More...
typedef struct __I2S_HandleTypeDef	I2S_HandleTypeDef
	I2S handle Structure definition. More...

Enumerations
enum	HAL_I2S_StateTypeDef {   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U, HAL_I2S_STATE_RESET = 0x00UL,   HAL_I2S_STATE_READY = 0x01UL, HAL_I2S_STATE_BUSY = 0x02UL, HAL_I2S_STATE_BUSY_TX = 0x03UL, HAL_I2S_STATE_BUSY_RX = 0x04UL,   HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, HAL_I2S_STATE_TIMEOUT = 0x06UL, HAL_I2S_STATE_ERROR = 0x07UL }
	HAL State structures definition. More...
enum	HAL_I2S_StateTypeDef {   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U, HAL_I2S_STATE_RESET = 0x00UL,   HAL_I2S_STATE_READY = 0x01UL, HAL_I2S_STATE_BUSY = 0x02UL, HAL_I2S_STATE_BUSY_TX = 0x03UL, HAL_I2S_STATE_BUSY_RX = 0x04UL,   HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, HAL_I2S_STATE_TIMEOUT = 0x06UL, HAL_I2S_STATE_ERROR = 0x07UL }
	HAL State structures definition. More...
enum	HAL_I2S_StateTypeDef {   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U, HAL_I2S_STATE_RESET = 0x00UL,   HAL_I2S_STATE_READY = 0x01UL, HAL_I2S_STATE_BUSY = 0x02UL, HAL_I2S_STATE_BUSY_TX = 0x03UL, HAL_I2S_STATE_BUSY_RX = 0x04UL,   HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, HAL_I2S_STATE_TIMEOUT = 0x06UL, HAL_I2S_STATE_ERROR = 0x07UL }
	HAL State structures definition. More...
enum	HAL_I2S_StateTypeDef {   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U, HAL_I2S_STATE_RESET = 0x00UL,   HAL_I2S_STATE_READY = 0x01UL, HAL_I2S_STATE_BUSY = 0x02UL, HAL_I2S_STATE_BUSY_TX = 0x03UL, HAL_I2S_STATE_BUSY_RX = 0x04UL,   HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, HAL_I2S_STATE_TIMEOUT = 0x06UL, HAL_I2S_STATE_ERROR = 0x07UL }
	HAL State structures definition. More...
enum	HAL_I2S_StateTypeDef {   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_BUSY_TX_RX = 0x05U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U,   HAL_I2S_STATE_RESET = 0x00U, HAL_I2S_STATE_READY = 0x01U, HAL_I2S_STATE_BUSY = 0x02U, HAL_I2S_STATE_BUSY_TX = 0x03U,   HAL_I2S_STATE_BUSY_RX = 0x04U, HAL_I2S_STATE_TIMEOUT = 0x06U, HAL_I2S_STATE_ERROR = 0x07U, HAL_I2S_STATE_RESET = 0x00UL,   HAL_I2S_STATE_READY = 0x01UL, HAL_I2S_STATE_BUSY = 0x02UL, HAL_I2S_STATE_BUSY_TX = 0x03UL, HAL_I2S_STATE_BUSY_RX = 0x04UL,   HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, HAL_I2S_STATE_TIMEOUT = 0x06UL, HAL_I2S_STATE_ERROR = 0x07UL }
	HAL State structures definition. More...

Detailed Description

Typedef Documentation

I2S_HandleTypeDef [1/4]

typedef struct __I2S_HandleTypeDef I2S_HandleTypeDef

I2S handle Structure definition.

I2S_HandleTypeDef [2/4]

typedef struct __I2S_HandleTypeDef I2S_HandleTypeDef

I2S handle Structure definition.

I2S_HandleTypeDef [3/4]

typedef struct __I2S_HandleTypeDef I2S_HandleTypeDef

I2S handle Structure definition.

I2S_HandleTypeDef [4/4]

typedef struct __I2S_HandleTypeDef I2S_HandleTypeDef

I2S handle Structure definition.

Enumeration Type Documentation

HAL_I2S_StateTypeDef [1/5]

enum HAL_I2S_StateTypeDef

HAL State structures definition.

Enumerator
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state

Definition at line 74 of file stm32f7xx_hal_i2s.h.

HAL_I2S_StateTypeDef [2/5]

enum HAL_I2S_StateTypeDef

HAL State structures definition.

Enumerator
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state

Definition at line 76 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h.

HAL_I2S_StateTypeDef [3/5]

enum HAL_I2S_StateTypeDef

HAL State structures definition.

Enumerator
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state

Definition at line 76 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h.

HAL_I2S_StateTypeDef [4/5]

enum HAL_I2S_StateTypeDef

HAL State structures definition.

Enumerator
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state

Definition at line 76 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h.

HAL_I2S_StateTypeDef [5/5]

enum HAL_I2S_StateTypeDef

HAL State structures definition.

Enumerator
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state
HAL_I2S_STATE_RESET	I2S not yet initialized or disabled
HAL_I2S_STATE_READY	I2S initialized and ready for use
HAL_I2S_STATE_BUSY	I2S internal process is ongoing
HAL_I2S_STATE_BUSY_TX	Data Transmission process is ongoing
HAL_I2S_STATE_BUSY_RX	Data Reception process is ongoing
HAL_I2S_STATE_BUSY_TX_RX	Data Transmission and Reception process is ongoing
HAL_I2S_STATE_TIMEOUT	I2S timeout state
HAL_I2S_STATE_ERROR	I2S error state

Definition at line 84 of file stm32h7xx_hal_i2s.h.