fsl_wm8960.c
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1 /*
2  * Copyright (c) 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2019 NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 #include "fsl_wm8960.h"
9 
10 /*******************************************************************************
11  * Definitations
12  ******************************************************************************/
13 
14 /*******************************************************************************
15  * Prototypes
16  ******************************************************************************/
17 
18 /*******************************************************************************
19  * Variables
20  ******************************************************************************/
21 /*
22  * wm8960 register cache
23  * We can't read the WM8960 register space when we are
24  * using 2 wire for device control, so we cache them instead.
25  */
26 static const uint16_t wm8960_reg[WM8960_CACHEREGNUM] = {
27  0x0097, 0x0097, 0x0000, 0x0000, 0x0000, 0x0008, 0x0000, 0x000a, 0x01c0, 0x0000, 0x00ff, 0x00ff, 0x0000, 0x0000,
28  0x0000, 0x0000, 0x0000, 0x007b, 0x0100, 0x0032, 0x0000, 0x00c3, 0x00c3, 0x01c0, 0x0000, 0x0000, 0x0000, 0x0000,
29  0x0000, 0x0000, 0x0000, 0x0000, 0x0100, 0x0100, 0x0050, 0x0050, 0x0050, 0x0050, 0x0000, 0x0000, 0x0000, 0x0000,
30  0x0040, 0x0000, 0x0000, 0x0050, 0x0050, 0x0000, 0x0002, 0x0037, 0x004d, 0x0080, 0x0008, 0x0031, 0x0026, 0x00e9,
31 };
32 
33 static uint16_t reg_cache[WM8960_CACHEREGNUM];
34 
35 /*******************************************************************************
36  * Code
37  ******************************************************************************/
38 status_t WM8960_Init(wm8960_handle_t *handle, const wm8960_config_t *wm8960Config)
39 {
40  const wm8960_config_t *config = wm8960Config;
41  handle->config = config;
42 
43  /* i2c bus initialization */
44  if (CODEC_I2C_Init(handle->i2cHandle, config->i2cConfig.codecI2CInstance, WM8960_I2C_BAUDRATE,
45  config->i2cConfig.codecI2CSourceClock) != kStatus_HAL_I2cSuccess)
46  {
47  return kStatus_Fail;
48  }
49  /* load wm8960 register map */
50  memcpy(reg_cache, wm8960_reg, sizeof(wm8960_reg));
51 
52  /* Reset the codec */
53  WM8960_WriteReg(handle, WM8960_RESET, 0x00);
54  /*
55  * VMID=50K, Enable VREF, AINL, AINR, ADCL and ADCR
56  * I2S_IN (bit 0), I2S_OUT (bit 1), DAP (bit 4), DAC (bit 5), ADC (bit 6) are powered on
57  */
58  WM8960_WriteReg(handle, WM8960_POWER1, 0xFE);
59  /*
60  * Enable DACL, DACR, LOUT1, ROUT1, PLL down
61  */
62  WM8960_WriteReg(handle, WM8960_POWER2, 0x1E0);
63  /*
64  * Enable left and right channel input PGA, left and right output mixer
65  */
66  WM8960_WriteReg(handle, WM8960_POWER3, 0x3C);
67  /* ADC and DAC uses same clock */
68  WM8960_WriteReg(handle, WM8960_IFACE2, 0x40);
69  /* set data route */
70  WM8960_SetDataRoute(handle, config->route);
71  /* set data protocol */
72  WM8960_SetProtocol(handle, config->bus);
73  /* set master or slave */
74  WM8960_SetMasterSlave(handle, config->master_slave);
75  /* select left input */
76  WM8960_SetLeftInput(handle, config->leftInputSource);
77  /* select right input */
78  WM8960_SetRightInput(handle, config->rightInputSource);
79  /* speaker power */
80  if (config->enableSpeaker)
81  {
83  }
84 
85  WM8960_WriteReg(handle, WM8960_ADDCTL1, 0x0C0);
86  WM8960_WriteReg(handle, WM8960_ADDCTL4, 0x40);
87 
88  WM8960_WriteReg(handle, WM8960_BYPASS1, 0x0);
89  WM8960_WriteReg(handle, WM8960_BYPASS2, 0x0);
90  /*
91  * ADC volume, 0dB
92  */
93  WM8960_WriteReg(handle, WM8960_LADC, 0x1C3);
94  WM8960_WriteReg(handle, WM8960_RADC, 0x1C3);
95 
96  /*
97  * Digital DAC volume, 0dB
98  */
99  WM8960_WriteReg(handle, WM8960_LDAC, 0x1E0);
100  WM8960_WriteReg(handle, WM8960_RDAC, 0x1E0);
101 
102  /*
103  * Headphone volume, LOUT1 and ROUT1, 0dB
104  */
105  WM8960_WriteReg(handle, WM8960_LOUT1, 0x16F);
106  WM8960_WriteReg(handle, WM8960_ROUT1, 0x16F);
107 
108  /* Unmute DAC. */
109  WM8960_WriteReg(handle, WM8960_DACCTL1, 0x0000);
110  WM8960_WriteReg(handle, WM8960_LINVOL, 0x117);
111  WM8960_WriteReg(handle, WM8960_RINVOL, 0x117);
112 
113  return WM8960_ConfigDataFormat(handle, config->format.mclk_HZ, config->format.sampleRate, config->format.bitWidth);
114 }
115 
117 {
118  WM8960_SetModule(handle, kWM8960_ModuleADC, false);
119  WM8960_SetModule(handle, kWM8960_ModuleDAC, false);
120  WM8960_SetModule(handle, kWM8960_ModuleVREF, false);
121  WM8960_SetModule(handle, kWM8960_ModuleLineIn, false);
122  WM8960_SetModule(handle, kWM8960_ModuleLineOut, false);
123  WM8960_SetModule(handle, kWM8960_ModuleSpeaker, false);
124 
125  return CODEC_I2C_Deinit(handle->i2cHandle);
126 }
127 
128 void WM8960_SetMasterSlave(wm8960_handle_t *handle, bool master)
129 {
130  if (master == 1)
131  {
133  }
134  else
135  {
137  }
138 }
139 
141 {
143  switch (module)
144  {
145  case kWM8960_ModuleADC:
147  ((uint16_t)isEnabled << WM8960_POWER1_ADCL_SHIFT));
149  ((uint16_t)isEnabled << WM8960_POWER1_ADCR_SHIFT));
150  break;
151  case kWM8960_ModuleDAC:
153  ((uint16_t)isEnabled << WM8960_POWER2_DACL_SHIFT));
155  ((uint16_t)isEnabled << WM8960_POWER2_DACR_SHIFT));
156  break;
157  case kWM8960_ModuleVREF:
159  ((uint16_t)isEnabled << WM8960_POWER1_VREF_SHIFT));
160  break;
163  ((uint16_t)isEnabled << WM8960_POWER1_AINL_SHIFT));
165  ((uint16_t)isEnabled << WM8960_POWER1_AINR_SHIFT));
167  ((uint16_t)isEnabled << WM8960_POWER3_LMIC_SHIFT));
169  ((uint16_t)isEnabled << WM8960_POWER3_RMIC_SHIFT));
170  break;
173  ((uint16_t)isEnabled << WM8960_POWER2_LOUT1_SHIFT));
175  ((uint16_t)isEnabled << WM8960_POWER2_ROUT1_SHIFT));
176  break;
177  case kWM8960_ModuleMICB:
179  ((uint16_t)isEnabled << WM8960_POWER1_MICB_SHIFT));
180  break;
183  ((uint16_t)isEnabled << WM8960_POWER2_SPKL_SHIFT));
185  ((uint16_t)isEnabled << WM8960_POWER2_SPKR_SHIFT));
186  WM8960_WriteReg(handle, WM8960_CLASSD1, 0xF7);
187  break;
188  case kWM8960_ModuleOMIX:
190  ((uint16_t)isEnabled << WM8960_POWER3_LOMIX_SHIFT));
192  ((uint16_t)isEnabled << WM8960_POWER3_ROMIX_SHIFT));
193  break;
194  default:
196  break;
197  }
198  return ret;
199 }
200 
202 {
204  switch (route)
205  {
206  case kWM8960_RouteBypass:
207  /* Bypass means from line-in to HP*/
208  /*
209  * Left LINPUT3 to left output mixer, LINPUT3 left output mixer volume = 0dB
210  */
211  WM8960_WriteReg(handle, WM8960_LOUTMIX, 0x80);
212 
213  /*
214  * Right RINPUT3 to right output mixer, RINPUT3 right output mixer volume = 0dB
215  */
216  WM8960_WriteReg(handle, WM8960_ROUTMIX, 0x80);
217  break;
219  /* Data route I2S_IN-> DAC-> HP */
220  /*
221  * Left DAC to left output mixer, LINPUT3 left output mixer volume = 0dB
222  */
223  WM8960_WriteReg(handle, WM8960_LOUTMIX, 0x100);
224 
225  /*
226  * Right DAC to right output mixer, RINPUT3 right output mixer volume = 0dB
227  */
228  WM8960_WriteReg(handle, WM8960_ROUTMIX, 0x100);
229  WM8960_WriteReg(handle, WM8960_POWER3, 0x0C);
230  /* Set power for DAC */
231  WM8960_SetModule(handle, kWM8960_ModuleDAC, true);
232  WM8960_SetModule(handle, kWM8960_ModuleOMIX, true);
234  break;
236  /*
237  * Left DAC to left output mixer, LINPUT3 left output mixer volume = 0dB
238  */
239  WM8960_WriteReg(handle, WM8960_LOUTMIX, 0x100);
240 
241  /*
242  * Right DAC to right output mixer, RINPUT3 right output mixer volume = 0dB
243  */
244  WM8960_WriteReg(handle, WM8960_ROUTMIX, 0x100);
245  WM8960_WriteReg(handle, WM8960_POWER3, 0x3C);
246  WM8960_SetModule(handle, kWM8960_ModuleDAC, true);
247  WM8960_SetModule(handle, kWM8960_ModuleADC, true);
248  WM8960_SetModule(handle, kWM8960_ModuleLineIn, true);
249  WM8960_SetModule(handle, kWM8960_ModuleOMIX, true);
251  break;
252  case kWM8960_RouteRecord:
253  /* LINE_IN->ADC->I2S_OUT */
254  /*
255  * Left and right input boost, LIN3BOOST and RIN3BOOST = 0dB
256  */
257  WM8960_WriteReg(handle, WM8960_POWER3, 0x30);
258  /* Power up ADC and AIN */
259  WM8960_SetModule(handle, kWM8960_ModuleLineIn, true);
260  WM8960_SetModule(handle, kWM8960_ModuleADC, true);
261  break;
262  default:
264  break;
265  }
266  return ret;
267 }
268 
270 {
272  uint16_t val = 0;
273 
274  switch (input)
275  {
277  /* Only LMN1 enabled, LMICBOOST to 13db, LMIC2B enabled */
280  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
281  ret = WM8960_WriteReg(handle, WM8960_LINPATH, 0x138);
282  ret = WM8960_WriteReg(handle, WM8960_LINVOL, 0x117);
283  break;
287  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
288  ret = WM8960_WriteReg(handle, WM8960_LINPATH, 0x178);
289  ret = WM8960_WriteReg(handle, WM8960_LINVOL, 0x117);
290  break;
294  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
295  ret = WM8960_WriteReg(handle, WM8960_LINPATH, 0x1B8);
296  ret = WM8960_WriteReg(handle, WM8960_LINVOL, 0x117);
297  break;
301  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
303  val |= 0xE;
304  ret = WM8960_WriteReg(handle, WM8960_INBMIX1, val);
305  break;
309  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
311  val |= 0x70;
312  ret = WM8960_WriteReg(handle, WM8960_INBMIX1, val);
313  break;
314  default:
315  break;
316  }
317 
318  return ret;
319 }
320 
322 {
324  uint16_t val = 0;
325 
326  switch (input)
327  {
329  /* Only LMN1 enabled, LMICBOOST to 13db, LMIC2B enabled */
332  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
333  ret = WM8960_WriteReg(handle, WM8960_RINPATH, 0x138);
334  ret = WM8960_WriteReg(handle, WM8960_RINVOL, 0x117);
335  break;
339  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
340  ret = WM8960_WriteReg(handle, WM8960_RINPATH, 0x178);
341  ret = WM8960_WriteReg(handle, WM8960_RINVOL, 0x117);
342  break;
346  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
347  ret = WM8960_WriteReg(handle, WM8960_RINPATH, 0x1B8);
348  ret = WM8960_WriteReg(handle, WM8960_RINVOL, 0x117);
349  break;
353  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
355  val |= 0xE;
356  ret = WM8960_WriteReg(handle, WM8960_INBMIX2, val);
357  break;
361  ret = WM8960_WriteReg(handle, WM8960_POWER1, val);
363  val |= 0x70;
364  ret = WM8960_WriteReg(handle, WM8960_INBMIX2, val);
365  break;
366  default:
367  break;
368  }
369 
370  return ret;
371 }
372 
374 {
376 }
377 
378 status_t WM8960_SetVolume(wm8960_handle_t *handle, wm8960_module_t module, uint32_t volume)
379 {
380  uint16_t vol = 0;
382  switch (module)
383  {
384  case kWM8960_ModuleADC:
385  vol = volume;
386  ret = WM8960_WriteReg(handle, WM8960_LADC, vol);
387  ret = WM8960_WriteReg(handle, WM8960_RADC, vol);
388  /* Update volume */
389  vol = 0x100 | volume;
390  ret = WM8960_WriteReg(handle, WM8960_LADC, vol);
391  ret = WM8960_WriteReg(handle, WM8960_RADC, vol);
392  break;
393  case kWM8960_ModuleDAC:
394  vol = volume;
395  ret = WM8960_WriteReg(handle, WM8960_LDAC, vol);
396  ret = WM8960_WriteReg(handle, WM8960_RDAC, vol);
397  vol = 0x100 | volume;
398  ret = WM8960_WriteReg(handle, WM8960_LDAC, vol);
399  ret = WM8960_WriteReg(handle, WM8960_RDAC, vol);
400  break;
401  case kWM8960_ModuleHP:
402  vol = volume;
403  ret = WM8960_WriteReg(handle, WM8960_LOUT1, vol);
404  ret = WM8960_WriteReg(handle, WM8960_ROUT1, vol);
405  vol = 0x100 | volume;
406  ret = WM8960_WriteReg(handle, WM8960_LOUT1, vol);
407  ret = WM8960_WriteReg(handle, WM8960_ROUT1, vol);
408  break;
410  vol = volume;
411  ret = WM8960_WriteReg(handle, WM8960_LINVOL, vol);
412  ret = WM8960_WriteReg(handle, WM8960_RINVOL, vol);
413  vol = 0x100 | volume;
414  ret = WM8960_WriteReg(handle, WM8960_LINVOL, vol);
415  ret = WM8960_WriteReg(handle, WM8960_RINVOL, vol);
416  break;
418  vol = volume;
419  ret = WM8960_WriteReg(handle, WM8960_LOUT2, vol);
420  ret = WM8960_WriteReg(handle, WM8960_ROUT2, vol);
421  vol = 0x100 | volume;
422  ret = WM8960_WriteReg(handle, WM8960_LOUT2, vol);
423  ret = WM8960_WriteReg(handle, WM8960_ROUT2, vol);
424  break;
425  default:
427  break;
428  }
429  return ret;
430 }
431 
433 {
434  uint16_t vol = 0;
435  switch (module)
436  {
437  case kWM8960_ModuleADC:
439  vol &= 0xFF;
440  break;
441  case kWM8960_ModuleDAC:
443  vol &= 0xFF;
444  break;
445  case kWM8960_ModuleHP:
447  vol &= 0x7F;
448  break;
451  vol &= 0x3F;
452  break;
453  default:
454  vol = 0;
455  break;
456  }
457  return vol;
458 }
459 
460 status_t WM8960_SetMute(wm8960_handle_t *handle, wm8960_module_t module, bool isEnabled)
461 {
463  switch (module)
464  {
465  case kWM8960_ModuleADC:
466  /*
467  * Digital Mute
468  */
469  if (isEnabled)
470  {
471  ret = WM8960_WriteReg(handle, WM8960_LADC, 0x100);
472  ret = WM8960_WriteReg(handle, WM8960_RADC, 0x100);
473  }
474  else
475  {
476  ret = WM8960_WriteReg(handle, WM8960_LADC, 0x1C3);
477  ret = WM8960_WriteReg(handle, WM8960_RADC, 0x1C3);
478  }
479  break;
480  case kWM8960_ModuleDAC:
481  /*
482  * Digital mute
483  */
484  if (isEnabled)
485  {
486  ret = WM8960_WriteReg(handle, WM8960_LDAC, 0x100);
487  ret = WM8960_WriteReg(handle, WM8960_RDAC, 0x100);
488  }
489  else
490  {
491  ret = WM8960_WriteReg(handle, WM8960_LDAC, 0x1FF);
492  ret = WM8960_WriteReg(handle, WM8960_RDAC, 0x1FF);
493  }
494  break;
495  case kWM8960_ModuleHP:
496  /*
497  * Analog mute
498  */
499  if (isEnabled)
500  {
501  ret = WM8960_WriteReg(handle, WM8960_LOUT1, 0x100);
502  ret = WM8960_WriteReg(handle, WM8960_ROUT1, 0x100);
503  }
504  else
505  {
506  ret = WM8960_WriteReg(handle, WM8960_LOUT1, 0x16F);
507  ret = WM8960_WriteReg(handle, WM8960_ROUT1, 0x16F);
508  }
509  break;
510 
512  if (isEnabled)
513  {
514  ret = WM8960_WriteReg(handle, WM8960_LOUT2, 0x100);
515  ret = WM8960_WriteReg(handle, WM8960_ROUT2, 0x100);
516  }
517  else
518  {
519  ret = WM8960_WriteReg(handle, WM8960_LOUT2, 0x16F);
520  ret = WM8960_WriteReg(handle, WM8960_ROUT2, 0x16f);
521  }
522  break;
523 
525  break;
526  default:
528  break;
529  }
530  return ret;
531 }
532 
533 status_t WM8960_ConfigDataFormat(wm8960_handle_t *handle, uint32_t sysclk, uint32_t sample_rate, uint32_t bits)
534 {
535  status_t retval = kStatus_Success;
536  uint32_t divider = 0;
537  uint16_t val = 0;
538 
539  /* Compute sample rate divider, dac and adc are the same sample rate */
540  divider = sysclk / sample_rate;
541  if (divider == 256)
542  {
543  val = 0;
544  }
545  else if (divider > 256)
546  {
547  val = (((divider / 256U) << 6U) | ((divider / 256U) << 3U));
548  }
549  else
550  {
552  }
553 
554  retval = WM8960_WriteReg(handle, WM8960_CLOCK1, val);
555 
556  /*
557  * Slave mode (MS = 0), LRP = 0, 32bit WL, left justified (FORMAT[1:0]=0b01)
558  */
559  switch (bits)
560  {
561  case 16:
564  break;
565  case 20:
568  break;
569  case 24:
572  break;
573  case 32:
576  break;
577  default:
579  }
580 
581  return retval;
582 }
583 
585 {
586  uint8_t retval = 0;
587  uint16_t val = 0;
588 
590 
591  if (isEnabled)
592  {
593  val |= 0x40U;
594  }
595  else
596  {
597  val &= 0xCF;
598  }
599 
600  retval = WM8960_WriteReg(handle, WM8960_ADDCTL2, val);
601 
602  return retval;
603 }
604 
605 status_t WM8960_WriteReg(wm8960_handle_t *handle, uint8_t reg, uint16_t val)
606 {
607  uint8_t cmd;
608  uint16_t buff = val;
609 
610  /* The register address */
611  cmd = (reg << 1) | ((val >> 8U) & 0x0001U);
612 
613  reg_cache[reg] = buff;
614 
615  return CODEC_I2C_Send(handle->i2cHandle, handle->config->slaveAddress, cmd, 1U, (uint8_t *)&buff, 2U);
616 }
617 
618 status_t WM8960_ReadReg(uint8_t reg, uint16_t *val)
619 {
620  if (reg >= WM8960_CACHEREGNUM)
621  {
623  }
624 
625  *val = reg_cache[reg];
626 
627  return kStatus_Success;
628 }
629 
630 status_t WM8960_ModifyReg(wm8960_handle_t *handle, uint8_t reg, uint16_t mask, uint16_t val)
631 {
632  uint8_t retval = 0;
633  uint16_t reg_val = 0;
634  retval = WM8960_ReadReg(reg, &reg_val);
635  if (retval != kStatus_Success)
636  {
637  return kStatus_Fail;
638  }
639  reg_val &= (uint16_t)~mask;
640  reg_val |= val;
641  retval = WM8960_WriteReg(handle, reg, reg_val);
642  if (retval != kStatus_Success)
643  {
644  return kStatus_Fail;
645  }
646  return kStatus_Success;
647 }
648 
649 status_t WM8960_SetPlay(wm8960_handle_t *handle, uint32_t playSource)
650 {
652 
653  if (kWM8960_PlaySourcePGA & playSource)
654  {
655  ret = WM8960_ModifyReg(handle, WM8960_BYPASS1, 0x80U, 0x80U);
656  ret = WM8960_ModifyReg(handle, WM8960_BYPASS2, 0x80U, 0x80U);
657  ret = WM8960_ModifyReg(handle, WM8960_LOUTMIX, 0x180U, 0U);
658  ret = WM8960_ModifyReg(handle, WM8960_ROUTMIX, 0x180U, 0U);
659  }
660 
661  if (playSource & kWM8960_PlaySourceDAC)
662  {
663  ret = WM8960_ModifyReg(handle, WM8960_BYPASS1, 0x80U, 0x00U);
664  ret = WM8960_ModifyReg(handle, WM8960_BYPASS2, 0x80U, 0x00U);
665  ret = WM8960_ModifyReg(handle, WM8960_LOUTMIX, 0x180U, 0x100U);
666  ret = WM8960_ModifyReg(handle, WM8960_ROUTMIX, 0x180U, 0x100U);
667  }
668 
669  if (playSource & kWM8960_PlaySourceInput)
670  {
671  ret = WM8960_ModifyReg(handle, WM8960_BYPASS1, 0x80U, 0x0U);
672  ret = WM8960_ModifyReg(handle, WM8960_BYPASS2, 0x80U, 0x0U);
673  ret = WM8960_ModifyReg(handle, WM8960_LOUTMIX, 0x180U, 0x80U);
674  ret = WM8960_ModifyReg(handle, WM8960_ROUTMIX, 0x180U, 0x80U);
675  }
676 
677  return ret;
678 }
WM8960_POWER1_ADCL_SHIFT
#define WM8960_POWER1_ADCL_SHIFT
Definition: fsl_wm8960.h:157
WM8960_SetVolume
status_t WM8960_SetVolume(wm8960_handle_t *handle, wm8960_module_t module, uint32_t volume)
Set the volume of different modules in WM8960.
Definition: fsl_wm8960.c:378
WM8960_SetProtocol
status_t WM8960_SetProtocol(wm8960_handle_t *handle, wm8960_protocol_t protocol)
Set the audio transfer protocol.
Definition: fsl_wm8960.c:373
WM8960_IFACE1_SLAVE
#define WM8960_IFACE1_SLAVE
Definition: fsl_wm8960.h:128
WM8960_POWER3_LOMIX_MASK
#define WM8960_POWER3_LOMIX_MASK
Definition: fsl_wm8960.h:191
WM8960_POWER2_LOUT1_SHIFT
#define WM8960_POWER2_LOUT1_SHIFT
Definition: fsl_wm8960.h:176
kStatus_InvalidArgument
@ kStatus_InvalidArgument
Definition: fsl_common.h:183
WM8960_WriteReg
status_t WM8960_WriteReg(wm8960_handle_t *handle, uint8_t reg, uint16_t val)
Write register to WM8960 using I2C.
Definition: fsl_wm8960.c:605
WM8960_SetLeftInput
status_t WM8960_SetLeftInput(wm8960_handle_t *handle, wm8960_input_t input)
Set left audio input source in WM8960.
Definition: fsl_wm8960.c:269
_wm8960_handle::config
const wm8960_config_t * config
Definition: fsl_wm8960.h:322
WM8960_SetMute
status_t WM8960_SetMute(wm8960_handle_t *handle, wm8960_module_t module, bool isEnabled)
Mute modules in WM8960.
Definition: fsl_wm8960.c:460
WM8960_CLOCK1
#define WM8960_CLOCK1
Definition: fsl_wm8960.h:39
WM8960_GetVolume
uint32_t WM8960_GetVolume(wm8960_handle_t *handle, wm8960_module_t module)
Get the volume of different modules in WM8960.
Definition: fsl_wm8960.c:432
WM8960_LADC
#define WM8960_LADC
Definition: fsl_wm8960.h:54
WM8960_POWER2_DACL_MASK
#define WM8960_POWER2_DACL_MASK
WM8960_POWER2.
Definition: fsl_wm8960.h:169
wm8960_route_t
enum _wm8960_route wm8960_route_t
WM8960 data route. Only provide some typical data route, not all route listed. Note: Users cannot com...
WM8960_POWER2_SPKL_MASK
#define WM8960_POWER2_SPKL_MASK
Definition: fsl_wm8960.h:181
WM8960_IFACE1_FORMAT_MASK
#define WM8960_IFACE1_FORMAT_MASK
WM8960_IFACE1 FORMAT bits.
Definition: fsl_wm8960.h:92
CODEC_I2C_Init
status_t CODEC_I2C_Init(void *handle, uint32_t i2cInstance, uint32_t i2cBaudrate, uint32_t i2cSourceClockHz)
Codec i2c bus initilization.
Definition: fsl_codec_i2c.c:30
wm8960_input_t
enum _wm8960_input wm8960_input_t
wm8960 input source
WM8960_LINPATH
#define WM8960_LINPATH
Definition: fsl_wm8960.h:64
WM8960_POWER2
#define WM8960_POWER2
Definition: fsl_wm8960.h:59
WM8960_SetModule
status_t WM8960_SetModule(wm8960_handle_t *handle, wm8960_module_t module, bool isEnabled)
Enable/disable expected devices.
Definition: fsl_wm8960.c:140
WM8960_POWER2_SPKR_SHIFT
#define WM8960_POWER2_SPKR_SHIFT
Definition: fsl_wm8960.h:185
kWM8960_InputDifferentialMicInput3
@ kWM8960_InputDifferentialMicInput3
Definition: fsl_wm8960.h:264
WM8960_BYPASS2
#define WM8960_BYPASS2
Definition: fsl_wm8960.h:77
kWM8960_ModuleLineIn
@ kWM8960_ModuleLineIn
Definition: fsl_wm8960.h:209
wm8960_reg
static const uint16_t wm8960_reg[WM8960_CACHEREGNUM]
Definition: fsl_wm8960.c:26
WM8960_LOUT1
#define WM8960_LOUT1
Definition: fsl_wm8960.h:37
kWM8960_ModuleDAC
@ kWM8960_ModuleDAC
Definition: fsl_wm8960.h:204
WM8960_BYPASS1
#define WM8960_BYPASS1
Definition: fsl_wm8960.h:76
WM8960_LINVOL
#define WM8960_LINVOL
Define the register address of WM8960.
Definition: fsl_wm8960.h:35
WM8960_DACCTL1
#define WM8960_DACCTL1
Definition: fsl_wm8960.h:40
WM8960_IFACE1_WL_20BITS
#define WM8960_IFACE1_WL_20BITS
Definition: fsl_wm8960.h:104
wm8960_config::slaveAddress
uint8_t slaveAddress
Definition: fsl_wm8960.h:314
WM8960_POWER1
#define WM8960_POWER1
Definition: fsl_wm8960.h:58
WM8960_RESET
#define WM8960_RESET
Definition: fsl_wm8960.h:48
kWM8960_PlaySourcePGA
@ kWM8960_PlaySourcePGA
Definition: fsl_wm8960.h:227
WM8960_SetRightInput
status_t WM8960_SetRightInput(wm8960_handle_t *handle, wm8960_input_t input)
Set right audio input source in WM8960.
Definition: fsl_wm8960.c:321
WM8960_INBMIX2
#define WM8960_INBMIX2
Definition: fsl_wm8960.h:75
WM8960_ReadReg
status_t WM8960_ReadReg(uint8_t reg, uint16_t *val)
Read register from WM8960 using I2C.
Definition: fsl_wm8960.c:618
kWM8960_ModuleOMIX
@ kWM8960_ModuleOMIX
Definition: fsl_wm8960.h:212
WM8960_POWER2_DACR_SHIFT
#define WM8960_POWER2_DACR_SHIFT
Definition: fsl_wm8960.h:173
WM8960_SetMasterSlave
void WM8960_SetMasterSlave(wm8960_handle_t *handle, bool master)
Set WM8960 as master or slave.
Definition: fsl_wm8960.c:128
WM8960_POWER3_LOMIX_SHIFT
#define WM8960_POWER3_LOMIX_SHIFT
Definition: fsl_wm8960.h:192
WM8960_ConfigDataFormat
status_t WM8960_ConfigDataFormat(wm8960_handle_t *handle, uint32_t sysclk, uint32_t sample_rate, uint32_t bits)
Configure the data format of audio data.
Definition: fsl_wm8960.c:533
WM8960_LOUTMIX
#define WM8960_LOUTMIX
Definition: fsl_wm8960.h:66
kStatus_HAL_I2cSuccess
@ kStatus_HAL_I2cSuccess
Definition: i2c.h:29
WM8960_POWER1_VREF_MASK
#define WM8960_POWER1_VREF_MASK
WM8960_POWER1.
Definition: fsl_wm8960.h:147
WM8960_IFACE1_WL
#define WM8960_IFACE1_WL(x)
Definition: fsl_wm8960.h:107
CODEC_I2C_Send
status_t CODEC_I2C_Send(void *handle, uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *txBuff, uint8_t txBuffSize)
codec i2c send function.
Definition: fsl_codec_i2c.c:64
WM8960_IFACE1_LRP_MASK
#define WM8960_IFACE1_LRP_MASK
WM8960_IFACE1 LRP bit.
Definition: fsl_wm8960.h:110
WM8960_IFACE1_WL_16BITS
#define WM8960_IFACE1_WL_16BITS
Definition: fsl_wm8960.h:103
WM8960_IFACE1_WL_32BITS
#define WM8960_IFACE1_WL_32BITS
Definition: fsl_wm8960.h:106
kWM8960_InputLineINPUT2
@ kWM8960_InputLineINPUT2
Definition: fsl_wm8960.h:265
WM8960_IFACE1_MS_MASK
#define WM8960_IFACE1_MS_MASK
WM8960_IFACE1 MS bit.
Definition: fsl_wm8960.h:126
WM8960_RDAC
#define WM8960_RDAC
Definition: fsl_wm8960.h:46
WM8960_ADDCTL2
#define WM8960_ADDCTL2
Definition: fsl_wm8960.h:57
fsl_wm8960.h
WM8960_POWER1_AINR_SHIFT
#define WM8960_POWER1_AINR_SHIFT
Definition: fsl_wm8960.h:154
kWM8960_ModuleLineOut
@ kWM8960_ModuleLineOut
Definition: fsl_wm8960.h:210
kWM8960_PlaySourceDAC
@ kWM8960_PlaySourceDAC
Definition: fsl_wm8960.h:229
kWM8960_RoutePlayback
@ kWM8960_RoutePlayback
Definition: fsl_wm8960.h:240
CODEC_I2C_Deinit
status_t CODEC_I2C_Deinit(void *handle)
Codec i2c de-initilization.
Definition: fsl_codec_i2c.c:48
wm8960_module_t
enum _wm8960_module wm8960_module_t
Modules in WM8960 board.
kWM8960_InputSingleEndedMic
@ kWM8960_InputSingleEndedMic
Definition: fsl_wm8960.h:262
WM8960_RINVOL
#define WM8960_RINVOL
Definition: fsl_wm8960.h:36
WM8960_IFACE2
#define WM8960_IFACE2
Definition: fsl_wm8960.h:44
kWM8960_InputLineINPUT3
@ kWM8960_InputLineINPUT3
Definition: fsl_wm8960.h:266
WM8960_POWER2_ROUT1_SHIFT
#define WM8960_POWER2_ROUT1_SHIFT
Definition: fsl_wm8960.h:179
WM8960_ADDCTL4
#define WM8960_ADDCTL4
Definition: fsl_wm8960.h:79
WM8960_POWER2_SPKL_SHIFT
#define WM8960_POWER2_SPKL_SHIFT
Definition: fsl_wm8960.h:182
wm8960_protocol_t
enum _wm8960_protocol wm8960_protocol_t
The audio data transfer protocol choice. WM8960 only supports I2S format and PCM format.
kWM8960_ModuleADC
@ kWM8960_ModuleADC
Definition: fsl_wm8960.h:203
kWM8960_InputDifferentialMicInput2
@ kWM8960_InputDifferentialMicInput2
Definition: fsl_wm8960.h:263
WM8960_ADDCTL1
#define WM8960_ADDCTL1
Definition: fsl_wm8960.h:56
WM8960_POWER3_LMIC_SHIFT
#define WM8960_POWER3_LMIC_SHIFT
Definition: fsl_wm8960.h:188
WM8960_IFACE1_MS
#define WM8960_IFACE1_MS(x)
Definition: fsl_wm8960.h:130
kWM8960_RouteBypass
@ kWM8960_RouteBypass
Definition: fsl_wm8960.h:239
WM8960_SetPlay
status_t WM8960_SetPlay(wm8960_handle_t *handle, uint32_t playSource)
SET the WM8960 play source.
Definition: fsl_wm8960.c:649
kWM8960_ModuleHP
@ kWM8960_ModuleHP
Definition: fsl_wm8960.h:206
WM8960_POWER1_AINL_SHIFT
#define WM8960_POWER1_AINL_SHIFT
Definition: fsl_wm8960.h:151
kStatus_Fail
@ kStatus_Fail
Definition: fsl_common.h:180
WM8960_LDAC
#define WM8960_LDAC
Definition: fsl_wm8960.h:45
wm8960_config
Initialize structure of WM8960.
Definition: fsl_wm8960.h:304
WM8960_POWER2_LOUT1_MASK
#define WM8960_POWER2_LOUT1_MASK
Definition: fsl_wm8960.h:175
kWM8960_ModuleMICB
@ kWM8960_ModuleMICB
Definition: fsl_wm8960.h:207
WM8960_POWER3_RMIC_SHIFT
#define WM8960_POWER3_RMIC_SHIFT
Definition: fsl_wm8960.h:190
WM8960_POWER1_MICB_SHIFT
#define WM8960_POWER1_MICB_SHIFT
Definition: fsl_wm8960.h:163
WM8960_POWER1_AINL_MASK
#define WM8960_POWER1_AINL_MASK
Definition: fsl_wm8960.h:150
kWM8960_RoutePlaybackandRecord
@ kWM8960_RoutePlaybackandRecord
Definition: fsl_wm8960.h:241
WM8960_POWER3_ROMIX_SHIFT
#define WM8960_POWER3_ROMIX_SHIFT
Definition: fsl_wm8960.h:194
WM8960_POWER3
#define WM8960_POWER3
Definition: fsl_wm8960.h:78
WM8960_CLASSD1
#define WM8960_CLASSD1
Definition: fsl_wm8960.h:80
WM8960_POWER1_VREF_SHIFT
#define WM8960_POWER1_VREF_SHIFT
Definition: fsl_wm8960.h:148
WM8960_Init
status_t WM8960_Init(wm8960_handle_t *handle, const wm8960_config_t *wm8960Config)
WM8960 initialize function.
Definition: fsl_wm8960.c:38
WM8960_CACHEREGNUM
#define WM8960_CACHEREGNUM
Cache register number.
Definition: fsl_wm8960.h:89
WM8960_POWER3_ROMIX_MASK
#define WM8960_POWER3_ROMIX_MASK
Definition: fsl_wm8960.h:193
_wm8960_handle::i2cHandle
uint8_t i2cHandle[WM8960_I2C_HANDLER_SIZE]
Definition: fsl_wm8960.h:323
WM8960_POWER2_DACR_MASK
#define WM8960_POWER2_DACR_MASK
Definition: fsl_wm8960.h:172
WM8960_IFACE1_MASTER
#define WM8960_IFACE1_MASTER
Definition: fsl_wm8960.h:129
_wm8960_handle
wm8960 codec handler
Definition: fsl_wm8960.h:320
WM8960_POWER1_MICB_MASK
#define WM8960_POWER1_MICB_MASK
Definition: fsl_wm8960.h:162
WM8960_ModifyReg
status_t WM8960_ModifyReg(wm8960_handle_t *handle, uint8_t reg, uint16_t mask, uint16_t val)
Modify some bits in the register using I2C.
Definition: fsl_wm8960.c:630
WM8960_POWER2_DACL_SHIFT
#define WM8960_POWER2_DACL_SHIFT
Definition: fsl_wm8960.h:170
WM8960_IFACE1
#define WM8960_IFACE1
Definition: fsl_wm8960.h:42
WM8960_LOUT2
#define WM8960_LOUT2
Definition: fsl_wm8960.h:71
WM8960_IFACE1_WL_MASK
#define WM8960_IFACE1_WL_MASK
WM8960_IFACE1 WL bits.
Definition: fsl_wm8960.h:101
kWM8960_RouteRecord
@ kWM8960_RouteRecord
Definition: fsl_wm8960.h:242
WM8960_ROUT2
#define WM8960_ROUT2
Definition: fsl_wm8960.h:72
config
static sai_transceiver_t config
Definition: imxrt1050/imxrt1050-evkb/source/pv_audio_rec.c:75
WM8960_I2C_BAUDRATE
#define WM8960_I2C_BAUDRATE
WM8960 I2C baudrate.
Definition: fsl_wm8960.h:198
cmd
string cmd
WM8960_POWER2_ROUT1_MASK
#define WM8960_POWER2_ROUT1_MASK
Definition: fsl_wm8960.h:178
WM8960_POWER1_AINR_MASK
#define WM8960_POWER1_AINR_MASK
Definition: fsl_wm8960.h:153
WM8960_SetDataRoute
status_t WM8960_SetDataRoute(wm8960_handle_t *handle, wm8960_route_t route)
Set audio data route in WM8960.
Definition: fsl_wm8960.c:201
status_t
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:189
WM8960_POWER1_ADCR_SHIFT
#define WM8960_POWER1_ADCR_SHIFT
Definition: fsl_wm8960.h:160
WM8960_POWER3_LMIC_MASK
#define WM8960_POWER3_LMIC_MASK
Definition: fsl_wm8960.h:187
kWM8960_ModuleVREF
@ kWM8960_ModuleVREF
Definition: fsl_wm8960.h:205
WM8960_RADC
#define WM8960_RADC
Definition: fsl_wm8960.h:55
kStatus_Success
@ kStatus_Success
Definition: fsl_common.h:179
WM8960_POWER3_RMIC_MASK
#define WM8960_POWER3_RMIC_MASK
Definition: fsl_wm8960.h:189
WM8960_POWER1_ADCL_MASK
#define WM8960_POWER1_ADCL_MASK
Definition: fsl_wm8960.h:156
kWM8960_PlaySourceInput
@ kWM8960_PlaySourceInput
Definition: fsl_wm8960.h:228
WM8960_POWER2_SPKR_MASK
#define WM8960_POWER2_SPKR_MASK
Definition: fsl_wm8960.h:184
WM8960_RINPATH
#define WM8960_RINPATH
Definition: fsl_wm8960.h:65
WM8960_ROUTMIX
#define WM8960_ROUTMIX
Definition: fsl_wm8960.h:68
WM8960_SetJackDetect
status_t WM8960_SetJackDetect(wm8960_handle_t *handle, bool isEnabled)
Enable/disable jack detect feature.
Definition: fsl_wm8960.c:584
WM8960_ROUT1
#define WM8960_ROUT1
Definition: fsl_wm8960.h:38
WM8960_IFACE1_WL_24BITS
#define WM8960_IFACE1_WL_24BITS
Definition: fsl_wm8960.h:105
kWM8960_ModuleSpeaker
@ kWM8960_ModuleSpeaker
Definition: fsl_wm8960.h:211
WM8960_POWER1_ADCR_MASK
#define WM8960_POWER1_ADCR_MASK
Definition: fsl_wm8960.h:159
WM8960_Deinit
status_t WM8960_Deinit(wm8960_handle_t *handle)
Deinit the WM8960 codec.
Definition: fsl_wm8960.c:116
WM8960_INBMIX1
#define WM8960_INBMIX1
Definition: fsl_wm8960.h:74
reg_cache
static uint16_t reg_cache[WM8960_CACHEREGNUM]
Definition: fsl_wm8960.c:33


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:13:56