fsl_wm8904.c
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1 /*
2  * Copyright (c) 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2019 NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #include "fsl_wm8904.h"
10 #if WM8904_DEBUG_REGISTER
11 #include "fsl_debug_console.h"
12 #endif
13 /*******************************************************************************
14  * Definitions
15  ******************************************************************************/
17 #define WM8904_MAP_DAC_ADC_VOLUME(volume) (volume * (255 / 100U))
18 #define WM8904_MAP_PGA_VOLUME(volume) (volume > 0x1FU ? 0x1FU : volume)
19 #define WM8904_MAP_HEADPHONE_LINEOUT_VOLUME(volume) (volume > 0x3FU ? 0x3FU : volume)
20 #define WM8904_SWAP_UINT16_BYTE_SEQUENCE(x) (__REV16(x))
21 #define WM8904_MAP_SAMPLERATE(x) \
22  (x == kWM8904_SampleRate8kHz ? \
23  8000U : \
24  x == kWM8904_SampleRate12kHz ? \
25  12000U : \
26  x == kWM8904_SampleRate16kHz ? \
27  16000U : \
28  x == kWM8904_SampleRate24kHz ? 24000U : x == kWM8904_SampleRate32kHz ? 32000U : 48000U)
29 #define WM8904_MAP_BITWIDTH(x) \
30  (x == kWM8904_BitWidth16 ? 16 : x == kWM8904_BitWidth20 ? 20 : x == kWM8904_BitWidth24 ? 24 : 32)
31 /*******************************************************************************
32  * Prototypes
33  ******************************************************************************/
42 
50 /*******************************************************************************
51  * Variables
52  ******************************************************************************/
53 #if WM8904_DEBUG_REGISTER
54 
55 static const uint8_t allRegisters[] = {
56  0x00, 0x04, 0x05, 0x06, 0x07, 0x0A, 0x0C, 0x0E, 0x0F, 0x12, 0x14, 0x15, 0x16, 0x18, 0x19, 0x1A, 0x1B,
57  0x1E, 0x1F, 0x20, 0x21, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F, 0x39,
58  0x3A, 0x3B, 0x3C, 0x3D, 0x43, 0x44, 0x45, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x5A, 0x5E, 0x62,
59  0x68, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7E, 0x7F,
60  0x80, 0x81, 0x82, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F, 0x90, 0x91, 0x92, 0x93,
61  0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0xC6, 0xF7, 0xF8};
62 #endif
63 /*******************************************************************************
64  * Code
65  ******************************************************************************/
67 {
68  status_t result;
69 
70  /* Disable SYSCLK */
71  result = WM8904_WriteRegister(handle, WM8904_CLK_RATES_2, 0x00);
72  if (result != kStatus_WM8904_Success)
73  {
74  return result;
75  }
76 
77  /* Set Clock ratio and sample rate */
78  result = WM8904_WriteRegister(handle, WM8904_CLK_RATES_1, (format->fsRatio << 10) | format->sampleRate);
79  if (result != kStatus_WM8904_Success)
80  {
81  return result;
82  }
83 
84  /* Set bit resolution and bclk direction */
85  result = WM8904_ModifyRegister(handle, WM8904_AUDIO_IF_1, 0x000C | (1U << 6U), format->bitWidth << 2U);
86  if (result != kStatus_WM8904_Success)
87  {
88  return result;
89  }
90 
91  /* Set LRCLK is input */
92  result = WM8904_ModifyRegister(handle, WM8904_AUDIO_IF_3, 1U << 11U, 0);
93  if (result != kStatus_WM8904_Success)
94  {
95  return result;
96  }
97 
98  /* Enable SYSCLK */
99  result = WM8904_WriteRegister(handle, WM8904_CLK_RATES_2, 0x1007);
100  if (result != kStatus_WM8904_Success)
101  {
102  return result;
103  }
104 
105  return kStatus_WM8904_Success;
106 }
107 
109 {
110  status_t result;
111  uint16_t value;
112 
113  do
114  {
115  result = WM8904_ReadRegister(handle, WM8904_WRT_SEQUENCER_4, &value);
116  } while ((result == kStatus_WM8904_Success) && (value & 1));
117 
118  return result;
119 }
120 
129 status_t WM8904_WriteRegister(wm8904_handle_t *handle, uint8_t reg, uint16_t value)
130 {
131  assert(handle->config != NULL);
132  assert(handle->config->slaveAddress != 0U);
133 
134  uint16_t writeValue = WM8904_SWAP_UINT16_BYTE_SEQUENCE(value);
135 
136  return CODEC_I2C_Send(handle->i2cHandle, handle->config->slaveAddress, reg, 1U, (uint8_t *)&writeValue, 2U);
137 }
138 
147 status_t WM8904_ReadRegister(wm8904_handle_t *handle, uint8_t reg, uint16_t *value)
148 {
149  assert(handle->config != NULL);
150  assert(handle->config->slaveAddress != 0U);
151 
152  uint8_t retval = 0;
153  uint16_t readValue = 0U;
154 
155  retval = CODEC_I2C_Receive(handle->i2cHandle, handle->config->slaveAddress, reg, 1U, (uint8_t *)&readValue, 2U);
156 
157  *value = WM8904_SWAP_UINT16_BYTE_SEQUENCE(readValue);
158 
159  return retval;
160 }
161 
171 status_t WM8904_ModifyRegister(wm8904_handle_t *handle, uint8_t reg, uint16_t mask, uint16_t value)
172 {
173  status_t result;
174  uint16_t regValue;
175 
176  result = WM8904_ReadRegister(handle, reg, &regValue);
177  if (result != kStatus_WM8904_Success)
178  {
179  return result;
180  }
181 
182  regValue &= (uint16_t)~mask;
183  regValue |= value;
184 
185  return WM8904_WriteRegister(handle, reg, regValue);
186 }
187 
195 {
196  assert(handle != NULL);
197  assert(wm8904Config != NULL);
198 
199  status_t result;
200  uint32_t sysclk = 0U;
201  wm8904_config_t *config = wm8904Config;
202  handle->config = config;
203 
204  /* i2c bus initialization */
205  result = CODEC_I2C_Init(handle->i2cHandle, wm8904Config->i2cConfig.codecI2CInstance, WM8904_I2C_BITRATE,
206  wm8904Config->i2cConfig.codecI2CSourceClock);
207  if (result != kStatus_HAL_I2cSuccess)
208  {
209  return kStatus_WM8904_Fail;
210  }
211 
212  /* reset */
213  result = WM8904_WriteRegister(handle, WM8904_RESET, 0x0000);
214  if (result != kStatus_WM8904_Success)
215  {
216  return result;
217  }
218 
219  /* MCLK_INV=0, SYSCLK_SRC=0, TOCLK_RATE=0, OPCLK_ENA=1,
220  * CLK_SYS_ENA=1, CLK_DSP_ENA=1, TOCLK_ENA=1 */
221  result = WM8904_WriteRegister(handle, WM8904_CLK_RATES_2, 0x000F);
222  if (result != kStatus_WM8904_Success)
223  {
224  return result;
225  }
226 
227  /* WSEQ_ENA=1, WSEQ_WRITE_INDEX=0_0000 */
228  result = WM8904_WriteRegister(handle, WM8904_WRT_SEQUENCER_0, 0x0100);
229  if (result != kStatus_WM8904_Success)
230  {
231  return result;
232  }
233 
234  /* WSEQ_ABORT=0, WSEQ_START=1, WSEQ_START_INDEX=00_0000 */
235  result = WM8904_WriteRegister(handle, WM8904_WRT_SEQUENCER_3, 0x0100);
236  if (result != kStatus_WM8904_Success)
237  {
238  return result;
239  }
240 
241  result = WM8904_WaitOnWriteSequencer(handle);
242  if (result != kStatus_WM8904_Success)
243  {
244  return result;
245  }
246 
247  /* TOCLK_RATE_DIV16=0, TOCLK_RATE_x4=1, SR_MODE=0, MCLK_DIV=1
248  * (Required for MMCs: SGY, KRT see erratum CE000546) */
249  result = WM8904_WriteRegister(handle, WM8904_CLK_RATES_0, 0xA45F);
250  if (result != kStatus_WM8904_Success)
251  {
252  return result;
253  }
254 
255  /* INL_ENA=1, INR ENA=1 */
256  result = WM8904_WriteRegister(handle, WM8904_POWER_MGMT_0, 0x0003);
257  if (result != kStatus_WM8904_Success)
258  {
259  return result;
260  }
261 
262  /* HPL_PGA_ENA=1, HPR_PGA_ENA=1 */
263  result = WM8904_WriteRegister(handle, WM8904_POWER_MGMT_2, 0x0003);
264  if (result != kStatus_WM8904_Success)
265  {
266  return result;
267  }
268 
269  /* DACL_ENA=1, DACR_ENA=1, ADCL_ENA=1, ADCR_ENA=1 */
270  result = WM8904_WriteRegister(handle, WM8904_POWER_MGMT_6, 0x000F);
271  if (result != kStatus_WM8904_Success)
272  {
273  return result;
274  }
275 
276  /* ADC_OSR128=1 */
277  result = WM8904_WriteRegister(handle, WM8904_ANALOG_ADC_0, 0x0001);
278  if (result != kStatus_WM8904_Success)
279  {
280  return result;
281  }
282 
283  /* DACL_DATINV=0, DACR_DATINV=0, DAC_BOOST=00, LOOPBACK=0, AIFADCL_SRC=0,
284  * AIFADCR_SRC=1, AIFDACL_SRC=0, AIFDACR_SRC=1, ADC_COMP=0, ADC_COMPMODE=0,
285  * DAC_COMP=0, DAC_COMPMODE=0 */
286  result = WM8904_WriteRegister(handle, WM8904_AUDIO_IF_0, 0x0050);
287  if (result != kStatus_WM8904_Success)
288  {
289  return result;
290  }
291 
292  /* DAC_MONO=0, DAC_SB_FILT-0, DAC_MUTERATE=0, DAC_UNMUTE RAMP=0,
293  * DAC_OSR128=1, DAC_MUTE=0, DEEMPH=0 (none) */
294  result = WM8904_WriteRegister(handle, WM8904_DAC_DIG_1, 0x0040);
295  if (result != kStatus_WM8904_Success)
296  {
297  return result;
298  }
299 
300  /* LINMUTE=0, LIN_VOL=0_0101 */
301  result = WM8904_WriteRegister(handle, WM8904_ANALOG_LEFT_IN_0, 0x0005);
302  if (result != kStatus_WM8904_Success)
303  {
304  return result;
305  }
306 
307  /* RINMUTE=0, RIN VOL=0_0101 LINEOUTL RMV SHORT-1, LINEOUTL ENA_OUTP=1,
308  * LINEOUTL_ENA_DLY=1, LINEOUTL_ENA=1, LINEOUTR_RMV_SHORT-1,
309  * LINEOUTR_ENA_OUTP=1 */
310  result = WM8904_WriteRegister(handle, WM8904_ANALOG_RIGHT_IN_0, 0x0005);
311  if (result != kStatus_WM8904_Success)
312  {
313  return result;
314  }
315 
316  /* HPOUTL_MUTE=0, HPOUT_VU=0, HPOUTLZC=0, HPOUTL_VOL=11_1001 */
317  result = WM8904_WriteRegister(handle, WM8904_ANALOG_OUT1_LEFT, 0x0039);
318  if (result != kStatus_WM8904_Success)
319  {
320  return result;
321  }
322 
323  /* HPOUTR_MUTE=0, HPOUT_VU=0, HPOUTRZC=0, HPOUTR_VOL=11_1001 */
324  result = WM8904_WriteRegister(handle, WM8904_ANALOG_OUT1_RIGHT, 0x0039);
325  if (result != kStatus_WM8904_Success)
326  {
327  return result;
328  }
329 
330  /* Enable DC servos for headphone out */
331  result = WM8904_WriteRegister(handle, WM8904_DC_SERVO_0, 0x0003);
332  if (result != kStatus_WM8904_Success)
333  {
334  return result;
335  }
336 
337  /* HPL_RMV_SHORT=1, HPL_ENA_OUTP=1, HPL_ENA_DLY=1, HPL_ENA=1,
338  * HPR_RMV_SHORT=1, HPR_ENA_OUTP=1, HPR_ENA_DLY=1, HPR_ENA=1 */
339  result = WM8904_WriteRegister(handle, WM8904_ANALOG_HP_0, 0x00FF);
340  if (result != kStatus_WM8904_Success)
341  {
342  return result;
343  }
344 
345  /* CP_DYN_PWR=1 */
346  result = WM8904_WriteRegister(handle, WM8904_CLS_W_0, 0x0001);
347  if (result != kStatus_WM8904_Success)
348  {
349  return result;
350  }
351 
352  /* CP_ENA=1 */
353  result = WM8904_WriteRegister(handle, WM8904_CHRG_PUMP_0, 0x0001);
354  if (result != kStatus_WM8904_Success)
355  {
356  return result;
357  }
358 
359  /* set audio format */
360  result = WM8904_SetProtocol(handle, config->protocol);
361  if (result != kStatus_WM8904_Success)
362  {
363  return result;
364  }
365 
366  result = WM8904_ModifyRegister(handle, WM8904_CLK_RATES_2, 1U << 14U, config->sysClkSource);
367  if (kStatus_WM8904_Success != result)
368  {
369  return result;
370  }
371 
372  if (config->sysClkSource == kWM8904_SysClkSourceFLL)
373  {
374  result = WM8904_SetFLLConfig(handle, config->fll);
375  if (result != kStatus_WM8904_Success)
376  {
377  return result;
378  }
379  sysclk = config->fll->outputClock_HZ;
380  }
381  else
382  {
383  sysclk = config->mclk_HZ;
384  }
385 
386  result = WM8904_CheckAudioFormat(handle, &config->format, sysclk);
387  if (result != kStatus_WM8904_Success)
388  {
389  return result;
390  }
391 
392  if (config->master)
393  {
394  result = WM8904_SeMasterClock(handle, sysclk / 2U, WM8904_MAP_SAMPLERATE(config->format.sampleRate),
395  WM8904_MAP_BITWIDTH(config->format.bitWidth));
396  if (result != kStatus_WM8904_Success)
397  {
398  return result;
399  }
400  }
401 
402  /* set record source and channel */
403  result = WM8904_SetRecord(handle, config->recordSource);
404  if (result != kStatus_WM8904_Success)
405  {
406  return result;
407  }
408  result = WM8904_SetRecordChannel(handle, config->recordChannelLeft, config->recordChannelRight);
409  if (result != kStatus_WM8904_Success)
410  {
411  return result;
412  }
413  /* set play source */
414  result = WM8904_SetPlay(handle, config->playSource);
415  if (result != kStatus_WM8904_Success)
416  {
417  return result;
418  }
419 
420  return result;
421 }
422 
433 {
434  /* reset */
436  {
437  return CODEC_I2C_Deinit(handle->i2cHandle);
438  }
439 
440  return kStatus_WM8904_Fail;
441 }
442 
457 {
458  memset(config, 0, sizeof(wm8904_config_t));
459 
460  config->master = false;
461  config->protocol = kWM8904_ProtocolI2S;
462  config->format.sampleRate = kWM8904_SampleRate48kHz;
463  config->format.bitWidth = kWM8904_BitWidth16;
464 }
465 
475 {
476  if (master)
477  {
478  /* only slave currently supported */
479  return kStatus_WM8904_Fail;
480  }
481 
482  return kStatus_WM8904_Success;
483 }
484 
485 status_t WM8904_SeMasterClock(wm8904_handle_t *handle, uint32_t sysclk, uint32_t sampleRate, uint32_t bitWidth)
486 {
487  uint32_t bclk = sampleRate * bitWidth * 2U;
488  uint32_t bclkDiv = 0U;
489  uint16_t audioInterface = 0U;
491 
492  if ((sysclk / bclk > 48U) || (bclk / sampleRate > 2047U) || (bclk / sampleRate < 8U))
493  {
495  }
496 
497  result = WM8904_ReadRegister(handle, WM8904_AUDIO_IF_2, &audioInterface);
498  if (kStatus_WM8904_Success != result)
499  {
500  return result;
501  }
502 
503  audioInterface &= ~0x1FU;
504  bclkDiv = (sysclk * 10U) / bclk;
505 
506  switch (bclkDiv)
507  {
508  case 10:
509  audioInterface |= 0U;
510  break;
511  case 15:
512  audioInterface |= 1U;
513  break;
514  case 20:
515  case 30:
516  case 40:
517  case 50:
518  audioInterface |= bclkDiv / 10U;
519  break;
520  case 55:
521  audioInterface |= 6U;
522  break;
523  case 60:
524  audioInterface |= 7U;
525  break;
526  case 80:
527  audioInterface |= 8U;
528  break;
529  case 100:
530  case 110:
531  case 120:
532  audioInterface |= bclkDiv / 10U - 1U;
533  break;
534  case 160:
535  audioInterface |= 12U;
536  break;
537  case 200:
538  audioInterface |= 13U;
539  break;
540  case 220:
541  audioInterface |= 14U;
542  break;
543  case 240:
544  audioInterface |= 15U;
545  break;
546  case 250:
547  audioInterface |= 16U;
548  break;
549  case 300:
550  audioInterface |= 17U;
551  break;
552  case 320:
553  audioInterface |= 18U;
554  break;
555  case 440:
556  audioInterface |= 19U;
557  break;
558  case 480:
559  audioInterface |= 20U;
560  break;
561  }
562  /* bclk divider */
563  result = WM8904_WriteRegister(handle, WM8904_AUDIO_IF_2, audioInterface);
564  if (kStatus_WM8904_Success != result)
565  {
566  return result;
567  }
568  /* bclk direction output */
569  result = WM8904_ModifyRegister(handle, WM8904_AUDIO_IF_1, 1U << 6U, 1U << 6U);
570  if (kStatus_WM8904_Success != result)
571  {
572  return result;
573  }
574 
575  result = WM8904_ModifyRegister(handle, WM8904_GPIO_CONTROL_4, 0x8FU, 1U);
576  if (kStatus_WM8904_Success != result)
577  {
578  return result;
579  }
580  /* LRCLK direction and divider */
581  audioInterface = (1 << 11U) | (bclk / sampleRate);
582  result = WM8904_ModifyRegister(handle, WM8904_AUDIO_IF_3, 0xFFFU, audioInterface);
583  if (kStatus_WM8904_Success != result)
584  {
585  return result;
586  }
587 
588  return kStatus_WM8904_Success;
589 }
590 
592 {
593  assert(config != NULL);
594  assert(handle != NULL);
595 
596  uint32_t referenceClock = config->refClock_HZ;
597  uint32_t inputDivider = 0U;
598  uint32_t fvco = 0U, outputDiv = 0U, ratio = 0U;
599  uint32_t n = 0U, k = 0U;
600 
601  /* it is recommended that the highest possible frequency - within the 13.5MHz limit - should be selected */
602  if (referenceClock < 13500000U)
603  {
604  inputDivider = 0;
605  }
606  else if (referenceClock / 2 < 13500000U)
607  {
608  inputDivider = 1;
609  }
610  else if (referenceClock / 4 < 13500000U)
611  {
612  inputDivider = 2;
613  }
614  else
615  {
616  inputDivider = 3;
617  }
618 
619  if (referenceClock / (1U << inputDivider) > 13500000U)
620  {
622  }
623 
624  referenceClock = referenceClock / (1U << inputDivider);
625 
626  for (outputDiv = 4U; outputDiv <= 64; outputDiv++)
627  {
628  fvco = outputDiv * config->outputClock_HZ;
629  if ((fvco >= 90000000) && (fvco <= 100000000))
630  {
631  break;
632  }
633  }
634 
635  if (referenceClock <= 64000)
636  {
637  ratio = 4U;
638  }
639  else if (referenceClock <= 128000)
640  {
641  ratio = 3U;
642  }
643  else if (referenceClock <= 256000)
644  {
645  ratio = 2U;
646  }
647  else if (referenceClock <= 1000000)
648  {
649  ratio = 1U;
650  }
651  else
652  {
653  ratio = 0U;
654  }
655 
656  n = fvco / ((ratio + 1) * referenceClock);
657  k = (((uint64_t)fvco) * 1000000U) / ((ratio + 1) * referenceClock);
658  if (n != 0U)
659  {
660  k = k - n * 1000000U;
661  }
662  k = ((uint64_t)k * 65536) / 1000000U;
663 
664  /* configure WM8904 */
666  {
667  return kStatus_WM8904_Fail;
668  }
669 
670  /* configure WM8904 */
671  if (WM8904_ModifyRegister(handle, WM8904_FLL_CONTROL_2, 0x3F07U, ((outputDiv - 1) << 8U) | ratio) !=
673  {
674  return kStatus_WM8904_Fail;
675  }
676 
678  {
679  return kStatus_WM8904_Fail;
680  }
681 
682  if (WM8904_ModifyRegister(handle, WM8904_FLL_CONTROL_4, 0x7FE0, n << 5U) != kStatus_Success)
683  {
684  return kStatus_WM8904_Fail;
685  }
686 
688  WM8904_WriteRegister(handle, WM8904_FLL_CONTROL_5, (inputDivider << 3U) | config->source))
689  {
690  return kStatus_WM8904_Fail;
691  }
692 
694  {
695  return kStatus_WM8904_Fail;
696  }
697 
698  /* enable GPIO1 output fll output clock */
699  if (kStatus_WM8904_Success != WM8904_WriteRegister(handle, 0x79, 9U))
700  {
701  return kStatus_WM8904_Fail;
702  }
703 
704  return kStatus_Success;
705 }
706 
716 {
717  return WM8904_ModifyRegister(handle, WM8904_AUDIO_IF_1, (0x0003 | (1U << 4U)), (uint16_t)protocol);
718 }
719 
729 {
730  return WM8904_ModifyRegister(handle, WM8904_AUDIO_IF_1, 0x0010, polarity);
731 }
732 
742 {
743  return WM8904_ModifyRegister(handle, WM8904_AUDIO_IF_1, 3U << 12U, 1U << 13U | timeSlot << 12U);
744 }
745 
755 {
756  return WM8904_ModifyRegister(handle, WM8904_AUDIO_IF_1, 3U << 10U, 1U << 11U | timeSlot << 10U);
757 }
758 
770 {
771  assert(handle && format);
772 
773  status_t result;
774  uint16_t mclkDiv = 0U;
775  uint32_t sampleRate = 0U;
776  uint32_t fsRatio = 0U;
777 
778  result = WM8904_ReadRegister(handle, WM8904_CLK_RATES_0, &mclkDiv);
779  if (kStatus_WM8904_Success != result)
780  {
781  return result;
782  }
783 
784  switch (format->sampleRate)
785  {
787  sampleRate = 8000;
788  break;
790  sampleRate = 12000;
791  break;
793  sampleRate = 16000;
794  break;
796  sampleRate = 24000;
797  break;
799  sampleRate = 32000;
800  break;
802  sampleRate = 48000;
803  break;
804  default:
805  break;
806  }
807 
808  fsRatio = (mclkFreq >> (mclkDiv & 0x1U)) / sampleRate;
809 
810  switch (fsRatio)
811  {
812  case 64:
813  format->fsRatio = kWM8904_FsRatio64X;
814  break;
815  case 128:
816  format->fsRatio = kWM8904_FsRatio128X;
817  break;
818  case 192:
819  format->fsRatio = kWM8904_FsRatio192X;
820  break;
821  case 256:
822  format->fsRatio = kWM8904_FsRatio256X;
823  break;
824  case 384:
825  format->fsRatio = kWM8904_FsRatio384X;
826  break;
827  case 512:
828  format->fsRatio = kWM8904_FsRatio512X;
829  break;
830  case 768:
831  format->fsRatio = kWM8904_FsRatio768X;
832  break;
833  case 1024:
834  format->fsRatio = kWM8904_FsRatio1024X;
835  break;
836  case 1408:
837  format->fsRatio = kWM8904_FsRatio1408X;
838  break;
839  case 1536:
840  format->fsRatio = kWM8904_FsRatio1536X;
841  break;
842  default:
843  break;
844  }
845 
846  return WM8904_UpdateFormat(handle, format);
847 }
848 
860 status_t WM8904_SetAudioFormat(wm8904_handle_t *handle, uint32_t sysclk, uint32_t sampleRate, uint32_t bitWidth)
861 {
862  status_t result;
863  wm8904_audio_format_t format;
864  uint32_t ratio = 0;
865 
866  switch (sampleRate)
867  {
868  case 8000:
870  break;
871  case 11025:
872  case 12000:
874  break;
875  case 16000:
877  break;
878  case 22050:
879  case 24000:
881  break;
882  case 32000:
884  break;
885  case 44100:
886  case 48000:
888  break;
889  default:
890  return kStatus_WM8904_Fail;
891  }
892 
893  switch (bitWidth)
894  {
895  case 16:
896  format.bitWidth = kWM8904_BitWidth16;
897  break;
898  case 20:
899  format.bitWidth = kWM8904_BitWidth20;
900  break;
901  case 24:
902  format.bitWidth = kWM8904_BitWidth24;
903  break;
904  case 32:
905  format.bitWidth = kWM8904_BitWidth32;
906  break;
907  default:
908  break;
909  }
910 
911  ratio = sysclk / sampleRate;
912  switch (ratio)
913  {
914  case 64:
915  format.fsRatio = kWM8904_FsRatio64X;
916  break;
917  case 128:
918  format.fsRatio = kWM8904_FsRatio128X;
919  break;
920  case 192:
921  format.fsRatio = kWM8904_FsRatio192X;
922  break;
923  case 256:
924  format.fsRatio = kWM8904_FsRatio256X;
925  break;
926  case 384:
927  format.fsRatio = kWM8904_FsRatio384X;
928  break;
929  case 512:
930  format.fsRatio = kWM8904_FsRatio512X;
931  break;
932  case 768:
933  format.fsRatio = kWM8904_FsRatio768X;
934  break;
935  case 1024:
936  format.fsRatio = kWM8904_FsRatio1024X;
937  break;
938  case 1408:
939  format.fsRatio = kWM8904_FsRatio1408X;
940  break;
941  case 1536:
942  format.fsRatio = kWM8904_FsRatio1536X;
943  break;
944  default:
945  return kStatus_WM8904_Fail;
946  }
947 
948  result = WM8904_UpdateFormat(handle, &format);
949 
950  return result;
951 }
952 
966 status_t WM8904_SetVolume(wm8904_handle_t *handle, uint16_t volumeLeft, uint16_t volumeRight)
967 {
968  status_t result;
969 
970  result = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT1_LEFT, 0x3F, volumeLeft);
971  if (result != kStatus_WM8904_Success)
972  {
973  return result;
974  }
975 
976  result = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT1_RIGHT, 0xBF, volumeRight | 0x0080);
977  if (result != kStatus_WM8904_Success)
978  {
979  return result;
980  }
981 
982  return kStatus_WM8904_Success;
983 }
984 
994 status_t WM8904_SetMute(wm8904_handle_t *handle, bool muteLeft, bool muteRight)
995 {
996  status_t result;
997  uint16_t left = muteLeft ? 0x0100 : 0x0000;
998  uint16_t right = muteRight ? 0x0100 : 0x0000;
999 
1000  result = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT1_LEFT, 0x0100, left);
1001  if (result != kStatus_WM8904_Success)
1002  {
1003  return result;
1004  }
1005 
1006  result = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT1_RIGHT, 0x0180, right | 0x0080);
1007  if (result != kStatus_WM8904_Success)
1008  {
1009  return result;
1010  }
1011 
1012  return kStatus_WM8904_Success;
1013 }
1014 
1015 #if WM8904_DEBUG_REGISTER
1016 
1023 status_t WM8904_PrintRegisters(wm8904_handle_t *handle)
1024 {
1025  status_t result;
1026  uint16_t value;
1027  uint32_t i;
1028 
1029  for (i = 0; i < sizeof(allRegisters); i++)
1030  {
1031  result = WM8904_ReadRegister(handle, allRegisters[i], &value);
1032  if (result != kStatus_WM8904_Success)
1033  {
1034  PRINTF("\r\n");
1035  return result;
1036  }
1037  PRINTF("%s", ((i % 8) == 0) ? "\r\n" : "\t");
1038  PRINTF("%02X:%04X", allRegisters[i], value);
1039  }
1040 
1041  PRINTF("\r\n");
1042  return result;
1043 }
1044 #endif
1045 
1059 status_t WM8904_SetChannelVolume(wm8904_handle_t *handle, uint32_t channel, uint32_t volume)
1060 {
1061  status_t ret = kStatus_Fail;
1062  volume = WM8904_MAP_HEADPHONE_LINEOUT_VOLUME(volume);
1063 
1064  /* headphone left channel */
1065  if (channel & kWM8904_HeadphoneLeft)
1066  {
1067  ret = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT1_LEFT, volume == 0U ? 0x100U : 0x3FU,
1068  volume == 0U ? 0x100U : (volume));
1069  }
1070  /* headphone right channel */
1071  if (channel & kWM8904_HeadphoneRight)
1072  {
1073  ret = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT1_RIGHT, volume == 0U ? 0x100U : 0xBFU,
1074  volume == 0U ? 0x100U : (volume | 0x80U));
1075  }
1076  /* line out left channel */
1077  if (channel & kWM8904_LineoutLeft)
1078  {
1079  ret = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT2_LEFT, volume == 0U ? 0x100U : 0x3FU,
1080  volume == 0U ? 0x100U : (volume));
1081  }
1082  /* line out right channel */
1083  if (channel & kWM8904_LineoutRight)
1084  {
1085  ret = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT2_RIGHT, volume == 0U ? 0x100U : 0xBFU,
1086  volume == 0U ? 0x100U : (volume | 0x80U));
1087  }
1088 
1089  return ret;
1090 }
1091 
1101 status_t WM8904_SetChannelMute(wm8904_handle_t *handle, uint32_t channel, bool isMute)
1102 {
1103  status_t ret = kStatus_Fail;
1104  uint16_t regValue = 0U, regMask = 0U;
1105 
1106  regValue = isMute ? 0x180U : 0x80U;
1107  regMask = 0x100U;
1108 
1109  /* headphone left channel */
1110  if (channel & kWM8904_HeadphoneLeft)
1111  {
1112  ret = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT1_LEFT, regMask, regValue);
1113  }
1114 
1115  /* headphone right channel */
1116  if (channel & kWM8904_HeadphoneRight)
1117  {
1118  ret = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT1_RIGHT, regMask, regValue);
1119  }
1120 
1121  /* line out left channel */
1122  if (channel & kWM8904_LineoutLeft)
1123  {
1124  ret = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT2_LEFT, regMask, regValue);
1125  }
1126 
1127  /* line out right channel */
1128  if (channel & kWM8904_LineoutRight)
1129  {
1130  ret = WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT2_RIGHT, regMask, regValue);
1131  }
1132 
1133  return ret;
1134 }
1135 
1146 {
1147  uint8_t regAddr = 0, regBitMask = 0U, regValue = 0U;
1148 
1149  switch (module)
1150  {
1151  case kWM8904_ModuleADC:
1152  regAddr = WM8904_POWER_MGMT_6;
1153  regBitMask = 3U;
1154  regValue = isEnabled ? 3U : 0U;
1155  break;
1156  case kWM8904_ModuleDAC:
1157  regAddr = WM8904_POWER_MGMT_6;
1158  regBitMask = 0xCU;
1159  regValue = isEnabled ? 0xCU : 0U;
1160 
1161  break;
1162  case kWM8904_ModulePGA:
1163  regAddr = WM8904_POWER_MGMT_0;
1164  regBitMask = 3U;
1165  regValue = isEnabled ? 3U : 0U;
1166 
1167  break;
1169  regAddr = WM8904_POWER_MGMT_2;
1170  regBitMask = 3U;
1171  regValue = isEnabled ? 3U : 0U;
1172  break;
1173  case kWM8904_ModuleLineout:
1174  regAddr = WM8904_POWER_MGMT_3;
1175  regBitMask = 3U;
1176  regValue = isEnabled ? 3U : 0U;
1177  break;
1178  default:
1179  return kStatus_InvalidArgument;
1180  }
1181 
1182  return WM8904_ModifyRegister(handle, regAddr, regBitMask, regValue);
1183 }
1184 
1195 status_t WM8904_SetRecord(wm8904_handle_t *handle, uint32_t recordSource)
1196 {
1197  uint8_t regLeftAddr = WM8904_ANALOG_LEFT_IN_1, regRightAddr = WM8904_ANALOG_RIGHT_IN_1;
1198  uint16_t regLeftValue = 0U, regRightValue = 0U, regBitMask;
1199  status_t ret = kStatus_Success;
1200 
1201  switch (recordSource)
1202  {
1204  regLeftValue = 1U;
1205  regRightValue = 1U;
1206  regBitMask = 0x3FU;
1207  break;
1209  regLeftValue = 2U;
1210  regRightValue = 2U;
1211  regBitMask = 0x3FU;
1212  break;
1214  regLeftValue = 0U;
1215  regRightValue = 0U;
1216  regBitMask = 0x3FU;
1217  break;
1219  regLeftValue = (1U << 12U);
1220  regLeftAddr = WM8904_DAC_DIG_0;
1221  regRightAddr = 0U;
1222  regBitMask = 1U << 12U;
1223  break;
1224 
1225  default:
1226  return kStatus_InvalidArgument;
1227  }
1228 
1229  ret = WM8904_ModifyRegister(handle, regLeftAddr, regBitMask, regLeftValue);
1230 
1231  if ((ret == kStatus_Success) && (regRightAddr))
1232  {
1233  return WM8904_ModifyRegister(handle, regRightAddr, regBitMask, regRightValue);
1234  }
1235 
1236  return kStatus_Success;
1237 }
1238 
1250 status_t WM8904_SetRecordChannel(wm8904_handle_t *handle, uint32_t leftRecordChannel, uint32_t rightRecordChannel)
1251 {
1252  uint8_t regLeftAddr = WM8904_ANALOG_LEFT_IN_1, regRightAddr = WM8904_ANALOG_RIGHT_IN_1;
1253  uint16_t regLeftValue = 0U, regRightValue = 0U, regBitMask;
1254  status_t ret = kStatus_Success;
1255  uint8_t leftPositiveChannel = 0U, leftNegativeChannel = 0U, rightPositiveChannel = 0U, rightNegativeChannel = 0U;
1256 
1257  if (leftRecordChannel & kWM8904_RecordChannelDifferentialPositive1)
1258  {
1259  leftPositiveChannel = 0U;
1260  }
1261  else if (leftRecordChannel & kWM8904_RecordChannelDifferentialPositive2)
1262  {
1263  leftPositiveChannel = 1U;
1264  }
1265  else
1266  {
1267  leftPositiveChannel = 2U;
1268  }
1269 
1270  if (leftRecordChannel & kWM8904_RecordChannelDifferentialNegative1)
1271  {
1272  leftNegativeChannel = 0U;
1273  }
1274  else if (leftRecordChannel & kWM8904_RecordChannelDifferentialNegative2)
1275  {
1276  leftNegativeChannel = 1U;
1277  }
1278  else if (leftRecordChannel & kWM8904_RecordChannelDifferentialNegative3)
1279  {
1280  leftNegativeChannel = 2U;
1281  }
1282  else
1283  {
1284  leftNegativeChannel = leftPositiveChannel;
1285  }
1286 
1287  if (rightRecordChannel & kWM8904_RecordChannelDifferentialPositive1)
1288  {
1289  rightPositiveChannel = 0U;
1290  }
1291  else if (rightRecordChannel & kWM8904_RecordChannelDifferentialPositive2)
1292  {
1293  rightPositiveChannel = 1U;
1294  }
1295  else
1296  {
1297  rightPositiveChannel = 2U;
1298  }
1299 
1300  if (rightRecordChannel & kWM8904_RecordChannelDifferentialNegative1)
1301  {
1302  rightNegativeChannel = 0U;
1303  }
1304  else if (rightRecordChannel & kWM8904_RecordChannelDifferentialNegative2)
1305  {
1306  rightNegativeChannel = 1U;
1307  }
1308  else if (rightRecordChannel & kWM8904_RecordChannelDifferentialNegative3)
1309  {
1310  rightNegativeChannel = 2U;
1311  }
1312  else
1313  {
1314  rightNegativeChannel = rightPositiveChannel;
1315  }
1316 
1317  regLeftValue = ((leftNegativeChannel & 3U) << 4U) | ((leftPositiveChannel & 3U) << 2U);
1318  regRightValue = ((rightNegativeChannel & 3U) << 4U) | ((rightPositiveChannel & 3U) << 2U);
1319  regBitMask = 0x3CU;
1320 
1321  ret = WM8904_ModifyRegister(handle, regLeftAddr, regBitMask, regLeftValue);
1322 
1323  if ((ret == kStatus_Success) && (regRightAddr))
1324  {
1325  return WM8904_ModifyRegister(handle, regRightAddr, regBitMask, regRightValue);
1326  }
1327 
1328  return kStatus_Success;
1329 }
1330 
1339 status_t WM8904_SetPlay(wm8904_handle_t *handle, uint32_t playSource)
1340 {
1341  uint16_t regValue = 0U, regBitMask = 0xFU;
1342 
1343  /* source form PGA*/
1344  if (playSource == kWM8904_PlaySourcePGA)
1345  {
1346  regValue |= (3U << 2U) | 3U;
1347  }
1348  /* source from DAC*/
1349  if (playSource == kWM8904_PlaySourceDAC)
1350  {
1351  regValue &= ~((3U << 2U) | 3U);
1352  }
1353 
1354  return WM8904_ModifyRegister(handle, WM8904_ANALOG_OUT12_ZC, regBitMask, regValue);
1355 }
WM8904_CheckAudioFormat
status_t WM8904_CheckAudioFormat(wm8904_handle_t *handle, wm8904_audio_format_t *format, uint32_t mclkFreq)
check and update the audio data format. This api is used check the fsRatio setting based on the mclk ...
Definition: fsl_wm8904.c:769
WM8904_UpdateFormat
static status_t WM8904_UpdateFormat(wm8904_handle_t *handle, wm8904_audio_format_t *format)
WM8904 update format.
Definition: fsl_wm8904.c:66
WM8904_FLL_CONTROL_2
#define WM8904_FLL_CONTROL_2
Definition: fsl_wm8904.h:76
kStatus_InvalidArgument
@ kStatus_InvalidArgument
Definition: fsl_common.h:183
kWM8904_RecordSourceDigitalMic
@ kWM8904_RecordSourceDigitalMic
Definition: fsl_wm8904.h:186
WM8904_SetChannelVolume
status_t WM8904_SetChannelVolume(wm8904_handle_t *handle, uint32_t channel, uint32_t volume)
Sets the channel output volume.
Definition: fsl_wm8904.c:1059
kWM8904_FsRatio512X
@ kWM8904_FsRatio512X
Definition: fsl_wm8904.h:153
kWM8904_FsRatio64X
@ kWM8904_FsRatio64X
Definition: fsl_wm8904.h:148
kWM8904_BitWidth20
@ kWM8904_BitWidth20
Definition: fsl_wm8904.h:175
kWM8904_ModuleLineout
@ kWM8904_ModuleLineout
Definition: fsl_wm8904.h:116
WM8904_POWER_MGMT_6
#define WM8904_POWER_MGMT_6
Definition: fsl_wm8904.h:43
WM8904_CLK_RATES_2
#define WM8904_CLK_RATES_2
Definition: fsl_wm8904.h:46
kWM8904_FsRatio1536X
@ kWM8904_FsRatio1536X
Definition: fsl_wm8904.h:157
WM8904_POWER_MGMT_0
#define WM8904_POWER_MGMT_0
Definition: fsl_wm8904.h:40
NULL
#define NULL
Definition: porcupine/demo/c/dr_libs/tests/external/miniaudio/extras/speex_resampler/thirdparty/resample.c:92
WM8904_ANALOG_OUT2_LEFT
#define WM8904_ANALOG_OUT2_LEFT
Definition: fsl_wm8904.h:71
kWM8904_SampleRate16kHz
@ kWM8904_SampleRate16kHz
Definition: fsl_wm8904.h:165
PRINTF
#define PRINTF
Definition to select redirect toolchain printf, scanf to uart or not.
Definition: fsl_debug_console.h:76
_wm8904_config::i2cConfig
codec_i2c_config_t i2cConfig
Definition: fsl_wm8904.h:258
_codec_i2c_config::codecI2CSourceClock
uint32_t codecI2CSourceClock
Definition: fsl_codec_i2c.h:42
CODEC_I2C_Init
status_t CODEC_I2C_Init(void *handle, uint32_t i2cInstance, uint32_t i2cBaudrate, uint32_t i2cSourceClockHz)
Codec i2c bus initilization.
Definition: fsl_codec_i2c.c:30
WM8904_SWAP_UINT16_BYTE_SEQUENCE
#define WM8904_SWAP_UINT16_BYTE_SEQUENCE(x)
Definition: fsl_wm8904.c:20
WM8904_CLK_RATES_1
#define WM8904_CLK_RATES_1
Definition: fsl_wm8904.h:45
kWM8904_ModuleHeadphone
@ kWM8904_ModuleHeadphone
Definition: fsl_wm8904.h:115
WM8904_AUDIO_IF_1
#define WM8904_AUDIO_IF_1
Definition: fsl_wm8904.h:48
kWM8904_FsRatio384X
@ kWM8904_FsRatio384X
Definition: fsl_wm8904.h:152
kStatus_WM8904_Success
@ kStatus_WM8904_Success
Definition: fsl_wm8904.h:98
kWM8904_HeadphoneRight
@ kWM8904_HeadphoneRight
Definition: fsl_wm8904.h:123
kWM8904_SampleRate12kHz
@ kWM8904_SampleRate12kHz
Definition: fsl_wm8904.h:164
WM8904_ANALOG_ADC_0
#define WM8904_ANALOG_ADC_0
Definition: fsl_wm8904.h:39
kWM8904_FsRatio1024X
@ kWM8904_FsRatio1024X
Definition: fsl_wm8904.h:155
kWM8904_HeadphoneLeft
@ kWM8904_HeadphoneLeft
Definition: fsl_wm8904.h:122
WM8904_I2C_BITRATE
#define WM8904_I2C_BITRATE
WM8904 I2C bit rate.
Definition: fsl_wm8904.h:93
WM8904_ANALOG_HP_0
#define WM8904_ANALOG_HP_0
Definition: fsl_wm8904.h:61
kWM8904_PlaySourcePGA
@ kWM8904_PlaySourcePGA
Definition: fsl_wm8904.h:209
kWM8904_SampleRate8kHz
@ kWM8904_SampleRate8kHz
Definition: fsl_wm8904.h:163
WM8904_CHRG_PUMP_0
#define WM8904_CHRG_PUMP_0
Definition: fsl_wm8904.h:62
WM8904_ANALOG_OUT12_ZC
#define WM8904_ANALOG_OUT12_ZC
Definition: fsl_wm8904.h:59
kWM8904_FsRatio1408X
@ kWM8904_FsRatio1408X
Definition: fsl_wm8904.h:156
WM8904_POWER_MGMT_3
#define WM8904_POWER_MGMT_3
Definition: fsl_wm8904.h:42
kWM8904_FsRatio192X
@ kWM8904_FsRatio192X
Definition: fsl_wm8904.h:150
_wm8904_config
Configuration structure of WM8904.
Definition: fsl_wm8904.h:243
WM8904_ANALOG_RIGHT_IN_0
#define WM8904_ANALOG_RIGHT_IN_0
Definition: fsl_wm8904.h:54
WM8904_SetModulePower
status_t WM8904_SetModulePower(wm8904_handle_t *handle, wm8904_module_t module, bool isEnabled)
Definition: fsl_wm8904.c:1145
_wm8904_audio_format::bitWidth
wm8904_bit_width_t bitWidth
Definition: fsl_wm8904.h:239
WM8904_AUDIO_IF_2
#define WM8904_AUDIO_IF_2
Definition: fsl_wm8904.h:49
WM8904_FLL_CONTROL_5
#define WM8904_FLL_CONTROL_5
Definition: fsl_wm8904.h:79
kWM8904_ModuleADC
@ kWM8904_ModuleADC
Definition: fsl_wm8904.h:112
WM8904_ANALOG_LEFT_IN_1
#define WM8904_ANALOG_LEFT_IN_1
Definition: fsl_wm8904.h:55
WM8904_WRT_SEQUENCER_4
#define WM8904_WRT_SEQUENCER_4
Definition: fsl_wm8904.h:66
kWM8904_LineoutLeft
@ kWM8904_LineoutLeft
Definition: fsl_wm8904.h:124
WM8904_SeMasterClock
status_t WM8904_SeMasterClock(wm8904_handle_t *handle, uint32_t sysclk, uint32_t sampleRate, uint32_t bitWidth)
Sets WM8904 master clock configuration.
Definition: fsl_wm8904.c:485
kStatus_HAL_I2cSuccess
@ kStatus_HAL_I2cSuccess
Definition: i2c.h:29
WM8904_MAP_HEADPHONE_LINEOUT_VOLUME
#define WM8904_MAP_HEADPHONE_LINEOUT_VOLUME(volume)
Definition: fsl_wm8904.c:19
CODEC_I2C_Send
status_t CODEC_I2C_Send(void *handle, uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *txBuff, uint8_t txBuffSize)
codec i2c send function.
Definition: fsl_codec_i2c.c:64
_wm8904_audio_format::fsRatio
wm8904_fs_ratio_t fsRatio
Definition: fsl_wm8904.h:237
wm8904_protocol_t
enum _wm8904_protocol wm8904_protocol_t
The audio data transfer protocol.
WM8904_AUDIO_IF_3
#define WM8904_AUDIO_IF_3
Definition: fsl_wm8904.h:50
kWM8904_ModuleDAC
@ kWM8904_ModuleDAC
Definition: fsl_wm8904.h:113
WM8904_Deinit
status_t WM8904_Deinit(wm8904_handle_t *handle)
Deinitializes the WM8904 codec.
Definition: fsl_wm8904.c:432
CODEC_I2C_Deinit
status_t CODEC_I2C_Deinit(void *handle)
Codec i2c de-initilization.
Definition: fsl_codec_i2c.c:48
WM8904_FLL_CONTROL_3
#define WM8904_FLL_CONTROL_3
Definition: fsl_wm8904.h:77
kWM8904_RecordChannelDifferentialPositive1
@ kWM8904_RecordChannelDifferentialPositive1
Definition: fsl_wm8904.h:198
WM8904_ANALOG_LEFT_IN_0
#define WM8904_ANALOG_LEFT_IN_0
Definition: fsl_wm8904.h:53
kWM8904_ModulePGA
@ kWM8904_ModulePGA
Definition: fsl_wm8904.h:114
kWM8904_RecordSourceDifferentialMic
@ kWM8904_RecordSourceDifferentialMic
Definition: fsl_wm8904.h:185
WM8904_SetPlay
status_t WM8904_SetPlay(wm8904_handle_t *handle, uint32_t playSource)
SET the WM8904 play source.
Definition: fsl_wm8904.c:1339
kWM8904_SysClkSourceFLL
@ kWM8904_SysClkSourceFLL
Definition: fsl_wm8904.h:217
_wm8904_audio_format
Audio format configuration.
Definition: fsl_wm8904.h:235
WM8904_WriteRegister
status_t WM8904_WriteRegister(wm8904_handle_t *handle, uint8_t reg, uint16_t value)
WM8904 write register.
Definition: fsl_wm8904.c:129
WM8904_WaitOnWriteSequencer
static status_t WM8904_WaitOnWriteSequencer(wm8904_handle_t *handle)
WM8904 wait on write sequencer.
Definition: fsl_wm8904.c:108
kWM8904_RecordChannelDifferentialNegative3
@ kWM8904_RecordChannelDifferentialNegative3
Definition: fsl_wm8904.h:203
WM8904_WRT_SEQUENCER_3
#define WM8904_WRT_SEQUENCER_3
Definition: fsl_wm8904.h:65
WM8904_DAC_DIG_1
#define WM8904_DAC_DIG_1
Definition: fsl_wm8904.h:51
WM8904_FLL_CONTROL_4
#define WM8904_FLL_CONTROL_4
Definition: fsl_wm8904.h:78
WM8904_ANALOG_OUT1_LEFT
#define WM8904_ANALOG_OUT1_LEFT
Definition: fsl_wm8904.h:57
kStatus_WM8904_Fail
@ kStatus_WM8904_Fail
Definition: fsl_wm8904.h:99
WM8904_GPIO_CONTROL_4
#define WM8904_GPIO_CONTROL_4
Definition: fsl_wm8904.h:84
WM8904_WRT_SEQUENCER_0
#define WM8904_WRT_SEQUENCER_0
Definition: fsl_wm8904.h:64
fsl_wm8904.h
WM8904_ANALOG_RIGHT_IN_1
#define WM8904_ANALOG_RIGHT_IN_1
Definition: fsl_wm8904.h:56
kStatus_Fail
@ kStatus_Fail
Definition: fsl_common.h:180
WM8904_ModifyRegister
status_t WM8904_ModifyRegister(wm8904_handle_t *handle, uint8_t reg, uint16_t mask, uint16_t value)
WM8904 modify register.
Definition: fsl_wm8904.c:171
WM8904_Init
status_t WM8904_Init(wm8904_handle_t *handle, wm8904_config_t *wm8904Config)
Initializes WM8904.
Definition: fsl_wm8904.c:194
WM8904_SetRecordChannel
status_t WM8904_SetRecordChannel(wm8904_handle_t *handle, uint32_t leftRecordChannel, uint32_t rightRecordChannel)
SET the WM8904 record source.
Definition: fsl_wm8904.c:1250
kWM8904_BitWidth16
@ kWM8904_BitWidth16
Definition: fsl_wm8904.h:174
kWM8904_LineoutRight
@ kWM8904_LineoutRight
Definition: fsl_wm8904.h:125
WM8904_SetProtocol
status_t WM8904_SetProtocol(wm8904_handle_t *handle, wm8904_protocol_t protocol)
Sets the audio data transfer protocol.
Definition: fsl_wm8904.c:715
kWM8904_RecordSourceLineInput
@ kWM8904_RecordSourceLineInput
Definition: fsl_wm8904.h:184
WM8904_SetMute
status_t WM8904_SetMute(wm8904_handle_t *handle, bool muteLeft, bool muteRight)
Sets the headphone output mute.
Definition: fsl_wm8904.c:994
_wm8904_handle
wm8904 codec handler
Definition: fsl_wm8904.h:263
kWM8904_FsRatio768X
@ kWM8904_FsRatio768X
Definition: fsl_wm8904.h:154
_wm8904_config::slaveAddress
uint8_t slaveAddress
Definition: fsl_wm8904.h:257
WM8904_ReadRegister
status_t WM8904_ReadRegister(wm8904_handle_t *handle, uint8_t reg, uint16_t *value)
WM8904 write register.
Definition: fsl_wm8904.c:147
fsl_debug_console.h
kWM8904_SampleRate24kHz
@ kWM8904_SampleRate24kHz
Definition: fsl_wm8904.h:166
WM8904_POWER_MGMT_2
#define WM8904_POWER_MGMT_2
Definition: fsl_wm8904.h:41
kWM8904_BitWidth24
@ kWM8904_BitWidth24
Definition: fsl_wm8904.h:176
WM8904_EnableADCTDMMode
status_t WM8904_EnableADCTDMMode(wm8904_handle_t *handle, wm8904_timeslot_t timeSlot)
Enable WM8904 ADC time slot.
Definition: fsl_wm8904.c:754
WM8904_MAP_SAMPLERATE
#define WM8904_MAP_SAMPLERATE(x)
Definition: fsl_wm8904.c:21
WM8904_ANALOG_OUT1_RIGHT
#define WM8904_ANALOG_OUT1_RIGHT
Definition: fsl_wm8904.h:58
kWM8904_RecordChannelDifferentialNegative1
@ kWM8904_RecordChannelDifferentialNegative1
Definition: fsl_wm8904.h:201
wm8904_module_t
enum _wm8904_module wm8904_module_t
wm8904 module value
kWM8904_FsRatio256X
@ kWM8904_FsRatio256X
Definition: fsl_wm8904.h:151
WM8904_RESET
#define WM8904_RESET
WM8904 register map.
Definition: fsl_wm8904.h:38
wm8904_timeslot_t
enum _wm8904_timeslot wm8904_timeslot_t
WM8904 time slot.
kWM8904_SampleRate32kHz
@ kWM8904_SampleRate32kHz
Definition: fsl_wm8904.h:167
WM8904_MAP_BITWIDTH
#define WM8904_MAP_BITWIDTH(x)
Definition: fsl_wm8904.c:29
WM8904_DAC_DIG_0
#define WM8904_DAC_DIG_0
Definition: fsl_wm8904.h:52
_wm8904_audio_format::sampleRate
wm8904_sample_rate_t sampleRate
Definition: fsl_wm8904.h:238
_wm8904_handle::i2cHandle
uint8_t i2cHandle[WM8904_I2C_HANDLER_SIZE]
Definition: fsl_wm8904.h:266
kWM8904_RecordChannelDifferentialPositive2
@ kWM8904_RecordChannelDifferentialPositive2
Definition: fsl_wm8904.h:199
kWM8904_RecordChannelDifferentialNegative2
@ kWM8904_RecordChannelDifferentialNegative2
Definition: fsl_wm8904.h:202
WM8904_ANALOG_OUT2_RIGHT
#define WM8904_ANALOG_OUT2_RIGHT
Definition: fsl_wm8904.h:72
kWM8904_ProtocolI2S
@ kWM8904_ProtocolI2S
Definition: fsl_wm8904.h:138
kWM8904_FsRatio128X
@ kWM8904_FsRatio128X
Definition: fsl_wm8904.h:149
_wm8904_fll_config
wm8904 fll configuration
Definition: fsl_wm8904.h:227
_codec_i2c_config::codecI2CInstance
uint32_t codecI2CInstance
Definition: fsl_codec_i2c.h:41
_wm8904_handle::config
wm8904_config_t * config
Definition: fsl_wm8904.h:265
WM8904_GetDefaultConfig
void WM8904_GetDefaultConfig(wm8904_config_t *config)
Fills the configuration structure with default values.
Definition: fsl_wm8904.c:456
WM8904_SelectLRCPolarity
status_t WM8904_SelectLRCPolarity(wm8904_handle_t *handle, uint32_t polarity)
Select LRC polarity.
Definition: fsl_wm8904.c:728
WM8904_SetRecord
status_t WM8904_SetRecord(wm8904_handle_t *handle, uint32_t recordSource)
SET the WM8904 record source.
Definition: fsl_wm8904.c:1195
config
static sai_transceiver_t config
Definition: imxrt1050/imxrt1050-evkb/source/pv_audio_rec.c:75
WM8904_CLK_RATES_0
#define WM8904_CLK_RATES_0
Definition: fsl_wm8904.h:44
kWM8904_BitWidth32
@ kWM8904_BitWidth32
Definition: fsl_wm8904.h:177
WM8904_SetVolume
status_t WM8904_SetVolume(wm8904_handle_t *handle, uint16_t volumeLeft, uint16_t volumeRight)
Sets the module output volume.
Definition: fsl_wm8904.c:966
WM8904_SetAudioFormat
status_t WM8904_SetAudioFormat(wm8904_handle_t *handle, uint32_t sysclk, uint32_t sampleRate, uint32_t bitWidth)
Sets the audio data format.
Definition: fsl_wm8904.c:860
CODEC_I2C_Receive
status_t CODEC_I2C_Receive(void *handle, uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
codec i2c receive function.
Definition: fsl_codec_i2c.c:95
WM8904_EnableDACTDMMode
status_t WM8904_EnableDACTDMMode(wm8904_handle_t *handle, wm8904_timeslot_t timeSlot)
Enable WM8904 DAC time slot.
Definition: fsl_wm8904.c:741
WM8904_CLS_W_0
#define WM8904_CLS_W_0
Definition: fsl_wm8904.h:63
kWM8904_SampleRate48kHz
@ kWM8904_SampleRate48kHz
Definition: fsl_wm8904.h:168
kWM8904_PlaySourceDAC
@ kWM8904_PlaySourceDAC
Definition: fsl_wm8904.h:210
WM8904_SetFLLConfig
status_t WM8904_SetFLLConfig(wm8904_handle_t *handle, wm8904_fll_config_t *config)
WM8904 set PLL configuration This function will enable the GPIO1 FLL clock output function,...
Definition: fsl_wm8904.c:591
WM8904_DC_SERVO_0
#define WM8904_DC_SERVO_0
Definition: fsl_wm8904.h:60
WM8904_SetMasterSlave
status_t WM8904_SetMasterSlave(wm8904_handle_t *handle, bool master)
Sets WM8904 as master or slave.
Definition: fsl_wm8904.c:474
WM8904_AUDIO_IF_0
#define WM8904_AUDIO_IF_0
Definition: fsl_wm8904.h:47
status_t
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:189
WM8904_FLL_CONTROL_1
#define WM8904_FLL_CONTROL_1
Definition: fsl_wm8904.h:75
kStatus_Success
@ kStatus_Success
Definition: fsl_common.h:179
kWM8904_RecordSourceDifferentialLine
@ kWM8904_RecordSourceDifferentialLine
Definition: fsl_wm8904.h:183
WM8904_SetChannelMute
status_t WM8904_SetChannelMute(wm8904_handle_t *handle, uint32_t channel, bool isMute)
Sets the channel mute.
Definition: fsl_wm8904.c:1101


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:13:56