wdt.c
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1 
43 /*
44  * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
45  */
46 
47 #include "wdt.h"
48 
50 
51 #ifdef __cplusplus
52 extern "C" {
53 #endif
54 
55 
71 #define WDT_KEY_PASSWORD 0xA5000000
72 #define WDT_SLCK_DIV 128
73 #define WDT_MAX_VALUE 4095
74 
88 uint32_t wdt_get_timeout_value(uint32_t ul_us, uint32_t ul_sclk)
89 {
90  uint32_t max, min;
91 
92  min = WDT_SLCK_DIV * 1000000 / ul_sclk;
93  max = min * WDT_MAX_VALUE;
94 
95  if ((ul_us < min) || (ul_us > max)) {
96  return WDT_INVALID_ARGUMENT;
97  }
98 
99  return WDT_MR_WDV(ul_us / min);
100 }
101 
110 void wdt_init(Wdt *p_wdt, uint32_t ul_mode, uint16_t us_counter,
111  uint16_t us_delta)
112 {
113  p_wdt->WDT_MR = ul_mode |
114  WDT_MR_WDV(us_counter) | WDT_MR_WDD(us_delta);
115 }
116 
120 void wdt_disable(Wdt *p_wdt)
121 {
122  p_wdt->WDT_MR = WDT_MR_WDDIS;
123 
124 }
125 
129 void wdt_restart(Wdt *p_wdt)
130 {
131  if (p_wdt == WDT) {
133  }
134 #if (SAM4C || SAM4CM || SAM4CP)
135  else {
136  p_wdt->WDT_CR = RSWDT_CR_KEY(0xC4u) | RSWDT_CR_WDRSTT;
137  }
138 #endif
139 }
140 
146 uint32_t wdt_get_status(Wdt *p_wdt)
147 {
148  return p_wdt->WDT_SR;
149 }
150 
159 uint32_t wdt_get_us_timeout_period(Wdt *p_wdt, uint32_t ul_sclk)
160 {
161  return WDT_MR_WDV(p_wdt->WDT_MR) * WDT_SLCK_DIV / ul_sclk * 1000000;
162 }
163 
165 
167 
168 #ifdef __cplusplus
169 }
170 #endif
171 
172 
void wdt_restart(Wdt *p_wdt)
Restart the watchdog timer.
Definition: wdt.c:129
#define WDT_INVALID_ARGUMENT
uint32_t wdt_get_status(Wdt *p_wdt)
Check the watchdog timer status.
Definition: wdt.c:146
#define WDT_MR_WDV(value)
__I uint32_t WDT_SR
(Wdt Offset: 0x08) Status Register
#define WDT_MR_WDD(value)
void wdt_disable(Wdt *p_wdt)
Disable the watchdog timer.
Definition: wdt.c:120
uint32_t wdt_get_timeout_value(uint32_t ul_us, uint32_t ul_sclk)
Get counter value or permitted range value of watchdog timer from the desired timeout period (in us)...
Definition: wdt.c:88
#define min(a, b)
Takes the minimal value of a and b.
Definition: compiler.h:812
#define max(a, b)
Takes the maximal value of a and b.
Definition: compiler.h:823
#define WDT_SLCK_DIV
Definition: wdt.c:72
#define WDT_CR_WDRSTT
(WDT_CR) Watchdog Restart
#define WDT
(WDT ) Base Address
Definition: same70j19.h:535
__IO uint32_t WDT_MR
(Wdt Offset: 0x04) Mode Register
#define WDT_KEY_PASSWORD
Definition: wdt.c:71
__O uint32_t WDT_CR
(Wdt Offset: 0x00) Control Register
Wdt hardware registers.
Watchdog Timer (WDT) driver for SAM.
#define WDT_MAX_VALUE
Definition: wdt.c:73
#define RSWDT_CR_WDRSTT
(RSWDT_CR) Watchdog Restart
#define RSWDT_CR_KEY(value)
uint32_t wdt_get_us_timeout_period(Wdt *p_wdt, uint32_t ul_sclk)
Get the timeout period of the WatchDog Timer in microseconds.
Definition: wdt.c:159
void wdt_init(Wdt *p_wdt, uint32_t ul_mode, uint16_t us_counter, uint16_t us_delta)
Initialize watchdog timer with the given mode.
Definition: wdt.c:110
#define WDT_MR_WDDIS
(WDT_MR) Watchdog Disable


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autogenerated on Sun Feb 28 2021 03:17:58