usart0.h
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1 
31 /*
32  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
33  */
34 
35 #ifndef _SAME70_USART0_INSTANCE_
36 #define _SAME70_USART0_INSTANCE_
37 
38 /* ========== Register definition for USART0 peripheral ========== */
39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
40  #define REG_USART0_CR (0x40024000U)
41  #define REG_USART0_MR (0x40024004U)
42  #define REG_USART0_IER (0x40024008U)
43  #define REG_USART0_IDR (0x4002400CU)
44  #define REG_USART0_IMR (0x40024010U)
45  #define REG_USART0_CSR (0x40024014U)
46  #define REG_USART0_RHR (0x40024018U)
47  #define REG_USART0_THR (0x4002401CU)
48  #define REG_USART0_BRGR (0x40024020U)
49  #define REG_USART0_RTOR (0x40024024U)
50  #define REG_USART0_TTGR (0x40024028U)
51  #define REG_USART0_FIDI (0x40024040U)
52  #define REG_USART0_NER (0x40024044U)
53  #define REG_USART0_IF (0x4002404CU)
54  #define REG_USART0_MAN (0x40024050U)
55  #define REG_USART0_LINMR (0x40024054U)
56  #define REG_USART0_LINIR (0x40024058U)
57  #define REG_USART0_LINBRR (0x4002405CU)
58  #define REG_USART0_LONMR (0x40024060U)
59  #define REG_USART0_LONPR (0x40024064U)
60  #define REG_USART0_LONDL (0x40024068U)
61  #define REG_USART0_LONL2HDR (0x4002406CU)
62  #define REG_USART0_LONBL (0x40024070U)
63  #define REG_USART0_LONB1TX (0x40024074U)
64  #define REG_USART0_LONB1RX (0x40024078U)
65  #define REG_USART0_LONPRIO (0x4002407CU)
66  #define REG_USART0_IDTTX (0x40024080U)
67  #define REG_USART0_IDTRX (0x40024084U)
68  #define REG_USART0_ICDIFF (0x40024088U)
69  #define REG_USART0_WPMR (0x400240E4U)
70  #define REG_USART0_WPSR (0x400240E8U)
71  #define REG_USART0_VERSION (0x400240FCU)
72 #else
73  #define REG_USART0_CR (*(__O uint32_t*)0x40024000U)
74  #define REG_USART0_MR (*(__IO uint32_t*)0x40024004U)
75  #define REG_USART0_IER (*(__O uint32_t*)0x40024008U)
76  #define REG_USART0_IDR (*(__O uint32_t*)0x4002400CU)
77  #define REG_USART0_IMR (*(__I uint32_t*)0x40024010U)
78  #define REG_USART0_CSR (*(__I uint32_t*)0x40024014U)
79  #define REG_USART0_RHR (*(__I uint32_t*)0x40024018U)
80  #define REG_USART0_THR (*(__O uint32_t*)0x4002401CU)
81  #define REG_USART0_BRGR (*(__IO uint32_t*)0x40024020U)
82  #define REG_USART0_RTOR (*(__IO uint32_t*)0x40024024U)
83  #define REG_USART0_TTGR (*(__IO uint32_t*)0x40024028U)
84  #define REG_USART0_FIDI (*(__IO uint32_t*)0x40024040U)
85  #define REG_USART0_NER (*(__I uint32_t*)0x40024044U)
86  #define REG_USART0_IF (*(__IO uint32_t*)0x4002404CU)
87  #define REG_USART0_MAN (*(__IO uint32_t*)0x40024050U)
88  #define REG_USART0_LINMR (*(__IO uint32_t*)0x40024054U)
89  #define REG_USART0_LINIR (*(__IO uint32_t*)0x40024058U)
90  #define REG_USART0_LINBRR (*(__I uint32_t*)0x4002405CU)
91  #define REG_USART0_LONMR (*(__IO uint32_t*)0x40024060U)
92  #define REG_USART0_LONPR (*(__IO uint32_t*)0x40024064U)
93  #define REG_USART0_LONDL (*(__IO uint32_t*)0x40024068U)
94  #define REG_USART0_LONL2HDR (*(__IO uint32_t*)0x4002406CU)
95  #define REG_USART0_LONBL (*(__I uint32_t*)0x40024070U)
96  #define REG_USART0_LONB1TX (*(__IO uint32_t*)0x40024074U)
97  #define REG_USART0_LONB1RX (*(__IO uint32_t*)0x40024078U)
98  #define REG_USART0_LONPRIO (*(__IO uint32_t*)0x4002407CU)
99  #define REG_USART0_IDTTX (*(__IO uint32_t*)0x40024080U)
100  #define REG_USART0_IDTRX (*(__IO uint32_t*)0x40024084U)
101  #define REG_USART0_ICDIFF (*(__IO uint32_t*)0x40024088U)
102  #define REG_USART0_WPMR (*(__IO uint32_t*)0x400240E4U)
103  #define REG_USART0_WPSR (*(__I uint32_t*)0x400240E8U)
104  #define REG_USART0_VERSION (*(__I uint32_t*)0x400240FCU)
105 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
106 
107 #endif /* _SAME70_USART0_INSTANCE_ */

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autogenerated on Sun Feb 28 2021 03:17:58