Macros
twihs1.h File Reference
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Macros

#define REG_TWIHS1_CR   (*(__O uint32_t*)0x4001C000U)
 (TWIHS1) Control Register More...
 
#define REG_TWIHS1_CWGR   (*(__IO uint32_t*)0x4001C010U)
 (TWIHS1) Clock Waveform Generator Register More...
 
#define REG_TWIHS1_DR   (*(__I uint32_t*)0x4001C0D0U)
 (TWIHS1) Debug Register More...
 
#define REG_TWIHS1_FILTR   (*(__IO uint32_t*)0x4001C044U)
 (TWIHS1) Filter Register More...
 
#define REG_TWIHS1_IADR   (*(__IO uint32_t*)0x4001C00CU)
 (TWIHS1) Internal Address Register More...
 
#define REG_TWIHS1_IDR   (*(__O uint32_t*)0x4001C028U)
 (TWIHS1) Interrupt Disable Register More...
 
#define REG_TWIHS1_IER   (*(__O uint32_t*)0x4001C024U)
 (TWIHS1) Interrupt Enable Register More...
 
#define REG_TWIHS1_IMR   (*(__I uint32_t*)0x4001C02CU)
 (TWIHS1) Interrupt Mask Register More...
 
#define REG_TWIHS1_MMR   (*(__IO uint32_t*)0x4001C004U)
 (TWIHS1) Master Mode Register More...
 
#define REG_TWIHS1_RHR   (*(__I uint32_t*)0x4001C030U)
 (TWIHS1) Receive Holding Register More...
 
#define REG_TWIHS1_SMBTR   (*(__IO uint32_t*)0x4001C038U)
 (TWIHS1) SMBus Timing Register More...
 
#define REG_TWIHS1_SMR   (*(__IO uint32_t*)0x4001C008U)
 (TWIHS1) Slave Mode Register More...
 
#define REG_TWIHS1_SR   (*(__I uint32_t*)0x4001C020U)
 (TWIHS1) Status Register More...
 
#define REG_TWIHS1_SWMR   (*(__IO uint32_t*)0x4001C04CU)
 (TWIHS1) SleepWalking Matching Register More...
 
#define REG_TWIHS1_THR   (*(__O uint32_t*)0x4001C034U)
 (TWIHS1) Transmit Holding Register More...
 
#define REG_TWIHS1_VER   (*(__I uint32_t*)0x4001C0FCU)
 (TWIHS1) Version Register More...
 
#define REG_TWIHS1_WPMR   (*(__IO uint32_t*)0x4001C0E4U)
 (TWIHS1) Write Protection Mode Register More...
 
#define REG_TWIHS1_WPSR   (*(__I uint32_t*)0x4001C0E8U)
 (TWIHS1) Write Protection Status Register More...
 

Detailed Description

Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.

Definition in file twihs1.h.

Macro Definition Documentation

◆ REG_TWIHS1_CR

#define REG_TWIHS1_CR   (*(__O uint32_t*)0x4001C000U)

(TWIHS1) Control Register

Definition at line 59 of file twihs1.h.

◆ REG_TWIHS1_CWGR

#define REG_TWIHS1_CWGR   (*(__IO uint32_t*)0x4001C010U)

(TWIHS1) Clock Waveform Generator Register

Definition at line 63 of file twihs1.h.

◆ REG_TWIHS1_DR

#define REG_TWIHS1_DR   (*(__I uint32_t*)0x4001C0D0U)

(TWIHS1) Debug Register

Definition at line 73 of file twihs1.h.

◆ REG_TWIHS1_FILTR

#define REG_TWIHS1_FILTR   (*(__IO uint32_t*)0x4001C044U)

(TWIHS1) Filter Register

Definition at line 71 of file twihs1.h.

◆ REG_TWIHS1_IADR

#define REG_TWIHS1_IADR   (*(__IO uint32_t*)0x4001C00CU)

(TWIHS1) Internal Address Register

Definition at line 62 of file twihs1.h.

◆ REG_TWIHS1_IDR

#define REG_TWIHS1_IDR   (*(__O uint32_t*)0x4001C028U)

(TWIHS1) Interrupt Disable Register

Definition at line 66 of file twihs1.h.

◆ REG_TWIHS1_IER

#define REG_TWIHS1_IER   (*(__O uint32_t*)0x4001C024U)

(TWIHS1) Interrupt Enable Register

Definition at line 65 of file twihs1.h.

◆ REG_TWIHS1_IMR

#define REG_TWIHS1_IMR   (*(__I uint32_t*)0x4001C02CU)

(TWIHS1) Interrupt Mask Register

Definition at line 67 of file twihs1.h.

◆ REG_TWIHS1_MMR

#define REG_TWIHS1_MMR   (*(__IO uint32_t*)0x4001C004U)

(TWIHS1) Master Mode Register

Definition at line 60 of file twihs1.h.

◆ REG_TWIHS1_RHR

#define REG_TWIHS1_RHR   (*(__I uint32_t*)0x4001C030U)

(TWIHS1) Receive Holding Register

Definition at line 68 of file twihs1.h.

◆ REG_TWIHS1_SMBTR

#define REG_TWIHS1_SMBTR   (*(__IO uint32_t*)0x4001C038U)

(TWIHS1) SMBus Timing Register

Definition at line 70 of file twihs1.h.

◆ REG_TWIHS1_SMR

#define REG_TWIHS1_SMR   (*(__IO uint32_t*)0x4001C008U)

(TWIHS1) Slave Mode Register

Definition at line 61 of file twihs1.h.

◆ REG_TWIHS1_SR

#define REG_TWIHS1_SR   (*(__I uint32_t*)0x4001C020U)

(TWIHS1) Status Register

Definition at line 64 of file twihs1.h.

◆ REG_TWIHS1_SWMR

#define REG_TWIHS1_SWMR   (*(__IO uint32_t*)0x4001C04CU)

(TWIHS1) SleepWalking Matching Register

Definition at line 72 of file twihs1.h.

◆ REG_TWIHS1_THR

#define REG_TWIHS1_THR   (*(__O uint32_t*)0x4001C034U)

(TWIHS1) Transmit Holding Register

Definition at line 69 of file twihs1.h.

◆ REG_TWIHS1_VER

#define REG_TWIHS1_VER   (*(__I uint32_t*)0x4001C0FCU)

(TWIHS1) Version Register

Definition at line 76 of file twihs1.h.

◆ REG_TWIHS1_WPMR

#define REG_TWIHS1_WPMR   (*(__IO uint32_t*)0x4001C0E4U)

(TWIHS1) Write Protection Mode Register

Definition at line 74 of file twihs1.h.

◆ REG_TWIHS1_WPSR

#define REG_TWIHS1_WPSR   (*(__I uint32_t*)0x4001C0E8U)

(TWIHS1) Write Protection Status Register

Definition at line 75 of file twihs1.h.



inertial_sense_ros
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autogenerated on Sun Feb 28 2021 03:18:00