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Macros
#define	REG_SPI1_CR ((__O uint32_t)0x40058000U)
	(SPI1) Control Register More...

#define	REG_SPI1_CSR ((__IO uint32_t)0x40058030U)
	(SPI1) Chip Select Register (CS_number = 0) More...

#define	REG_SPI1_IDR ((__O uint32_t)0x40058018U)
	(SPI1) Interrupt Disable Register More...

#define	REG_SPI1_IER ((__O uint32_t)0x40058014U)
	(SPI1) Interrupt Enable Register More...

#define	REG_SPI1_IMR ((__I uint32_t)0x4005801CU)
	(SPI1) Interrupt Mask Register More...

#define	REG_SPI1_MR ((__IO uint32_t)0x40058004U)
	(SPI1) Mode Register More...

#define	REG_SPI1_RDR ((__I uint32_t)0x40058008U)
	(SPI1) Receive Data Register More...

#define	REG_SPI1_SR ((__I uint32_t)0x40058010U)
	(SPI1) Status Register More...

#define	REG_SPI1_TDR ((__O uint32_t)0x4005800CU)
	(SPI1) Transmit Data Register More...

#define	REG_SPI1_VERSION ((__I uint32_t)0x400580FCU)
	(SPI1) Version Register More...

#define	REG_SPI1_WPMR ((__IO uint32_t)0x400580E4U)
	(SPI1) Write Protection Mode Register More...

#define	REG_SPI1_WPSR ((__I uint32_t)0x400580E8U)
	(SPI1) Write Protection Status Register More...

Detailed Description

Definition in file spi1.h.

Macro Definition Documentation

◆ REG_SPI1_CR

#define REG_SPI1_CR (*(__O uint32_t*)0x40058000U)

(SPI1) Control Register

Definition at line 53 of file spi1.h.

◆ REG_SPI1_CSR

#define REG_SPI1_CSR (*(__IO uint32_t*)0x40058030U)

(SPI1) Chip Select Register (CS_number = 0)

Definition at line 61 of file spi1.h.

◆ REG_SPI1_IDR

#define REG_SPI1_IDR (*(__O uint32_t*)0x40058018U)

(SPI1) Interrupt Disable Register

Definition at line 59 of file spi1.h.

◆ REG_SPI1_IER

#define REG_SPI1_IER (*(__O uint32_t*)0x40058014U)

(SPI1) Interrupt Enable Register

Definition at line 58 of file spi1.h.

◆ REG_SPI1_IMR

#define REG_SPI1_IMR (*(__I uint32_t*)0x4005801CU)

(SPI1) Interrupt Mask Register

Definition at line 60 of file spi1.h.

◆ REG_SPI1_MR

#define REG_SPI1_MR (*(__IO uint32_t*)0x40058004U)

(SPI1) Mode Register

Definition at line 54 of file spi1.h.

◆ REG_SPI1_RDR

#define REG_SPI1_RDR (*(__I uint32_t*)0x40058008U)

(SPI1) Receive Data Register

Definition at line 55 of file spi1.h.

◆ REG_SPI1_SR

#define REG_SPI1_SR (*(__I uint32_t*)0x40058010U)

(SPI1) Status Register

Definition at line 57 of file spi1.h.

◆ REG_SPI1_TDR

#define REG_SPI1_TDR (*(__O uint32_t*)0x4005800CU)

(SPI1) Transmit Data Register

Definition at line 56 of file spi1.h.

◆ REG_SPI1_VERSION

#define REG_SPI1_VERSION (*(__I uint32_t*)0x400580FCU)

(SPI1) Version Register

Definition at line 64 of file spi1.h.

◆ REG_SPI1_WPMR

#define REG_SPI1_WPMR (*(__IO uint32_t*)0x400580E4U)

(SPI1) Write Protection Mode Register

Definition at line 62 of file spi1.h.

◆ REG_SPI1_WPSR

#define REG_SPI1_WPSR (*(__I uint32_t*)0x400580E8U)

(SPI1) Write Protection Status Register

Definition at line 63 of file spi1.h.

Macros