Go to the documentation of this file. 35 #ifndef _SAME70_SPI1_INSTANCE_ 36 #define _SAME70_SPI1_INSTANCE_ 39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 40 #define REG_SPI1_CR (0x40058000U) 41 #define REG_SPI1_MR (0x40058004U) 42 #define REG_SPI1_RDR (0x40058008U) 43 #define REG_SPI1_TDR (0x4005800CU) 44 #define REG_SPI1_SR (0x40058010U) 45 #define REG_SPI1_IER (0x40058014U) 46 #define REG_SPI1_IDR (0x40058018U) 47 #define REG_SPI1_IMR (0x4005801CU) 48 #define REG_SPI1_CSR (0x40058030U) 49 #define REG_SPI1_WPMR (0x400580E4U) 50 #define REG_SPI1_WPSR (0x400580E8U) 51 #define REG_SPI1_VERSION (0x400580FCU) 53 #define REG_SPI1_CR (*(__O uint32_t*)0x40058000U) 54 #define REG_SPI1_MR (*(__IO uint32_t*)0x40058004U) 55 #define REG_SPI1_RDR (*(__I uint32_t*)0x40058008U) 56 #define REG_SPI1_TDR (*(__O uint32_t*)0x4005800CU) 57 #define REG_SPI1_SR (*(__I uint32_t*)0x40058010U) 58 #define REG_SPI1_IER (*(__O uint32_t*)0x40058014U) 59 #define REG_SPI1_IDR (*(__O uint32_t*)0x40058018U) 60 #define REG_SPI1_IMR (*(__I uint32_t*)0x4005801CU) 61 #define REG_SPI1_CSR (*(__IO uint32_t*)0x40058030U) 62 #define REG_SPI1_WPMR (*(__IO uint32_t*)0x400580E4U) 63 #define REG_SPI1_WPSR (*(__I uint32_t*)0x400580E8U) 64 #define REG_SPI1_VERSION (*(__I uint32_t*)0x400580FCU)