rtt.c

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/*
 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
 */

#include "rtt.h"


#ifdef __cplusplus
extern "C" {
#endif


/*
 * In follow series chip, the bit RTC1HZ and RTTDIS in RTT_MR are write only.
 * So we use a variable to record status of these bits.
 */
#if (SAM4N || SAM4S || SAM4E || SAM4C || SAMG51 || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)
static uint32_t g_wobits_in_rtt_mr = 0;
#endif

uint32_t rtt_init(Rtt *p_rtt, uint16_t us_prescaler)
{
#if (SAM4N || SAM4S || SAM4E || SAM4C || SAMG51 || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)
        p_rtt->RTT_MR = (us_prescaler | RTT_MR_RTTRST | g_wobits_in_rtt_mr);
#else
        p_rtt->RTT_MR = (us_prescaler | RTT_MR_RTTRST);
#endif
        return 0;
}

#if (SAM4N || SAM4S || SAM4E || SAM4C || SAMG51 || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)

void rtt_sel_source(Rtt *p_rtt, bool is_rtc_sel)
{
        if(is_rtc_sel) {
                g_wobits_in_rtt_mr |= RTT_MR_RTC1HZ;
                p_rtt->RTT_MR |= g_wobits_in_rtt_mr;
        } else {
                g_wobits_in_rtt_mr &= ~RTT_MR_RTC1HZ;
                p_rtt->RTT_MR |= g_wobits_in_rtt_mr;
        }
}

void rtt_enable(Rtt *p_rtt)
{
        g_wobits_in_rtt_mr &= ~RTT_MR_RTTDIS;
        p_rtt->RTT_MR |= g_wobits_in_rtt_mr;
}
void rtt_disable(Rtt *p_rtt)
{
        g_wobits_in_rtt_mr |= RTT_MR_RTTDIS;
        p_rtt->RTT_MR |= g_wobits_in_rtt_mr;
}
#elif (SAMG53 || SAMG54 || SAMG55)
void rtt_sel_source(Rtt *p_rtt, bool is_rtc_sel)
{
        if(is_rtc_sel) {
                p_rtt->RTT_MR |= RTT_MR_RTC1HZ;
        } else {
                p_rtt->RTT_MR &= ~RTT_MR_RTC1HZ;
        }
}

void rtt_enable(Rtt *p_rtt)
{
        p_rtt->RTT_MR &= ~RTT_MR_RTTDIS;
}
void rtt_disable(Rtt *p_rtt)
{
        p_rtt->RTT_MR |= RTT_MR_RTTDIS;
}
#endif

void rtt_enable_interrupt(Rtt *p_rtt, uint32_t ul_sources)
{
        uint32_t temp;

        temp = p_rtt->RTT_MR;
        temp |= ul_sources;
#if (SAM4N || SAM4S || SAM4E || SAM4C || SAMG51 || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)
        temp |= g_wobits_in_rtt_mr;
#endif
        p_rtt->RTT_MR = temp;
}

void rtt_disable_interrupt(Rtt *p_rtt, uint32_t ul_sources)
{
        uint32_t temp = 0;

        temp = p_rtt->RTT_MR;
        temp &= (~ul_sources);
#if (SAM4N || SAM4S || SAM4E || SAM4C || SAMG51 || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)
        temp |= g_wobits_in_rtt_mr;
#endif
        p_rtt->RTT_MR = temp;
}

uint32_t rtt_read_timer_value(Rtt *p_rtt)
{
        uint32_t rtt_val = p_rtt->RTT_VR;

        while (rtt_val != p_rtt->RTT_VR) {
                rtt_val = p_rtt->RTT_VR;
        }

        return rtt_val;
}

uint32_t rtt_get_status(Rtt *p_rtt)
{
        return p_rtt->RTT_SR;
}

uint32_t rtt_write_alarm_time(Rtt *p_rtt, uint32_t ul_alarm_time)
{
        uint32_t flag;

        flag = p_rtt->RTT_MR & RTT_MR_ALMIEN;

        rtt_disable_interrupt(RTT, RTT_MR_ALMIEN);

        if(ul_alarm_time == 0) {
                p_rtt->RTT_AR = 0xFFFFFFFF;
        }
        else {
                p_rtt->RTT_AR = ul_alarm_time - 1;
        }

        if (flag) {
                rtt_enable_interrupt(RTT, RTT_MR_ALMIEN);
        }

        return 0;
}



#ifdef __cplusplus
}
#endif

---

inertial_sense_ros
Author(s):
autogenerated on Sun Feb 28 2021 03:17:58