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Macros | |
| #define | REG_ISI_CFG1 (*(__IO uint32_t*)0x4004C000U) |
| (ISI) ISI Configuration 1 Register More... | |
| #define | REG_ISI_CFG2 (*(__IO uint32_t*)0x4004C004U) |
| (ISI) ISI Configuration 2 Register More... | |
| #define | REG_ISI_CR (*(__O uint32_t*)0x4004C024U) |
| (ISI) ISI Control Register More... | |
| #define | REG_ISI_DMA_C_ADDR (*(__IO uint32_t*)0x4004C050U) |
| (ISI) DMA Codec Base Address Register More... | |
| #define | REG_ISI_DMA_C_CTRL (*(__IO uint32_t*)0x4004C054U) |
| (ISI) DMA Codec Control Register More... | |
| #define | REG_ISI_DMA_C_DSCR (*(__IO uint32_t*)0x4004C058U) |
| (ISI) DMA Codec Descriptor Address Register More... | |
| #define | REG_ISI_DMA_CHDR (*(__O uint32_t*)0x4004C03CU) |
| (ISI) DMA Channel Disable Register More... | |
| #define | REG_ISI_DMA_CHER (*(__O uint32_t*)0x4004C038U) |
| (ISI) DMA Channel Enable Register More... | |
| #define | REG_ISI_DMA_CHSR (*(__I uint32_t*)0x4004C040U) |
| (ISI) DMA Channel Status Register More... | |
| #define | REG_ISI_DMA_P_ADDR (*(__IO uint32_t*)0x4004C044U) |
| (ISI) DMA Preview Base Address Register More... | |
| #define | REG_ISI_DMA_P_CTRL (*(__IO uint32_t*)0x4004C048U) |
| (ISI) DMA Preview Control Register More... | |
| #define | REG_ISI_DMA_P_DSCR (*(__IO uint32_t*)0x4004C04CU) |
| (ISI) DMA Preview Descriptor Address Register More... | |
| #define | REG_ISI_IDR (*(__O uint32_t*)0x4004C030U) |
| (ISI) ISI Interrupt Disable Register More... | |
| #define | REG_ISI_IER (*(__O uint32_t*)0x4004C02CU) |
| (ISI) ISI Interrupt Enable Register More... | |
| #define | REG_ISI_IMR (*(__I uint32_t*)0x4004C034U) |
| (ISI) ISI Interrupt Mask Register More... | |
| #define | REG_ISI_PDECF (*(__IO uint32_t*)0x4004C00CU) |
| (ISI) ISI Preview Decimation Factor Register More... | |
| #define | REG_ISI_PSIZE (*(__IO uint32_t*)0x4004C008U) |
| (ISI) ISI Preview Size Register More... | |
| #define | REG_ISI_R2Y_SET0 (*(__IO uint32_t*)0x4004C018U) |
| (ISI) ISI Color Space Conversion RGB To YCrCb Set 0 Register More... | |
| #define | REG_ISI_R2Y_SET1 (*(__IO uint32_t*)0x4004C01CU) |
| (ISI) ISI Color Space Conversion RGB To YCrCb Set 1 Register More... | |
| #define | REG_ISI_R2Y_SET2 (*(__IO uint32_t*)0x4004C020U) |
| (ISI) ISI Color Space Conversion RGB To YCrCb Set 2 Register More... | |
| #define | REG_ISI_SR (*(__I uint32_t*)0x4004C028U) |
| (ISI) ISI Status Register More... | |
| #define | REG_ISI_VERSION (*(__I uint32_t*)0x4004C0FCU) |
| (ISI) Version Register More... | |
| #define | REG_ISI_WPMR (*(__IO uint32_t*)0x4004C0E4U) |
| (ISI) Write Protection Mode Register More... | |
| #define | REG_ISI_WPSR (*(__I uint32_t*)0x4004C0E8U) |
| (ISI) Write Protection Status Register More... | |
| #define | REG_ISI_Y2R_SET0 (*(__IO uint32_t*)0x4004C010U) |
| (ISI) ISI Color Space Conversion YCrCb To RGB Set 0 Register More... | |
| #define | REG_ISI_Y2R_SET1 (*(__IO uint32_t*)0x4004C014U) |
| (ISI) ISI Color Space Conversion YCrCb To RGB Set 1 Register More... | |
Detailed Description
Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
Definition in file instance/isi.h.
Macro Definition Documentation
◆ REG_ISI_CFG1
| #define REG_ISI_CFG1 (*(__IO uint32_t*)0x4004C000U) |
(ISI) ISI Configuration 1 Register
Definition at line 67 of file instance/isi.h.
◆ REG_ISI_CFG2
| #define REG_ISI_CFG2 (*(__IO uint32_t*)0x4004C004U) |
(ISI) ISI Configuration 2 Register
Definition at line 68 of file instance/isi.h.
◆ REG_ISI_CR
| #define REG_ISI_CR (*(__O uint32_t*)0x4004C024U) |
(ISI) ISI Control Register
Definition at line 76 of file instance/isi.h.
◆ REG_ISI_DMA_C_ADDR
| #define REG_ISI_DMA_C_ADDR (*(__IO uint32_t*)0x4004C050U) |
(ISI) DMA Codec Base Address Register
Definition at line 87 of file instance/isi.h.
◆ REG_ISI_DMA_C_CTRL
| #define REG_ISI_DMA_C_CTRL (*(__IO uint32_t*)0x4004C054U) |
(ISI) DMA Codec Control Register
Definition at line 88 of file instance/isi.h.
◆ REG_ISI_DMA_C_DSCR
| #define REG_ISI_DMA_C_DSCR (*(__IO uint32_t*)0x4004C058U) |
(ISI) DMA Codec Descriptor Address Register
Definition at line 89 of file instance/isi.h.
◆ REG_ISI_DMA_CHDR
| #define REG_ISI_DMA_CHDR (*(__O uint32_t*)0x4004C03CU) |
(ISI) DMA Channel Disable Register
Definition at line 82 of file instance/isi.h.
◆ REG_ISI_DMA_CHER
| #define REG_ISI_DMA_CHER (*(__O uint32_t*)0x4004C038U) |
(ISI) DMA Channel Enable Register
Definition at line 81 of file instance/isi.h.
◆ REG_ISI_DMA_CHSR
| #define REG_ISI_DMA_CHSR (*(__I uint32_t*)0x4004C040U) |
(ISI) DMA Channel Status Register
Definition at line 83 of file instance/isi.h.
◆ REG_ISI_DMA_P_ADDR
| #define REG_ISI_DMA_P_ADDR (*(__IO uint32_t*)0x4004C044U) |
(ISI) DMA Preview Base Address Register
Definition at line 84 of file instance/isi.h.
◆ REG_ISI_DMA_P_CTRL
| #define REG_ISI_DMA_P_CTRL (*(__IO uint32_t*)0x4004C048U) |
(ISI) DMA Preview Control Register
Definition at line 85 of file instance/isi.h.
◆ REG_ISI_DMA_P_DSCR
| #define REG_ISI_DMA_P_DSCR (*(__IO uint32_t*)0x4004C04CU) |
(ISI) DMA Preview Descriptor Address Register
Definition at line 86 of file instance/isi.h.
◆ REG_ISI_IDR
| #define REG_ISI_IDR (*(__O uint32_t*)0x4004C030U) |
(ISI) ISI Interrupt Disable Register
Definition at line 79 of file instance/isi.h.
◆ REG_ISI_IER
| #define REG_ISI_IER (*(__O uint32_t*)0x4004C02CU) |
(ISI) ISI Interrupt Enable Register
Definition at line 78 of file instance/isi.h.
◆ REG_ISI_IMR
| #define REG_ISI_IMR (*(__I uint32_t*)0x4004C034U) |
(ISI) ISI Interrupt Mask Register
Definition at line 80 of file instance/isi.h.
◆ REG_ISI_PDECF
| #define REG_ISI_PDECF (*(__IO uint32_t*)0x4004C00CU) |
(ISI) ISI Preview Decimation Factor Register
Definition at line 70 of file instance/isi.h.
◆ REG_ISI_PSIZE
| #define REG_ISI_PSIZE (*(__IO uint32_t*)0x4004C008U) |
(ISI) ISI Preview Size Register
Definition at line 69 of file instance/isi.h.
◆ REG_ISI_R2Y_SET0
| #define REG_ISI_R2Y_SET0 (*(__IO uint32_t*)0x4004C018U) |
(ISI) ISI Color Space Conversion RGB To YCrCb Set 0 Register
Definition at line 73 of file instance/isi.h.
◆ REG_ISI_R2Y_SET1
| #define REG_ISI_R2Y_SET1 (*(__IO uint32_t*)0x4004C01CU) |
(ISI) ISI Color Space Conversion RGB To YCrCb Set 1 Register
Definition at line 74 of file instance/isi.h.
◆ REG_ISI_R2Y_SET2
| #define REG_ISI_R2Y_SET2 (*(__IO uint32_t*)0x4004C020U) |
(ISI) ISI Color Space Conversion RGB To YCrCb Set 2 Register
Definition at line 75 of file instance/isi.h.
◆ REG_ISI_SR
| #define REG_ISI_SR (*(__I uint32_t*)0x4004C028U) |
(ISI) ISI Status Register
Definition at line 77 of file instance/isi.h.
◆ REG_ISI_VERSION
| #define REG_ISI_VERSION (*(__I uint32_t*)0x4004C0FCU) |
(ISI) Version Register
Definition at line 92 of file instance/isi.h.
◆ REG_ISI_WPMR
| #define REG_ISI_WPMR (*(__IO uint32_t*)0x4004C0E4U) |
(ISI) Write Protection Mode Register
Definition at line 90 of file instance/isi.h.
◆ REG_ISI_WPSR
| #define REG_ISI_WPSR (*(__I uint32_t*)0x4004C0E8U) |
(ISI) Write Protection Status Register
Definition at line 91 of file instance/isi.h.
◆ REG_ISI_Y2R_SET0
| #define REG_ISI_Y2R_SET0 (*(__IO uint32_t*)0x4004C010U) |
(ISI) ISI Color Space Conversion YCrCb To RGB Set 0 Register
Definition at line 71 of file instance/isi.h.
◆ REG_ISI_Y2R_SET1
| #define REG_ISI_Y2R_SET1 (*(__IO uint32_t*)0x4004C014U) |
(ISI) ISI Color Space Conversion YCrCb To RGB Set 1 Register
Definition at line 72 of file instance/isi.h.