SAME70 clock configuration. More...

Go to the source code of this file.
Macros | |
| #define | CONFIG_PLL0_DIV 1 | 
| #define | CONFIG_PLL0_MUL 25 | 
| #define | CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_BYPASS | 
| #define | CONFIG_SYSCLK_DIV 2 | 
| #define | CONFIG_SYSCLK_PRES SYSCLK_PRES_1 | 
| #define | CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK | 
| #define | CONFIG_USBCLK_DIV 1 | 
| Configuration symbol for the USB generic clock divider setting.  More... | |
| #define | CONFIG_USBCLK_SOURCE USBCLK_SRC_UPLL | 
| Configuration symbol for the USB generic clock source.  More... | |
SAME70 clock configuration.
Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
Definition in file conf_clock.h.
| #define CONFIG_PLL0_DIV 1 | 
Definition at line 70 of file conf_clock.h.
| #define CONFIG_PLL0_MUL 25 | 
Definition at line 69 of file conf_clock.h.
| #define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_BYPASS | 
Definition at line 68 of file conf_clock.h.
| #define CONFIG_SYSCLK_DIV 2 | 
Definition at line 63 of file conf_clock.h.
| #define CONFIG_SYSCLK_PRES SYSCLK_PRES_1 | 
Definition at line 53 of file conf_clock.h.
| #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK | 
Definition at line 49 of file conf_clock.h.