Macros | |
#define | CR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0) |
#define | CR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF) |
#define | CR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF) |
#define | CR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF) |
#define | CR1_DISCEN_Set ((uint32_t)0x00000800) |
#define | CR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF) |
#define | CR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF) |
#define | CR1_JAUTO_Set ((uint32_t)0x00000400) |
#define | CR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF) |
#define | CR1_JDISCEN_Set ((uint32_t)0x00001000) |
#define | CR2_ADON_Reset ((uint32_t)0xFFFFFFFE) |
#define | CR2_ADON_Set ((uint32_t)0x00000001) |
#define | CR2_CAL_Set ((uint32_t)0x00000004) |
#define | CR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD) |
#define | CR2_DMA_Reset ((uint32_t)0xFFFFFEFF) |
#define | CR2_DMA_Set ((uint32_t)0x00000100) |
#define | CR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF) |
#define | CR2_EXTTRIG_Set ((uint32_t)0x00100000) |
#define | CR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF) |
#define | CR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000) |
#define | CR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF) |
#define | CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF) |
#define | CR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000) |
#define | CR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF) |
#define | CR2_JEXTTRIG_Set ((uint32_t)0x00008000) |
#define | CR2_JSWSTART_Set ((uint32_t)0x00200000) |
#define | CR2_RSTCAL_Set ((uint32_t)0x00000008) |
#define | CR2_SWSTART_Set ((uint32_t)0x00400000) |
#define | CR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF) |
#define | CR2_TSVREFE_Set ((uint32_t)0x00800000) |
#define | DR_ADDRESS ((uint32_t)0x4001244C) |
#define | JDR_Offset ((uint8_t)0x28) |
#define | JSQR_JL_Reset ((uint32_t)0xFFCFFFFF) |
#define | JSQR_JL_Set ((uint32_t)0x00300000) |
#define | JSQR_JSQ_Set ((uint32_t)0x0000001F) |
#define | SMPR1_SMP_Set ((uint32_t)0x00000007) |
#define | SMPR2_SMP_Set ((uint32_t)0x00000007) |
#define | SQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF) |
#define | SQR1_SQ_Set ((uint32_t)0x0000001F) |
#define | SQR2_SQ_Set ((uint32_t)0x0000001F) |
#define | SQR3_SQ_Set ((uint32_t)0x0000001F) |
#define CR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0) |
Definition at line 63 of file stm32f10x_adc.c.
#define CR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF) |
Definition at line 66 of file stm32f10x_adc.c.
#define CR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF) |
Definition at line 69 of file stm32f10x_adc.c.
#define CR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF) |
Definition at line 52 of file stm32f10x_adc.c.
#define CR1_DISCEN_Set ((uint32_t)0x00000800) |
Definition at line 51 of file stm32f10x_adc.c.
#define CR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF) |
Definition at line 48 of file stm32f10x_adc.c.
#define CR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF) |
Definition at line 56 of file stm32f10x_adc.c.
#define CR1_JAUTO_Set ((uint32_t)0x00000400) |
Definition at line 55 of file stm32f10x_adc.c.
#define CR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF) |
Definition at line 60 of file stm32f10x_adc.c.
#define CR1_JDISCEN_Set ((uint32_t)0x00001000) |
Definition at line 59 of file stm32f10x_adc.c.
#define CR2_ADON_Reset ((uint32_t)0xFFFFFFFE) |
Definition at line 73 of file stm32f10x_adc.c.
#define CR2_ADON_Set ((uint32_t)0x00000001) |
Definition at line 72 of file stm32f10x_adc.c.
#define CR2_CAL_Set ((uint32_t)0x00000004) |
Definition at line 83 of file stm32f10x_adc.c.
#define CR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD) |
Definition at line 115 of file stm32f10x_adc.c.
#define CR2_DMA_Reset ((uint32_t)0xFFFFFEFF) |
Definition at line 77 of file stm32f10x_adc.c.
#define CR2_DMA_Set ((uint32_t)0x00000100) |
Definition at line 76 of file stm32f10x_adc.c.
#define CR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF) |
Definition at line 90 of file stm32f10x_adc.c.
#define CR2_EXTTRIG_Set ((uint32_t)0x00100000) |
Definition at line 89 of file stm32f10x_adc.c.
#define CR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF) |
Definition at line 94 of file stm32f10x_adc.c.
#define CR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000) |
Definition at line 93 of file stm32f10x_adc.c.
#define CR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF) |
Definition at line 97 of file stm32f10x_adc.c.
#define CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF) |
Definition at line 108 of file stm32f10x_adc.c.
#define CR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000) |
Definition at line 107 of file stm32f10x_adc.c.
#define CR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF) |
Definition at line 101 of file stm32f10x_adc.c.
#define CR2_JEXTTRIG_Set ((uint32_t)0x00008000) |
Definition at line 100 of file stm32f10x_adc.c.
#define CR2_JSWSTART_Set ((uint32_t)0x00200000) |
Definition at line 104 of file stm32f10x_adc.c.
#define CR2_RSTCAL_Set ((uint32_t)0x00000008) |
Definition at line 80 of file stm32f10x_adc.c.
#define CR2_SWSTART_Set ((uint32_t)0x00400000) |
Definition at line 86 of file stm32f10x_adc.c.
#define CR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF) |
Definition at line 112 of file stm32f10x_adc.c.
#define CR2_TSVREFE_Set ((uint32_t)0x00800000) |
Definition at line 111 of file stm32f10x_adc.c.
#define DR_ADDRESS ((uint32_t)0x4001244C) |
Definition at line 140 of file stm32f10x_adc.c.
#define JDR_Offset ((uint8_t)0x28) |
Definition at line 137 of file stm32f10x_adc.c.
#define JSQR_JL_Reset ((uint32_t)0xFFCFFFFF) |
Definition at line 130 of file stm32f10x_adc.c.
#define JSQR_JL_Set ((uint32_t)0x00300000) |
Definition at line 129 of file stm32f10x_adc.c.
#define JSQR_JSQ_Set ((uint32_t)0x0000001F) |
Definition at line 126 of file stm32f10x_adc.c.
#define SMPR1_SMP_Set ((uint32_t)0x00000007) |
Definition at line 133 of file stm32f10x_adc.c.
#define SMPR2_SMP_Set ((uint32_t)0x00000007) |
Definition at line 134 of file stm32f10x_adc.c.
#define SQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF) |
Definition at line 123 of file stm32f10x_adc.c.
#define SQR1_SQ_Set ((uint32_t)0x0000001F) |
Definition at line 120 of file stm32f10x_adc.c.
#define SQR2_SQ_Set ((uint32_t)0x0000001F) |
Definition at line 119 of file stm32f10x_adc.c.
#define SQR3_SQ_Set ((uint32_t)0x0000001F) |
Definition at line 118 of file stm32f10x_adc.c.