HW Semaphore HSEM. More...
#include <stm32h735xx.h>
Public Attributes | |
| __IO uint32_t | C1ICR | 
| __IO uint32_t | C1IER | 
| __IO uint32_t | C1ISR | 
| __IO uint32_t | C1MISR | 
| __IO uint32_t | C2ICR | 
| __IO uint32_t | C2IER | 
| __IO uint32_t | C2ISR | 
| __IO uint32_t | C2MISR | 
| __IO uint32_t | CR | 
| __IO uint32_t | KEYR | 
| __IO uint32_t | R [32] | 
| uint32_t | Reserved [12] | 
| __IO uint32_t | RLR [32] | 
HW Semaphore HSEM.
Definition at line 1457 of file stm32h735xx.h.
| __IO uint32_t HSEM_TypeDef::C1ICR | 
HSEM Interrupt clear register , Address offset: 104h 
HSEM Interrupt 0 clear register , Address offset: 104h 
 
Definition at line 1462 of file stm32h735xx.h.
| __IO uint32_t HSEM_TypeDef::C1IER | 
HSEM Interrupt enable register , Address offset: 100h 
HSEM Interrupt 0 enable register , Address offset: 100h 
 
Definition at line 1461 of file stm32h735xx.h.
| __IO uint32_t HSEM_TypeDef::C1ISR | 
HSEM Interrupt Status register , Address offset: 108h 
HSEM Interrupt 0 Status register , Address offset: 108h 
 
Definition at line 1463 of file stm32h735xx.h.
| __IO uint32_t HSEM_TypeDef::C1MISR | 
HSEM Interrupt Masked Status register , Address offset: 10Ch 
HSEM Interrupt 0 Masked Status register , Address offset: 10Ch 
 
Definition at line 1464 of file stm32h735xx.h.
| __IO uint32_t HSEM_TypeDef::C2ICR | 
HSEM Interrupt 1 clear register , Address offset: 114h 
 
Definition at line 1603 of file stm32h747xx.h.
| __IO uint32_t HSEM_TypeDef::C2IER | 
HSEM Interrupt 1 enable register , Address offset: 110h 
 
Definition at line 1602 of file stm32h747xx.h.
| __IO uint32_t HSEM_TypeDef::C2ISR | 
HSEM Interrupt 1 Status register , Address offset: 118h 
 
Definition at line 1604 of file stm32h747xx.h.
| __IO uint32_t HSEM_TypeDef::C2MISR | 
HSEM Interrupt 1 Masked Status register , Address offset: 11Ch 
 
Definition at line 1605 of file stm32h747xx.h.
| __IO uint32_t HSEM_TypeDef::CR | 
HSEM Semaphore clear register , Address offset: 140h 
 
Definition at line 1466 of file stm32h735xx.h.
| __IO uint32_t HSEM_TypeDef::KEYR | 
HSEM Semaphore clear key register , Address offset: 144h 
 
Definition at line 1467 of file stm32h735xx.h.
| __IO uint32_t HSEM_TypeDef::R | 
2-step write lock and read back registers, Address offset: 00h-7Ch 
 
Definition at line 1459 of file stm32h735xx.h.
| uint32_t HSEM_TypeDef::Reserved | 
Definition at line 1465 of file stm32h735xx.h.
| __IO uint32_t HSEM_TypeDef::RLR | 
1-step read lock registers, Address offset: 80h-FCh 
 
Definition at line 1460 of file stm32h735xx.h.