stm32f7xx_hal_i2c.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32F7xx_HAL_I2C_H
22 #define STM32F7xx_HAL_I2C_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f7xx_hal_def.h"
30 
39 /* Exported types ------------------------------------------------------------*/
48 typedef struct
49 {
50  uint32_t Timing;
54  uint32_t OwnAddress1;
57  uint32_t AddressingMode;
60  uint32_t DualAddressMode;
63  uint32_t OwnAddress2;
66  uint32_t OwnAddress2Masks;
69  uint32_t GeneralCallMode;
72  uint32_t NoStretchMode;
75 } I2C_InitTypeDef;
76 
108 typedef enum
109 {
110  HAL_I2C_STATE_RESET = 0x00U,
111  HAL_I2C_STATE_READY = 0x20U,
112  HAL_I2C_STATE_BUSY = 0x24U,
113  HAL_I2C_STATE_BUSY_TX = 0x21U,
114  HAL_I2C_STATE_BUSY_RX = 0x22U,
115  HAL_I2C_STATE_LISTEN = 0x28U,
116  HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U,
118  HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU,
120  HAL_I2C_STATE_ABORT = 0x60U,
121  HAL_I2C_STATE_TIMEOUT = 0xA0U,
122  HAL_I2C_STATE_ERROR = 0xE0U
124 } HAL_I2C_StateTypeDef;
125 
148 typedef enum
149 {
150  HAL_I2C_MODE_NONE = 0x00U,
151  HAL_I2C_MODE_MASTER = 0x10U,
152  HAL_I2C_MODE_SLAVE = 0x20U,
153  HAL_I2C_MODE_MEM = 0x40U
155 } HAL_I2C_ModeTypeDef;
156 
165 #define HAL_I2C_ERROR_NONE (0x00000000U)
166 #define HAL_I2C_ERROR_BERR (0x00000001U)
167 #define HAL_I2C_ERROR_ARLO (0x00000002U)
168 #define HAL_I2C_ERROR_AF (0x00000004U)
169 #define HAL_I2C_ERROR_OVR (0x00000008U)
170 #define HAL_I2C_ERROR_DMA (0x00000010U)
171 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U)
172 #define HAL_I2C_ERROR_SIZE (0x00000040U)
173 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U)
174 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
175 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U)
176 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
177 #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U)
186 typedef struct __I2C_HandleTypeDef
187 {
188  I2C_TypeDef *Instance;
190  I2C_InitTypeDef Init;
192  uint8_t *pBuffPtr;
194  uint16_t XferSize;
196  __IO uint16_t XferCount;
198  __IO uint32_t XferOptions;
201  __IO uint32_t PreviousState;
203  HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
205  DMA_HandleTypeDef *hdmatx;
207  DMA_HandleTypeDef *hdmarx;
209  HAL_LockTypeDef Lock;
211  __IO HAL_I2C_StateTypeDef State;
213  __IO HAL_I2C_ModeTypeDef Mode;
215  __IO uint32_t ErrorCode;
217  __IO uint32_t AddrEventCount;
219 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
220  void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
221  void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
222  void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
223  void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
224  void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
225  void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
226  void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
227  void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c);
228  void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
230  void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
232  void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c);
233  void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c);
235 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
236 } I2C_HandleTypeDef;
237 
238 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
239 
242 typedef enum
243 {
244  HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
245  HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
246  HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
247  HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
248  HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U,
249  HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
250  HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
251  HAL_I2C_ERROR_CB_ID = 0x07U,
252  HAL_I2C_ABORT_CB_ID = 0x08U,
254  HAL_I2C_MSPINIT_CB_ID = 0x09U,
255  HAL_I2C_MSPDEINIT_CB_ID = 0x0AU
257 } HAL_I2C_CallbackIDTypeDef;
258 
262 typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c);
263 typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
265 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
266 
273 /* Exported constants --------------------------------------------------------*/
274 
282 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
283 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
284 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
285 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
286 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
287 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
288 
289 /* List of XferOptions in usage of :
290  * 1- Restart condition in all use cases (direction change or not)
291  */
292 #define I2C_OTHER_FRAME (0x000000AAU)
293 #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
294 
301 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
302 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
303 
310 #define I2C_DUALADDRESS_DISABLE (0x00000000U)
311 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
312 
319 #define I2C_OA2_NOMASK ((uint8_t)0x00U)
320 #define I2C_OA2_MASK01 ((uint8_t)0x01U)
321 #define I2C_OA2_MASK02 ((uint8_t)0x02U)
322 #define I2C_OA2_MASK03 ((uint8_t)0x03U)
323 #define I2C_OA2_MASK04 ((uint8_t)0x04U)
324 #define I2C_OA2_MASK05 ((uint8_t)0x05U)
325 #define I2C_OA2_MASK06 ((uint8_t)0x06U)
326 #define I2C_OA2_MASK07 ((uint8_t)0x07U)
327 
334 #define I2C_GENERALCALL_DISABLE (0x00000000U)
335 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
336 
343 #define I2C_NOSTRETCH_DISABLE (0x00000000U)
344 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
345 
352 #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
353 #define I2C_MEMADD_SIZE_16BIT (0x00000002U)
354 
361 #define I2C_DIRECTION_TRANSMIT (0x00000000U)
362 #define I2C_DIRECTION_RECEIVE (0x00000001U)
363 
370 #define I2C_RELOAD_MODE I2C_CR2_RELOAD
371 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
372 #define I2C_SOFTEND_MODE (0x00000000U)
373 
380 #define I2C_NO_STARTSTOP (0x00000000U)
381 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
382 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
383 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
384 
394 #define I2C_IT_ERRI I2C_CR1_ERRIE
395 #define I2C_IT_TCI I2C_CR1_TCIE
396 #define I2C_IT_STOPI I2C_CR1_STOPIE
397 #define I2C_IT_NACKI I2C_CR1_NACKIE
398 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
399 #define I2C_IT_RXI I2C_CR1_RXIE
400 #define I2C_IT_TXI I2C_CR1_TXIE
401 
408 #define I2C_FLAG_TXE I2C_ISR_TXE
409 #define I2C_FLAG_TXIS I2C_ISR_TXIS
410 #define I2C_FLAG_RXNE I2C_ISR_RXNE
411 #define I2C_FLAG_ADDR I2C_ISR_ADDR
412 #define I2C_FLAG_AF I2C_ISR_NACKF
413 #define I2C_FLAG_STOPF I2C_ISR_STOPF
414 #define I2C_FLAG_TC I2C_ISR_TC
415 #define I2C_FLAG_TCR I2C_ISR_TCR
416 #define I2C_FLAG_BERR I2C_ISR_BERR
417 #define I2C_FLAG_ARLO I2C_ISR_ARLO
418 #define I2C_FLAG_OVR I2C_ISR_OVR
419 #define I2C_FLAG_PECERR I2C_ISR_PECERR
420 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
421 #define I2C_FLAG_ALERT I2C_ISR_ALERT
422 #define I2C_FLAG_BUSY I2C_ISR_BUSY
423 #define I2C_FLAG_DIR I2C_ISR_DIR
424 
432 /* Exported macros -----------------------------------------------------------*/
433 
442 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
443 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
444  (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
445  (__HANDLE__)->MspInitCallback = NULL; \
446  (__HANDLE__)->MspDeInitCallback = NULL; \
447  } while(0)
448 #else
449 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
450 #endif
451 
466 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
467 
482 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
483 
498 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
499 
523 #define I2C_FLAG_MASK (0x0001FFFFU)
524 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
525 
543 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
544  : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
545 
550 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
551 
556 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
557 
562 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
563 
567 /* Include I2C HAL Extended module */
568 #include "stm32f7xx_hal_i2c_ex.h"
569 
570 /* Exported functions --------------------------------------------------------*/
578 /* Initialization and de-initialization functions******************************/
579 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
580 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
581 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
582 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
583 
584 /* Callbacks Register/UnRegister functions ***********************************/
585 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
586 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
587 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
588 
589 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
590 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
591 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
592 
599 /* IO operation functions ****************************************************/
600 /******* Blocking mode: Polling */
601 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
602 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
603 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
604 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
605 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
606 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
607 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
608 
609 /******* Non-Blocking mode: Interrupt */
610 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
611 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
612 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
613 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
614 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
615 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
616 
617 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
618 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
619 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
620 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
621 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
622 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
623 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
624 
625 /******* Non-Blocking mode: DMA */
626 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
627 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
628 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
629 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
630 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
631 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
632 
633 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
634 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
635 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
636 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
644 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
645 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
646 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
647 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
648 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
649 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
650 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
651 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
652 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
653 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
654 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
655 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
656 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
664 /* Peripheral State, Mode and Error functions *********************************/
665 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
666 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
667 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
668 
677 /* Private constants ---------------------------------------------------------*/
686 /* Private macros ------------------------------------------------------------*/
691 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
692  ((MODE) == I2C_ADDRESSINGMODE_10BIT))
693 
694 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
695  ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
696 
697 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
698  ((MASK) == I2C_OA2_MASK01) || \
699  ((MASK) == I2C_OA2_MASK02) || \
700  ((MASK) == I2C_OA2_MASK03) || \
701  ((MASK) == I2C_OA2_MASK04) || \
702  ((MASK) == I2C_OA2_MASK05) || \
703  ((MASK) == I2C_OA2_MASK06) || \
704  ((MASK) == I2C_OA2_MASK07))
705 
706 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
707  ((CALL) == I2C_GENERALCALL_ENABLE))
708 
709 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
710  ((STRETCH) == I2C_NOSTRETCH_ENABLE))
711 
712 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
713  ((SIZE) == I2C_MEMADD_SIZE_16BIT))
714 
715 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
716  ((MODE) == I2C_AUTOEND_MODE) || \
717  ((MODE) == I2C_SOFTEND_MODE))
718 
719 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
720  ((REQUEST) == I2C_GENERATE_START_READ) || \
721  ((REQUEST) == I2C_GENERATE_START_WRITE) || \
722  ((REQUEST) == I2C_NO_STARTSTOP))
723 
724 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
725  ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
726  ((REQUEST) == I2C_NEXT_FRAME) || \
727  ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
728  ((REQUEST) == I2C_LAST_FRAME) || \
729  ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
730  IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
731 
732 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
733  ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
734 
735 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
736 
737 #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U))
738 #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U))
739 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
740 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
741 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
742 
743 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
744 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
745 
746 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
747 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
748 
749 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
750  (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
751 
752 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
753 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
754 
758 /* Private Functions ---------------------------------------------------------*/
762 /* Private functions are defined in stm32f7xx_hal_i2c.c file */
775 #ifdef __cplusplus
776 }
777 #endif
778 
779 
780 #endif /* STM32F7xx_HAL_I2C_H */
781 
782 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_I2C_MemTxCpltCallback
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
HAL_I2C_STATE_BUSY_TX_LISTEN
@ HAL_I2C_STATE_BUSY_TX_LISTEN
Definition: stm32f7xx_hal_i2c.h:116
HAL_I2C_Init
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
__IO
#define __IO
Definition: imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h:237
HAL_I2C_STATE_BUSY_RX
@ HAL_I2C_STATE_BUSY_RX
Definition: stm32f7xx_hal_i2c.h:114
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
__I2C_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32f7xx_hal_i2c.h:215
HAL_I2C_ER_IRQHandler
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
HAL_I2C_GetState
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
HAL_I2C_Slave_Seq_Receive_DMA
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_I2C_GetMode
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
HAL_I2C_Master_Transmit
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_I2C_Slave_Transmit_DMA
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_I2C_Slave_Receive_IT
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_I2C_Mem_Read_DMA
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_I2C_Master_Abort_IT
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
HAL_I2C_ListenCpltCallback
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
HAL_I2C_Slave_Seq_Receive_IT
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
__I2C_HandleTypeDef::XferSize
uint16_t XferSize
Definition: stm32f7xx_hal_i2c.h:194
HAL_I2C_STATE_RESET
@ HAL_I2C_STATE_RESET
Definition: stm32f7xx_hal_i2c.h:110
I2C_TypeDef
Inter-integrated Circuit Interface.
Definition: stm32f407xx.h:557
HAL_I2C_Master_Transmit_IT
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:51
__I2C_HandleTypeDef::XferCount
__IO uint16_t XferCount
Definition: stm32f7xx_hal_i2c.h:196
HAL_I2C_EV_IRQHandler
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
HAL_I2C_Mem_Write
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_I2C_Slave_Transmit_IT
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_I2C_EnableListen_IT
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
HAL_I2C_MODE_SLAVE
@ HAL_I2C_MODE_SLAVE
Definition: stm32f7xx_hal_i2c.h:152
HAL_I2C_StateTypeDef
HAL_I2C_StateTypeDef
Definition: stm32f7xx_hal_i2c.h:108
HAL_I2C_STATE_BUSY
@ HAL_I2C_STATE_BUSY
Definition: stm32f7xx_hal_i2c.h:112
HAL_I2C_STATE_BUSY_RX_LISTEN
@ HAL_I2C_STATE_BUSY_RX_LISTEN
Definition: stm32f7xx_hal_i2c.h:118
__I2C_HandleTypeDef::AddrEventCount
__IO uint32_t AddrEventCount
Definition: stm32f7xx_hal_i2c.h:217
__I2C_HandleTypeDef::Instance
I2C_TypeDef * Instance
Definition: stm32f7xx_hal_i2c.h:188
HAL_I2C_STATE_TIMEOUT
@ HAL_I2C_STATE_TIMEOUT
Definition: stm32f7xx_hal_i2c.h:121
HAL_I2C_STATE_READY
@ HAL_I2C_STATE_READY
Definition: stm32f7xx_hal_i2c.h:111
HAL_I2C_Master_Seq_Transmit_DMA
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_I2C_AbortCpltCallback
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
HAL_I2C_STATE_BUSY_TX
@ HAL_I2C_STATE_BUSY_TX
Definition: stm32f7xx_hal_i2c.h:113
HAL_I2C_MasterRxCpltCallback
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
HAL_I2C_STATE_ERROR
@ HAL_I2C_STATE_ERROR
Definition: stm32f7xx_hal_i2c.h:122
I2C_InitTypeDef::Timing
uint32_t Timing
Definition: stm32f7xx_hal_i2c.h:50
HAL_I2C_Master_Seq_Receive_DMA
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
stm32f7xx_hal_i2c_ex.h
Header file of I2C HAL Extended module.
HAL_I2C_Slave_Seq_Transmit_DMA
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_I2C_SlaveTxCpltCallback
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
HAL_I2C_IsDeviceReady
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
__I2C_HandleTypeDef::pBuffPtr
uint8_t * pBuffPtr
Definition: stm32f7xx_hal_i2c.h:192
__I2C_HandleTypeDef::XferOptions
__IO uint32_t XferOptions
Definition: stm32f7xx_hal_i2c.h:198
HAL_I2C_MspInit
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
HAL_I2C_DisableListen_IT
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
HAL_I2C_AddrCallback
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
I2C_InitTypeDef::OwnAddress2Masks
uint32_t OwnAddress2Masks
Definition: stm32f7xx_hal_i2c.h:66
__I2C_HandleTypeDef::State
__IO HAL_I2C_StateTypeDef State
Definition: stm32f7xx_hal_i2c.h:211
stm32f7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_I2C_Slave_Receive
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_I2C_Master_Receive_IT
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_I2C_MODE_MASTER
@ HAL_I2C_MODE_MASTER
Definition: stm32f7xx_hal_i2c.h:151
I2C_HandleTypeDef
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:188
HAL_I2C_STATE_LISTEN
@ HAL_I2C_STATE_LISTEN
Definition: stm32f7xx_hal_i2c.h:115
HAL_I2C_Mem_Write_DMA
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_I2C_Master_Transmit_DMA
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
I2C_InitTypeDef
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:48
I2C_HandleTypeDef
struct __I2C_HandleTypeDef I2C_HandleTypeDef
HAL_I2C_Slave_Receive_DMA
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_I2C_GetError
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
HAL_I2C_Slave_Transmit
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_I2C_Master_Receive
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_I2C_Mem_Write_IT
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_I2C_Mem_Read
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_I2C_STATE_ABORT
@ HAL_I2C_STATE_ABORT
Definition: stm32f7xx_hal_i2c.h:120
HAL_I2C_MODE_MEM
@ HAL_I2C_MODE_MEM
Definition: stm32f7xx_hal_i2c.h:153
HAL_I2C_Slave_Seq_Transmit_IT
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
__I2C_HandleTypeDef::Mode
__IO HAL_I2C_ModeTypeDef Mode
Definition: stm32f7xx_hal_i2c.h:213
__I2C_HandleTypeDef::Init
I2C_InitTypeDef Init
Definition: stm32f7xx_hal_i2c.h:190
HAL_I2C_ErrorCallback
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
__I2C_HandleTypeDef
Definition: stm32f7xx_hal_i2c.h:186
HAL_I2C_MspDeInit
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
HAL_I2C_Master_Seq_Receive_IT
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_I2C_Master_Receive_DMA
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_I2C_ModeTypeDef
HAL_I2C_ModeTypeDef
Definition: stm32f7xx_hal_i2c.h:148
HAL_I2C_Mem_Read_IT
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_I2C_Master_Seq_Transmit_IT
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
__I2C_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32f7xx_hal_i2c.h:209
HAL_I2C_DeInit
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
HAL_I2C_MODE_NONE
@ HAL_I2C_MODE_NONE
Definition: stm32f7xx_hal_i2c.h:150
HAL_I2C_SlaveRxCpltCallback
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
HAL_I2C_MasterTxCpltCallback
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
__I2C_HandleTypeDef::hdmatx
DMA_HandleTypeDef * hdmatx
Definition: stm32f7xx_hal_i2c.h:205
HAL_I2C_MemRxCpltCallback
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
__I2C_HandleTypeDef::PreviousState
__IO uint32_t PreviousState
Definition: stm32f7xx_hal_i2c.h:201
__I2C_HandleTypeDef::hdmarx
DMA_HandleTypeDef * hdmarx
Definition: stm32f7xx_hal_i2c.h:207

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autogenerated on Fri Apr 1 2022 02:14:53