stm32f4xx_hal_smbus.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F4xx_HAL_SMBUS_H
22 #define __STM32F4xx_HAL_SMBUS_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f4xx_hal_def.h"
30 
39 /* Exported types ------------------------------------------------------------*/
47 typedef struct
48 {
49  uint32_t ClockSpeed;
52  uint32_t AnalogFilter;
55  uint32_t OwnAddress1;
58  uint32_t AddressingMode;
61  uint32_t DualAddressMode;
64  uint32_t OwnAddress2;
67  uint32_t GeneralCallMode;
70  uint32_t NoStretchMode;
73  uint32_t PacketErrorCheckMode;
76  uint32_t PeripheralMode;
79 } SMBUS_InitTypeDef;
80 
107 typedef enum
108 {
109 
110  HAL_SMBUS_STATE_RESET = 0x00U,
111  HAL_SMBUS_STATE_READY = 0x20U,
112  HAL_SMBUS_STATE_BUSY = 0x24U,
113  HAL_SMBUS_STATE_BUSY_TX = 0x21U,
114  HAL_SMBUS_STATE_BUSY_RX = 0x22U,
115  HAL_SMBUS_STATE_LISTEN = 0x28U,
116  HAL_SMBUS_STATE_BUSY_TX_LISTEN = 0x29U,
118  HAL_SMBUS_STATE_BUSY_RX_LISTEN = 0x2AU,
120  HAL_SMBUS_STATE_ABORT = 0x60U,
121  HAL_SMBUS_STATE_TIMEOUT = 0xA0U,
122  HAL_SMBUS_STATE_ERROR = 0xE0U
123 } HAL_SMBUS_StateTypeDef;
124 
141 typedef enum
142 {
143  HAL_SMBUS_MODE_NONE = 0x00U,
144  HAL_SMBUS_MODE_MASTER = 0x10U,
145  HAL_SMBUS_MODE_SLAVE = 0x20U,
147 } HAL_SMBUS_ModeTypeDef;
148 
152 typedef struct __SMBUS_HandleTypeDef
153 {
154  I2C_TypeDef *Instance;
156  SMBUS_InitTypeDef Init;
158  uint8_t *pBuffPtr;
160  uint16_t XferSize;
162  __IO uint16_t XferCount;
164  __IO uint32_t XferOptions;
167  __IO uint32_t PreviousState;
170  HAL_LockTypeDef Lock;
172  __IO HAL_SMBUS_StateTypeDef State;
174  __IO HAL_SMBUS_ModeTypeDef Mode;
176  __IO uint32_t ErrorCode;
178  __IO uint32_t Devaddress;
180  __IO uint32_t EventCount;
182  uint8_t XferPEC;
184 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
185  void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
186  void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
187  void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
188  void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
189  void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
190  void (* MemTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
191  void (* MemRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
192  void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
193  void (* AbortCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
194  void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
195  void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
196  void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
198 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
199 } SMBUS_HandleTypeDef;
200 
201 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
202 
205 typedef enum
206 {
207  HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID = 0x00U,
208  HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID = 0x01U,
209  HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
210  HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
211  HAL_SMBUS_LISTEN_COMPLETE_CB_ID = 0x04U,
212  HAL_SMBUS_ERROR_CB_ID = 0x07U,
213  HAL_SMBUS_ABORT_CB_ID = 0x08U,
214  HAL_SMBUS_MSPINIT_CB_ID = 0x09U,
215  HAL_SMBUS_MSPDEINIT_CB_ID = 0x0AU
217 } HAL_SMBUS_CallbackIDTypeDef;
218 
222 typedef void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus);
223 typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
225 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
226 
231 /* Exported constants --------------------------------------------------------*/
240 #define HAL_SMBUS_ERROR_NONE 0x00000000U
241 #define HAL_SMBUS_ERROR_BERR 0x00000001U
242 #define HAL_SMBUS_ERROR_ARLO 0x00000002U
243 #define HAL_SMBUS_ERROR_AF 0x00000004U
244 #define HAL_SMBUS_ERROR_OVR 0x00000008U
245 #define HAL_SMBUS_ERROR_TIMEOUT 0x00000010U
246 #define HAL_SMBUS_ERROR_ALERT 0x00000020U
247 #define HAL_SMBUS_ERROR_PECERR 0x00000040U
248 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
249 #define HAL_SMBUS_ERROR_INVALID_CALLBACK 0x00000080U
250 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
251 
259 #define SMBUS_ANALOGFILTER_ENABLE 0x00000000U
260 #define SMBUS_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF
261 
268 #define SMBUS_ADDRESSINGMODE_7BIT 0x00004000U
269 #define SMBUS_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
270 
277 #define SMBUS_DUALADDRESS_DISABLE 0x00000000U
278 #define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
279 
286 #define SMBUS_GENERALCALL_DISABLE 0x00000000U
287 #define SMBUS_GENERALCALL_ENABLE I2C_CR1_ENGC
288 
295 #define SMBUS_NOSTRETCH_DISABLE 0x00000000U
296 #define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
297 
304 #define SMBUS_PEC_DISABLE 0x00000000U
305 #define SMBUS_PEC_ENABLE I2C_CR1_ENPEC
306 
313 #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)
314 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE I2C_CR1_SMBUS
315 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP)
316 
323 #define SMBUS_DIRECTION_RECEIVE 0x00000000U
324 #define SMBUS_DIRECTION_TRANSMIT 0x00000001U
325 
332 #define SMBUS_FIRST_FRAME 0x00000001U
333 #define SMBUS_NEXT_FRAME 0x00000002U
334 #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC 0x00000003U
335 #define SMBUS_LAST_FRAME_NO_PEC 0x00000004U
336 #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC 0x00000005U
337 #define SMBUS_LAST_FRAME_WITH_PEC 0x00000006U
338 
345 #define SMBUS_IT_BUF I2C_CR2_ITBUFEN
346 #define SMBUS_IT_EVT I2C_CR2_ITEVTEN
347 #define SMBUS_IT_ERR I2C_CR2_ITERREN
348 
355 #define SMBUS_FLAG_SMBALERT 0x00018000U
356 #define SMBUS_FLAG_TIMEOUT 0x00014000U
357 #define SMBUS_FLAG_PECERR 0x00011000U
358 #define SMBUS_FLAG_OVR 0x00010800U
359 #define SMBUS_FLAG_AF 0x00010400U
360 #define SMBUS_FLAG_ARLO 0x00010200U
361 #define SMBUS_FLAG_BERR 0x00010100U
362 #define SMBUS_FLAG_TXE 0x00010080U
363 #define SMBUS_FLAG_RXNE 0x00010040U
364 #define SMBUS_FLAG_STOPF 0x00010010U
365 #define SMBUS_FLAG_ADD10 0x00010008U
366 #define SMBUS_FLAG_BTF 0x00010004U
367 #define SMBUS_FLAG_ADDR 0x00010002U
368 #define SMBUS_FLAG_SB 0x00010001U
369 #define SMBUS_FLAG_DUALF 0x00100080U
370 #define SMBUS_FLAG_SMBHOST 0x00100040U
371 #define SMBUS_FLAG_SMBDEFAULT 0x00100020U
372 #define SMBUS_FLAG_GENCALL 0x00100010U
373 #define SMBUS_FLAG_TRA 0x00100004U
374 #define SMBUS_FLAG_BUSY 0x00100002U
375 #define SMBUS_FLAG_MSL 0x00100001U
376 
384 /* Exported macro ------------------------------------------------------------*/
394 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
395 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \
396  (__HANDLE__)->State = HAL_SMBUS_STATE_RESET; \
397  (__HANDLE__)->MspInitCallback = NULL; \
398  (__HANDLE__)->MspDeInitCallback = NULL; \
399  } while(0)
400 #else
401 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
402 #endif
403 
414 #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
415 #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
416 
427 #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
428 
458 #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)): \
459  ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
460 
475 #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & SMBUS_FLAG_MASK))
476 
482 #define __HAL_SMBUS_CLEAR_ADDRFLAG(__HANDLE__) \
483  do{ \
484  __IO uint32_t tmpreg = 0x00U; \
485  tmpreg = (__HANDLE__)->Instance->SR1; \
486  tmpreg = (__HANDLE__)->Instance->SR2; \
487  UNUSED(tmpreg); \
488  } while(0)
489 
495 #define __HAL_SMBUS_CLEAR_STOPFLAG(__HANDLE__) \
496  do{ \
497  __IO uint32_t tmpreg = 0x00U; \
498  tmpreg = (__HANDLE__)->Instance->SR1; \
499  (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE; \
500  UNUSED(tmpreg); \
501  } while(0)
502 
508 #define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE)
509 
515 #define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE)
516 
521 #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_ACK))
522 
527 /* Exported functions --------------------------------------------------------*/
536 /* Initialization/de-initialization functions **********************************/
537 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
538 HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
539 void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
540 void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
541 
542 /* Callbacks Register/UnRegister functions ************************************/
543 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
544 HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback);
545 HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID);
546 
547 HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback);
548 HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus);
549 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
550 
559 /* IO operation functions *****************************************************/
563 /******* Blocking mode: Polling */
564 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
572 /******* Non-Blocking mode: Interrupt */
573 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
574 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
575 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
576 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
577 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
578 
579 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
580 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
581 HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
582 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
583 
584 /****** Filter Configuration functions */
585 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
586 HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);
587 HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);
588 #endif
589 
596 /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
597 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
598 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
599 void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
600 void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
601 void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
602 void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
603 void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
604 void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
605 void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
606 void HAL_SMBUS_AbortCpltCallback(SMBUS_HandleTypeDef *hsmbus);
607 
616 /* Peripheral State, mode and Errors functions **************************************************/
617 HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
618 HAL_SMBUS_ModeTypeDef HAL_SMBUS_GetMode(SMBUS_HandleTypeDef *hsmbus);
619 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
620 
628 /* Private types -------------------------------------------------------------*/
629 /* Private variables ---------------------------------------------------------*/
630 /* Private constants ---------------------------------------------------------*/
634 #define SMBUS_FLAG_MASK 0x0000FFFFU
635 
639 /* Private macros ------------------------------------------------------------*/
644 #define SMBUS_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
645 
646 #define SMBUS_RISE_TIME(__FREQRANGE__) ( ((__FREQRANGE__) + 1U))
647 
648 #define SMBUS_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
649 
650 #define SMBUS_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
651 
652 #define SMBUS_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
653 
654 #define SMBUS_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
655 
656 #define SMBUS_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
657 
658 #define SMBUS_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
659 
660 #define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ENPEC)
661 
662 #define SMBUS_GET_PEC_VALUE(__HANDLE__) ((__HANDLE__)->XferPEC)
663 
664 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
665 #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \
666  ((FILTER) == SMBUS_ANALOGFILTER_DISABLE))
667 #define IS_SMBUS_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
668 #endif
669 #define IS_SMBUS_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == SMBUS_ADDRESSINGMODE_7BIT) || \
670  ((ADDRESS) == SMBUS_ADDRESSINGMODE_10BIT))
671 
672 #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \
673  ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))
674 
675 #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) || \
676  ((CALL) == SMBUS_GENERALCALL_ENABLE))
677 
678 #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \
679  ((STRETCH) == SMBUS_NOSTRETCH_ENABLE))
680 
681 #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) || \
682  ((PEC) == SMBUS_PEC_ENABLE))
683 
684 #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \
685  ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
686  ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
687 
688 #define IS_SMBUS_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 100000U))
689 
690 #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
691 
692 #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
693 
694 #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \
695  ((REQUEST) == SMBUS_NEXT_FRAME) || \
696  ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
697  ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \
698  ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
699  ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
700 
705 /* Private Functions ---------------------------------------------------------*/
726 #ifdef __cplusplus
727 }
728 #endif
729 
730 
731 #endif /* __STM32F4xx_HAL_SMBUS_H */
732 
733 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
__SMBUS_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32f4xx_hal_smbus.h:176
SMBUS_InitTypeDef::AddressingMode
uint32_t AddressingMode
Definition: stm32f4xx_hal_smbus.h:58
__IO
#define __IO
Definition: imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h:237
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
HAL_SMBUS_STATE_BUSY_RX_LISTEN
@ HAL_SMBUS_STATE_BUSY_RX_LISTEN
Definition: stm32f4xx_hal_smbus.h:118
__SMBUS_HandleTypeDef::Instance
I2C_TypeDef * Instance
Definition: stm32f4xx_hal_smbus.h:154
HAL_SMBUS_MODE_MASTER
@ HAL_SMBUS_MODE_MASTER
Definition: stm32f4xx_hal_smbus.h:144
HAL_SMBUS_Master_Abort_IT
HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress)
HAL_SMBUS_AddrCallback
void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
HAL_SMBUS_EV_IRQHandler
void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_ModeTypeDef
HAL_SMBUS_ModeTypeDef
HAL Mode structure definition.
Definition: stm32f4xx_hal_smbus.h:141
HAL_SMBUS_Slave_Transmit_IT
HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_SMBUS_MasterRxCpltCallback
void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
SMBUS_InitTypeDef::OwnAddress2
uint32_t OwnAddress2
Definition: stm32f4xx_hal_smbus.h:64
HAL_SMBUS_GetState
HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_DeInit
HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_Master_Receive_IT
HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
__SMBUS_HandleTypeDef::State
__IO HAL_SMBUS_StateTypeDef State
Definition: stm32f4xx_hal_smbus.h:172
__SMBUS_HandleTypeDef::Devaddress
__IO uint32_t Devaddress
Definition: stm32f4xx_hal_smbus.h:178
__SMBUS_HandleTypeDef::XferOptions
__IO uint32_t XferOptions
Definition: stm32f4xx_hal_smbus.h:164
HAL_SMBUS_STATE_ERROR
@ HAL_SMBUS_STATE_ERROR
Definition: stm32f4xx_hal_smbus.h:122
HAL_SMBUS_GetMode
HAL_SMBUS_ModeTypeDef HAL_SMBUS_GetMode(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_STATE_RESET
@ HAL_SMBUS_STATE_RESET
Definition: stm32f4xx_hal_smbus.h:110
__SMBUS_HandleTypeDef
SMBUS handle Structure definition.
Definition: stm32f4xx_hal_smbus.h:152
I2C_TypeDef
Inter-integrated Circuit Interface.
Definition: stm32f407xx.h:557
HAL_SMBUS_MspDeInit
void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_IsDeviceReady
HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:51
SMBUS_InitTypeDef::PeripheralMode
uint32_t PeripheralMode
Definition: stm32f4xx_hal_smbus.h:76
HAL_SMBUS_ListenCpltCallback
void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_STATE_READY
@ HAL_SMBUS_STATE_READY
Definition: stm32f4xx_hal_smbus.h:111
__SMBUS_HandleTypeDef::PreviousState
__IO uint32_t PreviousState
Definition: stm32f4xx_hal_smbus.h:167
HAL_SMBUS_STATE_BUSY_TX_LISTEN
@ HAL_SMBUS_STATE_BUSY_TX_LISTEN
Definition: stm32f4xx_hal_smbus.h:116
SMBUS_InitTypeDef
SMBUS Configuration Structure definition.
Definition: stm32f4xx_hal_smbus.h:47
SMBUS_InitTypeDef::NoStretchMode
uint32_t NoStretchMode
Definition: stm32f4xx_hal_smbus.h:70
HAL_SMBUS_GetError
uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus)
SMBUS_HandleTypeDef
struct __SMBUS_HandleTypeDef SMBUS_HandleTypeDef
SMBUS handle Structure definition.
HAL_SMBUS_AbortCpltCallback
void HAL_SMBUS_AbortCpltCallback(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_MasterTxCpltCallback
void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_STATE_BUSY_TX
@ HAL_SMBUS_STATE_BUSY_TX
Definition: stm32f4xx_hal_smbus.h:113
__SMBUS_HandleTypeDef::Mode
__IO HAL_SMBUS_ModeTypeDef Mode
Definition: stm32f4xx_hal_smbus.h:174
stm32f4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_SMBUS_STATE_TIMEOUT
@ HAL_SMBUS_STATE_TIMEOUT
Definition: stm32f4xx_hal_smbus.h:121
__SMBUS_HandleTypeDef::XferSize
uint16_t XferSize
Definition: stm32f4xx_hal_smbus.h:160
HAL_SMBUS_ConfigAnalogFilter
HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter)
__SMBUS_HandleTypeDef::pBuffPtr
uint8_t * pBuffPtr
Definition: stm32f4xx_hal_smbus.h:158
HAL_SMBUS_EnableListen_IT
HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_STATE_BUSY_RX
@ HAL_SMBUS_STATE_BUSY_RX
Definition: stm32f4xx_hal_smbus.h:114
__SMBUS_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32f4xx_hal_smbus.h:170
HAL_SMBUS_ConfigDigitalFilter
HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter)
SMBUS_InitTypeDef::GeneralCallMode
uint32_t GeneralCallMode
Definition: stm32f4xx_hal_smbus.h:67
__SMBUS_HandleTypeDef::XferPEC
uint8_t XferPEC
Definition: stm32f4xx_hal_smbus.h:182
__SMBUS_HandleTypeDef::Init
SMBUS_InitTypeDef Init
Definition: stm32f4xx_hal_smbus.h:156
SMBUS_InitTypeDef::DualAddressMode
uint32_t DualAddressMode
Definition: stm32f4xx_hal_smbus.h:61
HAL_SMBUS_SlaveTxCpltCallback
void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
SMBUS_InitTypeDef::OwnAddress1
uint32_t OwnAddress1
Definition: stm32f4xx_hal_smbus.h:55
HAL_SMBUS_SlaveRxCpltCallback
void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_MODE_NONE
@ HAL_SMBUS_MODE_NONE
Definition: stm32f4xx_hal_smbus.h:143
SMBUS_InitTypeDef::ClockSpeed
uint32_t ClockSpeed
Definition: stm32f4xx_hal_smbus.h:49
HAL_SMBUS_Slave_Receive_IT
HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
SMBUS_InitTypeDef::PacketErrorCheckMode
uint32_t PacketErrorCheckMode
Definition: stm32f4xx_hal_smbus.h:73
HAL_SMBUS_Master_Transmit_IT
HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
__SMBUS_HandleTypeDef::EventCount
__IO uint32_t EventCount
Definition: stm32f4xx_hal_smbus.h:180
HAL_SMBUS_DisableListen_IT
HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_STATE_LISTEN
@ HAL_SMBUS_STATE_LISTEN
Definition: stm32f4xx_hal_smbus.h:115
HAL_SMBUS_STATE_ABORT
@ HAL_SMBUS_STATE_ABORT
Definition: stm32f4xx_hal_smbus.h:120
HAL_SMBUS_MODE_SLAVE
@ HAL_SMBUS_MODE_SLAVE
Definition: stm32f4xx_hal_smbus.h:145
SMBUS_InitTypeDef::AnalogFilter
uint32_t AnalogFilter
Definition: stm32f4xx_hal_smbus.h:52
__SMBUS_HandleTypeDef::XferCount
__IO uint16_t XferCount
Definition: stm32f4xx_hal_smbus.h:162
HAL_SMBUS_EnableAlert_IT
HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_ErrorCallback
void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_STATE_BUSY
@ HAL_SMBUS_STATE_BUSY
Definition: stm32f4xx_hal_smbus.h:112
HAL_SMBUS_StateTypeDef
HAL_SMBUS_StateTypeDef
HAL State structure definition.
Definition: stm32f4xx_hal_smbus.h:107
HAL_SMBUS_DisableAlert_IT
HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_ER_IRQHandler
void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_MspInit
void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
HAL_SMBUS_Init
HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)

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autogenerated on Fri Apr 1 2022 02:14:52