Macros
DMA Exported Macros
STM32F4xx_HAL_Driver | STM32F7xx_HAL_Driver | STM32H7xx_HAL_Driver » DMA
Collaboration diagram for DMA Exported Macros:

Macros

#define __HAL_BDMA_CHANNEL_DISABLE_IT(__HANDLE__, __INTERRUPT__)   (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR &= ~(DMA_TO_BDMA_IT(__INTERRUPT__)))
 
#define __HAL_BDMA_CHANNEL_DISABLE_IT(__HANDLE__, __INTERRUPT__)   (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR &= ~(DMA_TO_BDMA_IT(__INTERRUPT__)))
 
#define __HAL_BDMA_CHANNEL_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR |= (DMA_TO_BDMA_IT(__INTERRUPT__)))
 
#define __HAL_BDMA_CHANNEL_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR |= (DMA_TO_BDMA_IT(__INTERRUPT__)))
 
#define __HAL_BDMA_CHANNEL_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)   ((((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR & (DMA_TO_BDMA_IT(__INTERRUPT__))))
 
#define __HAL_BDMA_CHANNEL_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)   ((((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR & (DMA_TO_BDMA_IT(__INTERRUPT__))))
 
#define __HAL_BDMA_GET_GI_FLAG_INDEX(__HANDLE__)
 Returns the current BDMA Channel Global interrupt flag. More...
 
#define __HAL_BDMA_GET_GI_FLAG_INDEX(__HANDLE__)
 Returns the current BDMA Channel Global interrupt flag. More...
 
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__)
 Clear the DMA Stream pending flags. More...
 
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__)
 Clear the DMA Stream pending flags. More...
 
#define __HAL_DMA_DISABLE(__HANDLE__)
 Disable the specified DMA Stream. More...
 
#define __HAL_DMA_DISABLE(__HANDLE__)
 Disable the specified DMA Stream. More...
 
#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__)
 Disable the specified DMA Stream interrupts. More...
 
#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__)
 Disable the specified DMA Stream interrupts. More...
 
#define __HAL_DMA_ENABLE(__HANDLE__)
 Enable the specified DMA Stream. More...
 
#define __HAL_DMA_ENABLE(__HANDLE__)
 Enable the specified DMA Stream. More...
 
#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__)
 Enable the specified DMA Stream interrupts. More...
 
#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__)
 Enable the specified DMA Stream interrupts. More...
 
#define __HAL_DMA_GET_COUNTER(__HANDLE__)
 Returns the number of remaining data units in the current DMAy Streamx transfer. More...
 
#define __HAL_DMA_GET_COUNTER(__HANDLE__)
 Returns the number of remaining data units in the current DMAy Streamx transfer. More...
 
#define __HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream direct mode error flag. More...
 
#define __HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream direct mode error flag. More...
 
#define __HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream FIFO error flag. More...
 
#define __HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream FIFO error flag. More...
 
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)
 Get the DMA Stream pending flags. More...
 
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)
 Get the DMA Stream pending flags. More...
 
#define __HAL_DMA_GET_FS(__HANDLE__)   ((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (DMA_SxFCR_FS)) : 0)
 Return the current DMA Stream FIFO filled level. More...
 
#define __HAL_DMA_GET_FS(__HANDLE__)   ((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (DMA_SxFCR_FS)) : 0)
 Return the current DMA Stream FIFO filled level. More...
 
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream half transfer complete flag. More...
 
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream half transfer complete flag. More...
 
#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
 Check whether the specified DMA Stream interrupt is enabled or not. More...
 
#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
 Check whether the specified DMA Stream interrupt is enabled or not. More...
 
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream transfer complete flag. More...
 
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream transfer complete flag. More...
 
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream transfer error flag. More...
 
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream transfer error flag. More...
 
#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__)   ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
 Reset DMA handle state. More...
 
#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__)   ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
 Reset DMA handle state. More...
 
#define __HAL_DMA_SET_COUNTER(__HANDLE__, __COUNTER__)
 Writes the number of data units to be transferred on the DMA Stream. More...
 
#define __HAL_DMA_SET_COUNTER(__HANDLE__, __COUNTER__)
 Writes the number of data units to be transferred on the DMA Stream. More...
 
#define __HAL_DMA_STREAM_DISABLE_IT(__HANDLE__, __INTERRUPT__)
 
#define __HAL_DMA_STREAM_DISABLE_IT(__HANDLE__, __INTERRUPT__)
 
#define __HAL_DMA_STREAM_ENABLE_IT(__HANDLE__, __INTERRUPT__)
 
#define __HAL_DMA_STREAM_ENABLE_IT(__HANDLE__, __INTERRUPT__)
 
#define __HAL_DMA_STREAM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
 
#define __HAL_DMA_STREAM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
 
#define DMA_TO_BDMA_IT(__DMA_IT__)
 
#define DMA_TO_BDMA_IT(__DMA_IT__)
 

Detailed Description

Macro Definition Documentation

◆ __HAL_BDMA_CHANNEL_DISABLE_IT [1/2]

#define __HAL_BDMA_CHANNEL_DISABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)    (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR &= ~(DMA_TO_BDMA_IT(__INTERRUPT__)))

Definition at line 1095 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_BDMA_CHANNEL_DISABLE_IT [2/2]

#define __HAL_BDMA_CHANNEL_DISABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)    (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR &= ~(DMA_TO_BDMA_IT(__INTERRUPT__)))

Definition at line 1095 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_BDMA_CHANNEL_ENABLE_IT [1/2]

#define __HAL_BDMA_CHANNEL_ENABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)    (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR |= (DMA_TO_BDMA_IT(__INTERRUPT__)))

Definition at line 1072 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_BDMA_CHANNEL_ENABLE_IT [2/2]

#define __HAL_BDMA_CHANNEL_ENABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)    (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR |= (DMA_TO_BDMA_IT(__INTERRUPT__)))

Definition at line 1072 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_BDMA_CHANNEL_GET_IT_SOURCE [1/2]

#define __HAL_BDMA_CHANNEL_GET_IT_SOURCE (   __HANDLE__,
  __INTERRUPT__ 
)    ((((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR & (DMA_TO_BDMA_IT(__INTERRUPT__))))

Definition at line 1117 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_BDMA_CHANNEL_GET_IT_SOURCE [2/2]

#define __HAL_BDMA_CHANNEL_GET_IT_SOURCE (   __HANDLE__,
  __INTERRUPT__ 
)    ((((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR & (DMA_TO_BDMA_IT(__INTERRUPT__))))

Definition at line 1117 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_BDMA_GET_GI_FLAG_INDEX [1/2]

#define __HAL_BDMA_GET_GI_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_ISR_GIF0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_ISR_GIF1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_ISR_GIF2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_ISR_GIF3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_ISR_GIF4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_ISR_GIF5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_ISR_GIF6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_ISR_GIF7 :\
(uint32_t)0x00000000)

Returns the current BDMA Channel Global interrupt flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified transfer error flag index.

Definition at line 993 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_BDMA_GET_GI_FLAG_INDEX [2/2]

#define __HAL_BDMA_GET_GI_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_ISR_GIF0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_ISR_GIF1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_ISR_GIF2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_ISR_GIF3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_ISR_GIF4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_ISR_GIF5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_ISR_GIF6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_ISR_GIF7 :\
(uint32_t)0x00000000)

Returns the current BDMA Channel Global interrupt flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified transfer error flag index.

Definition at line 993 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_CLEAR_FLAG [1/2]

#define __HAL_DMA_CLEAR_FLAG (   __HANDLE__,
  __FLAG__ 
)
Value:
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream7)? (BDMA->IFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))

Clear the DMA Stream pending flags.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>FLAG</strong>specifies the flag to clear. This parameter can be any combination of the following values:
  • DMA_FLAG_TCIFx: Transfer complete flag.
  • DMA_FLAG_HTIFx: Half transfer complete flag.
  • DMA_FLAG_TEIFx: Transfer error flag.
  • DMA_FLAG_DMEIFx: Direct mode error flag.
  • DMA_FLAG_FEIFx: FIFO error flag. Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
Return values
None

Definition at line 1054 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_CLEAR_FLAG [2/2]

#define __HAL_DMA_CLEAR_FLAG (   __HANDLE__,
  __FLAG__ 
)
Value:
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream7)? (BDMA->IFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))

Clear the DMA Stream pending flags.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>FLAG</strong>specifies the flag to clear. This parameter can be any combination of the following values:
  • DMA_FLAG_TCIFx: Transfer complete flag.
  • DMA_FLAG_HTIFx: Half transfer complete flag.
  • DMA_FLAG_TEIFx: Transfer error flag.
  • DMA_FLAG_DMEIFx: Direct mode error flag.
  • DMA_FLAG_FEIFx: FIFO error flag. Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
Return values
None

Definition at line 1054 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_DISABLE [1/2]

#define __HAL_DMA_DISABLE (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR &= ~DMA_SxCR_EN) : \
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR &= ~BDMA_CCR_EN))

Disable the specified DMA Stream.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
None

Definition at line 707 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_DISABLE [2/2]

#define __HAL_DMA_DISABLE (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR &= ~DMA_SxCR_EN) : \
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR &= ~BDMA_CCR_EN))

Disable the specified DMA Stream.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
None

Definition at line 707 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_DISABLE_IT [1/2]

#define __HAL_DMA_DISABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))?\
(__HAL_DMA_STREAM_DISABLE_IT((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_DISABLE_IT((__HANDLE__), (__INTERRUPT__))))

Disable the specified DMA Stream interrupts.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>INTERRUPT</strong>specifies the DMA interrupt sources to be enabled or disabled. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
None

Definition at line 1112 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_DISABLE_IT [2/2]

#define __HAL_DMA_DISABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))?\
(__HAL_DMA_STREAM_DISABLE_IT((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_DISABLE_IT((__HANDLE__), (__INTERRUPT__))))

Disable the specified DMA Stream interrupts.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>INTERRUPT</strong>specifies the DMA interrupt sources to be enabled or disabled. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
None

Definition at line 1112 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_ENABLE [1/2]

#define __HAL_DMA_ENABLE (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR |= DMA_SxCR_EN) : \
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR |= BDMA_CCR_EN))

Enable the specified DMA Stream.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
None

Definition at line 698 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_ENABLE [2/2]

#define __HAL_DMA_ENABLE (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR |= DMA_SxCR_EN) : \
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR |= BDMA_CCR_EN))

Enable the specified DMA Stream.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
None

Definition at line 698 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_ENABLE_IT [1/2]

#define __HAL_DMA_ENABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))?\
(__HAL_DMA_STREAM_ENABLE_IT((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_ENABLE_IT((__HANDLE__), (__INTERRUPT__))))

Enable the specified DMA Stream interrupts.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>INTERRUPT</strong>specifies the DMA interrupt sources to be enabled or disabled. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
None

Definition at line 1090 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_ENABLE_IT [2/2]

#define __HAL_DMA_ENABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))?\
(__HAL_DMA_STREAM_ENABLE_IT((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_ENABLE_IT((__HANDLE__), (__INTERRUPT__))))

Enable the specified DMA Stream interrupts.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>INTERRUPT</strong>specifies the DMA interrupt sources to be enabled or disabled. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
None

Definition at line 1090 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_COUNTER [1/2]

#define __HAL_DMA_GET_COUNTER (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->NDTR) :\
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CNDTR))

Returns the number of remaining data units in the current DMAy Streamx transfer.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thenumber of remaining data units in the current DMA Stream transfer.

Definition at line 1166 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_COUNTER [2/2]

#define __HAL_DMA_GET_COUNTER (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->NDTR) :\
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CNDTR))

Returns the number of remaining data units in the current DMAy Streamx transfer.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thenumber of remaining data units in the current DMA Stream transfer.

Definition at line 1166 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_DME_FLAG_INDEX [1/2]

#define __HAL_DMA_GET_DME_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_DMEIF3_7 :\
(uint32_t)0x00000000)

Return the current DMA Stream direct mode error flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified direct mode error flag index.

Definition at line 949 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_DME_FLAG_INDEX [2/2]

#define __HAL_DMA_GET_DME_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_DMEIF3_7 :\
(uint32_t)0x00000000)

Return the current DMA Stream direct mode error flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified direct mode error flag index.

Definition at line 949 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_FE_FLAG_INDEX [1/2]

#define __HAL_DMA_GET_FE_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_FEIF3_7 :\
(uint32_t)0x00000000)

Return the current DMA Stream FIFO error flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified FIFO error flag index.

Definition at line 925 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_FE_FLAG_INDEX [2/2]

#define __HAL_DMA_GET_FE_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_FEIF3_7 :\
(uint32_t)0x00000000)

Return the current DMA Stream FIFO error flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified FIFO error flag index.

Definition at line 925 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_FLAG [1/2]

#define __HAL_DMA_GET_FLAG (   __HANDLE__,
  __FLAG__ 
)
Value:
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream7)? (BDMA->ISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HISR & (__FLAG__)) : (DMA1->LISR & (__FLAG__)))

Get the DMA Stream pending flags.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>FLAG</strong>Get the specified flag. This parameter can be any combination of the following values:
  • DMA_FLAG_TCIFx: Transfer complete flag.
  • DMA_FLAG_HTIFx: Half transfer complete flag.
  • DMA_FLAG_TEIFx: Transfer error flag.
  • DMA_FLAG_DMEIFx: Direct mode error flag.
  • DMA_FLAG_FEIFx: FIFO error flag. Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
Return values
Thestate of FLAG (SET or RESET).

Definition at line 1026 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_FLAG [2/2]

#define __HAL_DMA_GET_FLAG (   __HANDLE__,
  __FLAG__ 
)
Value:
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream7)? (BDMA->ISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HISR & (__FLAG__)) : (DMA1->LISR & (__FLAG__)))

Get the DMA Stream pending flags.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>FLAG</strong>Get the specified flag. This parameter can be any combination of the following values:
  • DMA_FLAG_TCIFx: Transfer complete flag.
  • DMA_FLAG_HTIFx: Half transfer complete flag.
  • DMA_FLAG_TEIFx: Transfer error flag.
  • DMA_FLAG_DMEIFx: Direct mode error flag.
  • DMA_FLAG_FEIFx: FIFO error flag. Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
Return values
Thestate of FLAG (SET or RESET).

Definition at line 1026 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_FS [1/2]

#define __HAL_DMA_GET_FS (   __HANDLE__)    ((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (DMA_SxFCR_FS)) : 0)

Return the current DMA Stream FIFO filled level.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
TheFIFO filling state.
  • DMA_FIFOStatus_Less1QuarterFull: when FIFO is less than 1 quarter-full and not empty.
  • DMA_FIFOStatus_1QuarterFull: if more than 1 quarter-full.
  • DMA_FIFOStatus_HalfFull: if more than 1 half-full.
  • DMA_FIFOStatus_3QuartersFull: if more than 3 quarters-full.
  • DMA_FIFOStatus_Empty: when FIFO is empty
  • DMA_FIFOStatus_Full: when FIFO is full

Definition at line 691 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_FS [2/2]

#define __HAL_DMA_GET_FS (   __HANDLE__)    ((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (DMA_SxFCR_FS)) : 0)

Return the current DMA Stream FIFO filled level.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
TheFIFO filling state.
  • DMA_FIFOStatus_Less1QuarterFull: when FIFO is less than 1 quarter-full and not empty.
  • DMA_FIFOStatus_1QuarterFull: if more than 1 quarter-full.
  • DMA_FIFOStatus_HalfFull: if more than 1 half-full.
  • DMA_FIFOStatus_3QuartersFull: if more than 3 quarters-full.
  • DMA_FIFOStatus_Empty: when FIFO is empty
  • DMA_FIFOStatus_Full: when FIFO is full

Definition at line 691 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_HT_FLAG_INDEX [1/2]

#define __HAL_DMA_GET_HT_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_HT0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_HT1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_HT2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_HT3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_HT4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_HT5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_HT6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_HT7 :\
(uint32_t)0x00000000)

Return the current DMA Stream half transfer complete flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified half transfer complete flag index.

Definition at line 823 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_HT_FLAG_INDEX [2/2]

#define __HAL_DMA_GET_HT_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_HT0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_HT1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_HT2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_HT3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_HT4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_HT5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_HT6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_HT7 :\
(uint32_t)0x00000000)

Return the current DMA Stream half transfer complete flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified half transfer complete flag index.

Definition at line 823 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_IT_SOURCE [1/2]

#define __HAL_DMA_GET_IT_SOURCE (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(__HAL_DMA_STREAM_GET_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_GET_IT_SOURCE((__HANDLE__), (__INTERRUPT__))))

Check whether the specified DMA Stream interrupt is enabled or not.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>INTERRUPT</strong>specifies the DMA interrupt source to check. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
Thestate of DMA_IT.

Definition at line 1135 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_IT_SOURCE [2/2]

#define __HAL_DMA_GET_IT_SOURCE (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(__HAL_DMA_STREAM_GET_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_GET_IT_SOURCE((__HANDLE__), (__INTERRUPT__))))

Check whether the specified DMA Stream interrupt is enabled or not.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>INTERRUPT</strong>specifies the DMA interrupt source to check. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
Thestate of DMA_IT.

Definition at line 1135 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_TC_FLAG_INDEX [1/2]

#define __HAL_DMA_GET_TC_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_TC0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_TC1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_TC2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_TC3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_TC4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_TC5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_TC6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_TC7 :\
(uint32_t)0x00000000)

Return the current DMA Stream transfer complete flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified transfer complete flag index.

Definition at line 754 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_TC_FLAG_INDEX [2/2]

#define __HAL_DMA_GET_TC_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_TC0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_TC1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_TC2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_TC3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_TC4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_TC5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_TC6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_TC7 :\
(uint32_t)0x00000000)

Return the current DMA Stream transfer complete flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified transfer complete flag index.

Definition at line 754 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_TE_FLAG_INDEX [1/2]

#define __HAL_DMA_GET_TE_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_TE0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_TE1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_TE2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_TE3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_TE4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_TE5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_TE6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_TE7 :\
(uint32_t)0x00000000)

Return the current DMA Stream transfer error flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified transfer error flag index.

Definition at line 892 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_GET_TE_FLAG_INDEX [2/2]

#define __HAL_DMA_GET_TE_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_TE0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_TE1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_TE2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_TE3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_TE4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_TE5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_TE6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_TE7 :\
(uint32_t)0x00000000)

Return the current DMA Stream transfer error flag.

Parameters
<strong>HANDLE</strong>DMA handle
Return values
Thespecified transfer error flag index.

Definition at line 892 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_RESET_HANDLE_STATE [1/2]

#define __HAL_DMA_RESET_HANDLE_STATE (   __HANDLE__)    ((__HANDLE__)->State = HAL_DMA_STATE_RESET)

Reset DMA handle state.

Parameters
<strong>HANDLE</strong>specifies the DMA handle.
Return values
None

Definition at line 677 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_RESET_HANDLE_STATE [2/2]

#define __HAL_DMA_RESET_HANDLE_STATE (   __HANDLE__)    ((__HANDLE__)->State = HAL_DMA_STATE_RESET)

Reset DMA handle state.

Parameters
<strong>HANDLE</strong>specifies the DMA handle.
Return values
None

Definition at line 677 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_SET_COUNTER [1/2]

#define __HAL_DMA_SET_COUNTER (   __HANDLE__,
  __COUNTER__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->NDTR = (uint16_t)(__COUNTER__)) :\
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CNDTR = (uint16_t)(__COUNTER__)))

Writes the number of data units to be transferred on the DMA Stream.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>COUNTER</strong>Number of data units to be transferred (from 0 to 65535) Number of data items depends only on the Peripheral data format.
Note
If Peripheral data format is Bytes: number of data units is equal to total number of bytes to be transferred.
If Peripheral data format is Half-Word: number of data units is equal to total number of bytes to be transferred / 2.
If Peripheral data format is Word: number of data units is equal to total number of bytes to be transferred / 4.
Return values
Thenumber of remaining data units in the current DMAy Streamx transfer.

Definition at line 1156 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_SET_COUNTER [2/2]

#define __HAL_DMA_SET_COUNTER (   __HANDLE__,
  __COUNTER__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->NDTR = (uint16_t)(__COUNTER__)) :\
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CNDTR = (uint16_t)(__COUNTER__)))

Writes the number of data units to be transferred on the DMA Stream.

Parameters
<strong>HANDLE</strong>DMA handle
<strong>COUNTER</strong>Number of data units to be transferred (from 0 to 65535) Number of data items depends only on the Peripheral data format.
Note
If Peripheral data format is Bytes: number of data units is equal to total number of bytes to be transferred.
If Peripheral data format is Half-Word: number of data units is equal to total number of bytes to be transferred / 2.
If Peripheral data format is Word: number of data units is equal to total number of bytes to be transferred / 4.
Return values
Thenumber of remaining data units in the current DMAy Streamx transfer.

Definition at line 1156 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_STREAM_DISABLE_IT [1/2]

#define __HAL_DMA_STREAM_DISABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR &= ~(__INTERRUPT__)) : (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR &= ~(__INTERRUPT__)))

Definition at line 1097 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_STREAM_DISABLE_IT [2/2]

#define __HAL_DMA_STREAM_DISABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR &= ~(__INTERRUPT__)) : (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR &= ~(__INTERRUPT__)))

Definition at line 1097 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_STREAM_ENABLE_IT [1/2]

#define __HAL_DMA_STREAM_ENABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR |= (__INTERRUPT__)) : (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR |= (__INTERRUPT__)))

Definition at line 1075 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_STREAM_ENABLE_IT [2/2]

#define __HAL_DMA_STREAM_ENABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR |= (__INTERRUPT__)) : (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR |= (__INTERRUPT__)))

Definition at line 1075 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_STREAM_GET_IT_SOURCE [1/2]

#define __HAL_DMA_STREAM_GET_IT_SOURCE (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR & (__INTERRUPT__)) : \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (__INTERRUPT__)))

Definition at line 1119 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ __HAL_DMA_STREAM_GET_IT_SOURCE [2/2]

#define __HAL_DMA_STREAM_GET_IT_SOURCE (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR & (__INTERRUPT__)) : \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (__INTERRUPT__)))

Definition at line 1119 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ DMA_TO_BDMA_IT [1/2]

#define DMA_TO_BDMA_IT (   __DMA_IT__)
Value:
((((__DMA_IT__) & (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)) == (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)) ? (BDMA_CCR_TCIE | BDMA_CCR_HTIE |BDMA_CCR_TEIE) :\
(((__DMA_IT__) & (DMA_IT_TC | DMA_IT_HT)) == (DMA_IT_TC | DMA_IT_HT)) ? (BDMA_CCR_TCIE | BDMA_CCR_HTIE) :\
(((__DMA_IT__) & (DMA_IT_HT | DMA_IT_TE)) == (DMA_IT_HT | DMA_IT_TE)) ? (BDMA_CCR_HTIE |BDMA_CCR_TEIE) :\
(((__DMA_IT__) & (DMA_IT_TC | DMA_IT_TE)) == (DMA_IT_TC | DMA_IT_TE)) ? (BDMA_CCR_TCIE |BDMA_CCR_TEIE) :\
((__DMA_IT__) == DMA_IT_TC) ? BDMA_CCR_TCIE :\
((__DMA_IT__) == DMA_IT_HT) ? BDMA_CCR_HTIE :\
((__DMA_IT__) == DMA_IT_TE) ? BDMA_CCR_TEIE :\
(uint32_t)0x00000000)

Definition at line 1061 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

◆ DMA_TO_BDMA_IT [2/2]

#define DMA_TO_BDMA_IT (   __DMA_IT__)
Value:
((((__DMA_IT__) & (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)) == (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)) ? (BDMA_CCR_TCIE | BDMA_CCR_HTIE |BDMA_CCR_TEIE) :\
(((__DMA_IT__) & (DMA_IT_TC | DMA_IT_HT)) == (DMA_IT_TC | DMA_IT_HT)) ? (BDMA_CCR_TCIE | BDMA_CCR_HTIE) :\
(((__DMA_IT__) & (DMA_IT_HT | DMA_IT_TE)) == (DMA_IT_HT | DMA_IT_TE)) ? (BDMA_CCR_HTIE |BDMA_CCR_TEIE) :\
(((__DMA_IT__) & (DMA_IT_TC | DMA_IT_TE)) == (DMA_IT_TC | DMA_IT_TE)) ? (BDMA_CCR_TCIE |BDMA_CCR_TEIE) :\
((__DMA_IT__) == DMA_IT_TC) ? BDMA_CCR_TCIE :\
((__DMA_IT__) == DMA_IT_HT) ? BDMA_CCR_HTIE :\
((__DMA_IT__) == DMA_IT_TE) ? BDMA_CCR_TEIE :\
(uint32_t)0x00000000)

Definition at line 1061 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h.

DMA_IT_HT
#define DMA_IT_HT
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:587
BDMA_Channel4
#define BDMA_Channel4
Definition: stm32h735xx.h:2668
BDMA_FLAG_HT7
#define BDMA_FLAG_HT7
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:657
DMA_FLAG_DMEIF2_6
#define DMA_FLAG_DMEIF2_6
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:610
DMA_FLAG_FEIF2_6
#define DMA_FLAG_FEIF2_6
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:609
BDMA_FLAG_TC2
#define BDMA_FLAG_TC2
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:636
IS_DMA_STREAM_INSTANCE
#define IS_DMA_STREAM_INSTANCE(INSTANCE)
Definition: stm32h735xx.h:23880
BDMA_FLAG_TE6
#define BDMA_FLAG_TE6
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:654
DMA_Stream_TypeDef
DMA Controller.
Definition: stm32f407xx.h:346
DMA2_Stream3
#define DMA2_Stream3
Definition: stm32f407xx.h:1128
DMA_FLAG_TEIF3_7
#define DMA_FLAG_TEIF3_7
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:616
DMA_FLAG_FEIF0_4
#define DMA_FLAG_FEIF0_4
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:599
BDMA_FLAG_TE2
#define BDMA_FLAG_TE2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:638
DMA2
#define DMA2
Definition: stm32f407xx.h:1124
BDMA_FLAG_TC4
#define BDMA_FLAG_TC4
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:644
__HAL_DMA_STREAM_GET_IT_SOURCE
#define __HAL_DMA_STREAM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:1119
BDMA_Channel7
#define BDMA_Channel7
Definition: stm32h735xx.h:2671
DMA_FLAG_TEIF1_5
#define DMA_FLAG_TEIF1_5
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:606
DMA1_Stream4
#define DMA1_Stream4
Definition: stm32f407xx.h:1120
BDMA_FLAG_HT3
#define BDMA_FLAG_HT3
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:641
DMA2_Stream0
#define DMA2_Stream0
Definition: stm32f407xx.h:1125
DMA_IT_TC
#define DMA_IT_TC
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:586
DMA2_Stream7
#define DMA2_Stream7
Definition: stm32f407xx.h:1132
BDMA_ISR_GIF0
#define BDMA_ISR_GIF0
Definition: stm32h735xx.h:6875
DMA_FLAG_DMEIF3_7
#define DMA_FLAG_DMEIF3_7
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:615
BDMA_CCR_EN
#define BDMA_CCR_EN
Definition: stm32h735xx.h:7071
BDMA_Channel3
#define BDMA_Channel3
Definition: stm32h735xx.h:2667
DMA_FLAG_FEIF3_7
#define DMA_FLAG_FEIF3_7
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:614
BDMA_ISR_GIF4
#define BDMA_ISR_GIF4
Definition: stm32h735xx.h:6923
BDMA_Channel1
#define BDMA_Channel1
Definition: stm32h735xx.h:2665
DMA_FLAG_TCIF2_6
#define DMA_FLAG_TCIF2_6
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:613
DMA_FLAG_TEIF2_6
#define DMA_FLAG_TEIF2_6
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:611
DMA1_Stream7
#define DMA1_Stream7
Definition: stm32f407xx.h:1123
BDMA_FLAG_HT5
#define BDMA_FLAG_HT5
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:649
BDMA_FLAG_TC7
#define BDMA_FLAG_TC7
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:656
BDMA_CCR_TCIE
#define BDMA_CCR_TCIE
Definition: stm32h735xx.h:7074
BDMA_FLAG_HT6
#define BDMA_FLAG_HT6
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:653
BDMA_ISR_GIF6
#define BDMA_ISR_GIF6
Definition: stm32h735xx.h:6947
DMA_FLAG_HTIF1_5
#define DMA_FLAG_HTIF1_5
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:607
BDMA_FLAG_TC1
#define BDMA_FLAG_TC1
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:632
DMA_FLAG_HTIF2_6
#define DMA_FLAG_HTIF2_6
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:612
BDMA_FLAG_HT2
#define BDMA_FLAG_HT2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:637
BDMA_CCR_HTIE
#define BDMA_CCR_HTIE
Definition: stm32h735xx.h:7077
DMA_SxCR_EN
#define DMA_SxCR_EN
Definition: stm32f407xx.h:5875
BDMA_Channel_TypeDef
Definition: stm32h735xx.h:623
DMA1_Stream1
#define DMA1_Stream1
Definition: stm32f407xx.h:1117
DMA_FLAG_DMEIF1_5
#define DMA_FLAG_DMEIF1_5
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:605
DMA_FLAG_TCIF3_7
#define DMA_FLAG_TCIF3_7
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:618
__HAL_BDMA_CHANNEL_DISABLE_IT
#define __HAL_BDMA_CHANNEL_DISABLE_IT(__HANDLE__, __INTERRUPT__)
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:1095
BDMA_FLAG_TE4
#define BDMA_FLAG_TE4
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:646
DMA_FLAG_TCIF0_4
#define DMA_FLAG_TCIF0_4
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:603
DMA2_Stream4
#define DMA2_Stream4
Definition: stm32f407xx.h:1129
BDMA_FLAG_TC0
#define BDMA_FLAG_TC0
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:628
DMA_FLAG_HTIF3_7
#define DMA_FLAG_HTIF3_7
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:617
BDMA_FLAG_HT1
#define BDMA_FLAG_HT1
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:633
DMA2_Stream2
#define DMA2_Stream2
Definition: stm32f407xx.h:1127
DMA_IT_FE
#define DMA_IT_FE
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:590
DMA_FLAG_HTIF0_4
#define DMA_FLAG_HTIF0_4
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:602
BDMA_FLAG_HT0
#define BDMA_FLAG_HT0
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:629
BDMA_ISR_GIF2
#define BDMA_ISR_GIF2
Definition: stm32h735xx.h:6899
__HAL_DMA_STREAM_DISABLE_IT
#define __HAL_DMA_STREAM_DISABLE_IT(__HANDLE__, __INTERRUPT__)
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:1097
BDMA_FLAG_TE3
#define BDMA_FLAG_TE3
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:642
DMA1
#define DMA1
Definition: stm32f407xx.h:1115
DMA1_Stream6
#define DMA1_Stream6
Definition: stm32f407xx.h:1122
BDMA_Channel0
#define BDMA_Channel0
Definition: stm32h735xx.h:2664
BDMA_FLAG_TE1
#define BDMA_FLAG_TE1
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:634
BDMA_ISR_GIF5
#define BDMA_ISR_GIF5
Definition: stm32h735xx.h:6935
DMA2_Stream6
#define DMA2_Stream6
Definition: stm32f407xx.h:1131
BDMA_ISR_GIF3
#define BDMA_ISR_GIF3
Definition: stm32h735xx.h:6911
BDMA_ISR_GIF7
#define BDMA_ISR_GIF7
Definition: stm32h735xx.h:6959
BDMA_FLAG_TC6
#define BDMA_FLAG_TC6
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:652
BDMA_FLAG_HT4
#define BDMA_FLAG_HT4
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:645
BDMA_FLAG_TC3
#define BDMA_FLAG_TC3
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:640
DMA1_Stream5
#define DMA1_Stream5
Definition: stm32f407xx.h:1121
BDMA_ISR_GIF1
#define BDMA_ISR_GIF1
Definition: stm32h735xx.h:6887
BDMA_FLAG_TE0
#define BDMA_FLAG_TE0
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:630
DMA_FLAG_TEIF0_4
#define DMA_FLAG_TEIF0_4
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:601
DMA_FLAG_DMEIF0_4
#define DMA_FLAG_DMEIF0_4
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:600
DMA_FLAG_FEIF1_5
#define DMA_FLAG_FEIF1_5
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:604
BDMA_Channel2
#define BDMA_Channel2
Definition: stm32h735xx.h:2666
DMA_FLAG_TCIF1_5
#define DMA_FLAG_TCIF1_5
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:608
BDMA_FLAG_TE7
#define BDMA_FLAG_TE7
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:658
DMA2_Stream1
#define DMA2_Stream1
Definition: stm32f407xx.h:1126
DMA1_Stream0
#define DMA1_Stream0
Definition: stm32f407xx.h:1116
DMA1_Stream2
#define DMA1_Stream2
Definition: stm32f407xx.h:1118
DMA2_Stream5
#define DMA2_Stream5
Definition: stm32f407xx.h:1130
BDMA_Channel5
#define BDMA_Channel5
Definition: stm32h735xx.h:2669
BDMA_Channel6
#define BDMA_Channel6
Definition: stm32h735xx.h:2670
DMA1_Stream3
#define DMA1_Stream3
Definition: stm32f407xx.h:1119
BDMA_FLAG_TE5
#define BDMA_FLAG_TE5
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:650
BDMA_FLAG_TC5
#define BDMA_FLAG_TC5
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:648
__HAL_BDMA_CHANNEL_GET_IT_SOURCE
#define __HAL_BDMA_CHANNEL_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:1117
BDMA
#define BDMA
Definition: stm32h735xx.h:2663
__HAL_DMA_STREAM_ENABLE_IT
#define __HAL_DMA_STREAM_ENABLE_IT(__HANDLE__, __INTERRUPT__)
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:1075
BDMA_CCR_TEIE
#define BDMA_CCR_TEIE
Definition: stm32h735xx.h:7080
DMA_IT_TE
#define DMA_IT_TE
Definition: stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:588
__HAL_BDMA_CHANNEL_ENABLE_IT
#define __HAL_BDMA_CHANNEL_ENABLE_IT(__HANDLE__, __INTERRUPT__)
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h:1072

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autogenerated on Fri Apr 1 2022 02:15:08