Collaboration diagram for RCC_AHB_Clock_Source:

Macros
#define	IS_RCC_HCLK(HCLK)

#define	IS_RCC_HCLK(HCLK)

#define	IS_RCC_HCLK(HCLK)

#define	RCC_SYSCLK_Div1 ((uint32_t)0x00000000)

#define	RCC_SYSCLK_Div1 ((uint32_t)0x00000000)

#define	RCC_SYSCLK_Div1 RCC_CFGR_HPRE_DIV1

#define	RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)

#define	RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)

#define	RCC_SYSCLK_Div128 RCC_CFGR_HPRE_DIV128

#define	RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)

#define	RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)

#define	RCC_SYSCLK_Div16 RCC_CFGR_HPRE_DIV16

#define	RCC_SYSCLK_Div2 ((uint32_t)0x00000080)

#define	RCC_SYSCLK_Div2 ((uint32_t)0x00000080)

#define	RCC_SYSCLK_Div2 RCC_CFGR_HPRE_DIV2

#define	RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)

#define	RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)

#define	RCC_SYSCLK_Div256 RCC_CFGR_HPRE_DIV256

#define	RCC_SYSCLK_Div4 ((uint32_t)0x00000090)

#define	RCC_SYSCLK_Div4 ((uint32_t)0x00000090)

#define	RCC_SYSCLK_Div4 RCC_CFGR_HPRE_DIV4

#define	RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)

#define	RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)

#define	RCC_SYSCLK_Div512 RCC_CFGR_HPRE_DIV512

#define	RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)

#define	RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)

#define	RCC_SYSCLK_Div64 RCC_CFGR_HPRE_DIV64

#define	RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)

#define	RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)

#define	RCC_SYSCLK_Div8 RCC_CFGR_HPRE_DIV8

Detailed Description

Macro Definition Documentation

#define IS_RCC_HCLK ( HCLK )

Value:

(((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
                           ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
                           ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
                           ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
                           ((HCLK) == RCC_SYSCLK_Div512))

Definition at line 118 of file STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rcc.h.

#define IS_RCC_HCLK ( HCLK )

Value:

(((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
                           ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
                           ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
                           ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
                           ((HCLK) == RCC_SYSCLK_Div512))

Definition at line 177 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.h.

#define IS_RCC_HCLK ( HCLK )

Value:

(((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
                           ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
                           ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
                           ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
                           ((HCLK) == RCC_SYSCLK_Div512))