pv_stm32h747.c
Go to the documentation of this file.
1 /*
2  Copyright 2020-2021 Picovoice Inc.
3 
4  You may not use this file except in compliance with the license. A copy of the license is located in the "LICENSE"
5  file accompanying this source.
6 
7  Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on
8  an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the
9  specific language governing permissions and limitations under the License.
10 */
11 
12 #include <stdbool.h>
13 #include <string.h>
14 
15 #include "stm32h747i_discovery.h"
16 
17 #include "pv_stm32h747.h"
18 
19 #define UUID_ADDRESS (0x1FF1E800)
20 #define UUID_SIZE (12)
21 
22 #define PV_COM (USART1)
23 #define PV_COM_ALT (GPIO_AF7_USART1)
24 #define PV_COM_IRQn (USART1_IRQn)
25 #define PV_COM_TX_Pin (GPIO_PIN_10)
26 #define PV_COM_TX_GPIO_Port (GPIOA)
27 #define PV_COM_RX_Pin (GPIO_PIN_9)
28 #define PV_COM_RX_GPIO_Port (GPIOA)
29 
30 #define SDRAM_DEVICE_ADDR 0xD0000000U
31 
32 static uint8_t uuid[UUID_SIZE];
34 
35 static void MPU_Config(void) {
36  MPU_Region_InitTypeDef MPU_InitStruct;
37  HAL_MPU_Disable();
38  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
39  MPU_InitStruct.BaseAddress = SDRAM_DEVICE_ADDR;
40  MPU_InitStruct.Size = MPU_REGION_SIZE_32MB;
41  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
42  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
43  MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
44  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
45  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
46  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
47  MPU_InitStruct.SubRegionDisable = 0x00;
48  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
49  HAL_MPU_ConfigRegion(&MPU_InitStruct);
50  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
51 }
52 static void CPU_CACHE_Enable(void) {
55 }
56 
58 
59  RCC_ClkInitTypeDef RCC_ClkInitStruct;
60  RCC_OscInitTypeDef RCC_OscInitStruct;
62 
63  HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
65 
67 
68  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
69  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
70  RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
71  RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
72  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
73  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
74 
75  RCC_OscInitStruct.PLL.PLLM = 5;
76  RCC_OscInitStruct.PLL.PLLN = 160;
77  RCC_OscInitStruct.PLL.PLLFRACN = 0;
78  RCC_OscInitStruct.PLL.PLLP = 2;
79  RCC_OscInitStruct.PLL.PLLR = 2;
80  RCC_OscInitStruct.PLL.PLLQ = 4;
81 
82  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
83  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
84  ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
85  if(ret != HAL_OK) {
87  }
88 
90  RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1);
91  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
92  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
93  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
94  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
95  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
96  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
97  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
98  ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
99  if(ret != HAL_OK) {
101  }
102 
106 
107  return PV_STATUS_SUCCESS;
108 }
109 
110 static pv_status_t pv_uart_init(void) {
111 
112  GPIO_InitTypeDef GPIO_InitStruct = {0};
115  GPIO_InitStruct.Pin = PV_COM_TX_Pin | PV_COM_RX_Pin;
116  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
117  GPIO_InitStruct.Pull = GPIO_NOPULL;
118  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
119  GPIO_InitStruct.Alternate = PV_COM_ALT;
120  HAL_GPIO_Init(PV_COM_TX_GPIO_Port, &GPIO_InitStruct);
121 
123  huart.Init.BaudRate = 115200;
130 
131  if (HAL_UART_Init(&huart) != HAL_OK) {
133  }
136  }
139  }
142  }
145  return PV_STATUS_SUCCESS;
146 }
147 
149  if (pv_uart_init() != PV_STATUS_SUCCESS) {
151  }
152  return PV_STATUS_SUCCESS;
153 }
154 
155 const uint8_t *pv_get_uuid(void) {
156  return (const uint8_t *) uuid;
157 }
158 
159 const uint32_t pv_get_uuid_size(void) {
160  return UUID_SIZE;
161 }
162 
164  MPU_Config();
166 
167  if (HAL_Init() != HAL_OK) {
169  }
172  }
173  memcpy(uuid, (uint8_t *) UUID_ADDRESS, UUID_SIZE);
174 
179 
180  return PV_STATUS_SUCCESS;
181 }
182 
184 }
185 
186 void pv_error_handler(void) {
187  while(true);
188 }
189 
190 void assert_failed(uint8_t* file, uint32_t line)
191 {
192  (void) file;
193  (void) line;
195 }
196 
197 int __io_putchar (int ch) {
198  HAL_UART_Transmit(&huart, (uint8_t *) &ch, 1, 1000);
199  return ch;
200 }
RCC_ClkInitTypeDef::SYSCLKDivider
uint32_t SYSCLKDivider
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:132
__HAL_PWR_GET_FLAG
#define __HAL_PWR_GET_FLAG(__FLAG__)
Check PWR flag is set or not.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:173
RCC_PLLInitTypeDef::PLLQ
uint32_t PLLQ
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:65
UART_TXFIFO_THRESHOLD_1_8
#define UART_TXFIFO_THRESHOLD_1_8
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart_ex.h:102
GPIO_MODE_AF_PP
#define GPIO_MODE_AF_PP
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:122
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
PV_COM_TX_Pin
#define PV_COM_TX_Pin
Definition: pv_stm32h747.c:25
__UART_HandleTypeDef::Init
UART_InitTypeDef Init
Definition: stm32f4xx_hal_uart.h:145
pv_error_handler
void pv_error_handler(void)
Definition: pv_stm32h747.c:186
huart
UART_HandleTypeDef huart
Definition: pv_stm32h747.c:33
HAL_NVIC_EnableIRQ
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
RCC_PLLInitTypeDef::PLLState
uint32_t PLLState
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:49
RCC_PLLInitTypeDef::PLLFRACN
uint32_t PLLFRACN
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:78
HAL_UART_Transmit
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
FLASH_LATENCY_4
#define FLASH_LATENCY_4
Definition: stm32f7xx_hal_flash_ex.h:288
RCC_APB4_DIV2
#define RCC_APB4_DIV2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:477
LED4
@ LED4
Definition: stm32f4_discovery.h:65
PV_STATUS_INVALID_STATE
@ PV_STATUS_INVALID_STATE
Definition: porcupine/include/picovoice.h:40
HAL_UARTEx_DisableFifoMode
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
GPIO_InitTypeDef
GPIO Init structure definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:47
RCC_PLL_ON
#define RCC_PLL_ON
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:162
RCC_HCLK_DIV2
#define RCC_HCLK_DIV2
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:244
RCC_ClkInitTypeDef
RCC System, AHB and APB busses clock configuration structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:77
RCC_PLLInitTypeDef::PLLP
uint32_t PLLP
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:62
RCC_PLL1VCOWIDE
#define RCC_PLL1VCOWIDE
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:303
PV_COM_TX_GPIO_Port
#define PV_COM_TX_GPIO_Port
Definition: pv_stm32h747.c:26
__HAL_RCC_USART1_CLK_ENABLE
#define __HAL_RCC_USART1_CLK_ENABLE()
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:571
RCC_OscInitTypeDef
RCC Internal/External Oscillator (HSE, HSI, LSE and LSI) configuration structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:51
RCC_ClkInitTypeDef::APB3CLKDivider
uint32_t APB3CLKDivider
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:138
stm32h747i_discovery.h
This file contains definitions for STM32H747I_DISCO: LEDs push-buttons COM ports hardware resources.
GPIO_InitTypeDef::Alternate
uint32_t Alternate
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:61
UART_RXFIFO_THRESHOLD_1_8
#define UART_RXFIFO_THRESHOLD_1_8
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart_ex.h:116
RCC_ClkInitTypeDef::APB2CLKDivider
uint32_t APB2CLKDivider
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:91
RCC_PLLInitTypeDef::PLLM
uint32_t PLLM
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:55
UART_InitTypeDef::OverSampling
uint32_t OverSampling
Definition: stm32f4xx_hal_uart.h:74
GPIO_SPEED_FREQ_LOW
#define GPIO_SPEED_FREQ_LOW
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:142
UART_InitTypeDef::WordLength
uint32_t WordLength
Definition: stm32f4xx_hal_uart.h:55
__UART_HandleTypeDef
UART handle Structure definition.
Definition: stm32f4xx_hal_uart.h:141
UART_InitTypeDef::BaudRate
uint32_t BaudRate
Definition: stm32f4xx_hal_uart.h:49
PV_COM_RX_Pin
#define PV_COM_RX_Pin
Definition: pv_stm32h747.c:27
MPU_Config
static void MPU_Config(void)
Definition: pv_stm32h747.c:35
UUID_ADDRESS
#define UUID_ADDRESS
Definition: pv_stm32h747.c:19
HAL_PWREx_ConfigSupply
HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource)
LED2
@ LED2
Definition: stm32469i_discovery.h:72
SCB_EnableICache
__STATIC_FORCEINLINE void SCB_EnableICache(void)
Enable I-Cache.
Definition: imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h:2241
RCC_SYSCLKSOURCE_PLLCLK
#define RCC_SYSCLKSOURCE_PLLCLK
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:205
UART_HWCONTROL_NONE
#define UART_HWCONTROL_NONE
Definition: stm32f4xx_hal_uart.h:275
PWR_FLAG_VOSRDY
#define PWR_FLAG_VOSRDY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:138
HAL_OK
@ HAL_OK
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:42
UART_InitTypeDef::StopBits
uint32_t StopBits
Definition: stm32f4xx_hal_uart.h:58
pv_board_init
pv_status_t pv_board_init()
Definition: pv_stm32h747.c:163
pv_message_init
pv_status_t pv_message_init(void)
Definition: pv_stm32h747.c:148
HAL_GPIO_Init
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
UUID_SIZE
#define UUID_SIZE
Definition: pv_stm32h747.c:20
RCC_CLOCKTYPE_PCLK1
#define RCC_CLOCKTYPE_PCLK1
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:192
RCC_OscInitTypeDef::HSIState
uint32_t HSIState
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:62
GPIO_InitTypeDef::Mode
uint32_t Mode
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:52
RCC_PLLInitTypeDef::PLLR
uint32_t PLLR
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:71
GPIO_InitTypeDef::Pull
uint32_t Pull
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:55
GPIO_NOPULL
#define GPIO_NOPULL
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:154
PV_STATUS_SUCCESS
@ PV_STATUS_SUCCESS
Definition: porcupine/include/picovoice.h:34
LED1
@ LED1
Definition: stm32469i_discovery.h:70
RCC_PLLInitTypeDef::PLLSource
uint32_t PLLSource
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:52
pv_status_t
pv_status_t
Definition: porcupine/include/picovoice.h:33
HAL_RCC_ClockConfig
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
RCC_ClkInitTypeDef::AHBCLKDivider
uint32_t AHBCLKDivider
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:85
pv_uart_init
static pv_status_t pv_uart_init(void)
Definition: pv_stm32h747.c:110
RCC_PLLInitTypeDef::PLLRGE
uint32_t PLLRGE
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:73
RCC_CLOCKTYPE_D3PCLK1
#define RCC_CLOCKTYPE_D3PCLK1
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:319
HAL_UART_Init
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
uuid
static uint8_t uuid[UUID_SIZE]
Definition: pv_stm32h747.c:32
HAL_RCC_OscConfig
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
UART_MODE_TX_RX
#define UART_MODE_TX_RX
Definition: stm32f4xx_hal_uart.h:288
__HAL_RCC_SYSCFG_CLK_ENABLE
#define __HAL_RCC_SYSCFG_CLK_ENABLE()
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:599
CPU_CACHE_Enable
static void CPU_CACHE_Enable(void)
Definition: pv_stm32h747.c:52
RCC_OscInitTypeDef::PLL
RCC_PLLInitTypeDef PLL
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:71
RCC_ClkInitTypeDef::ClockType
uint32_t ClockType
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:79
GPIO_InitTypeDef::Speed
uint32_t Speed
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:58
assert_failed
void assert_failed(uint8_t *file, uint32_t line)
Definition: pv_stm32h747.c:190
UART_WORDLENGTH_8B
#define UART_WORDLENGTH_8B
Definition: stm32f4xx_hal_uart.h:247
RCC_PLLSOURCE_HSE
#define RCC_PLLSOURCE_HSE
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:182
RCC_CLOCKTYPE_SYSCLK
#define RCC_CLOCKTYPE_SYSCLK
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:190
PWR_REGULATOR_VOLTAGE_SCALE1
#define PWR_REGULATOR_VOLTAGE_SCALE1
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:74
LED3
@ LED3
Definition: stm32f4_discovery.h:66
__HAL_RCC_GPIOA_CLK_ENABLE
#define __HAL_RCC_GPIOA_CLK_ENABLE()
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:386
RCC_HSE_ON
#define RCC_HSE_ON
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:121
PV_COM_IRQn
#define PV_COM_IRQn
Definition: pv_stm32h747.c:24
HAL_Init
HAL_StatusTypeDef HAL_Init(void)
This function is used to initialize the HAL Library; it must be the first instruction to be executed ...
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:157
pv_get_uuid
const uint8_t * pv_get_uuid(void)
Definition: pv_stm32h747.c:155
RCC_CLOCKTYPE_HCLK
#define RCC_CLOCKTYPE_HCLK
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:191
SCB_EnableDCache
__STATIC_FORCEINLINE void SCB_EnableDCache(void)
Enable D-Cache.
Definition: imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h:2325
pv_get_uuid_size
const uint32_t pv_get_uuid_size(void)
Definition: pv_stm32h747.c:159
RCC_SYSCLK_DIV1
#define RCC_SYSCLK_DIV1
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:227
SDRAM_DEVICE_ADDR
#define SDRAM_DEVICE_ADDR
Definition: pv_stm32h747.c:30
pv_board_deinit
void pv_board_deinit()
Definition: pv_stm32h747.c:183
RCC_OscInitTypeDef::CSIState
uint32_t CSIState
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:110
__io_putchar
int __io_putchar(int ch)
Definition: pv_stm32h747.c:197
RCC_PLL1VCIRANGE_2
#define RCC_PLL1VCIRANGE_2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:291
PV_COM
#define PV_COM
Definition: pv_stm32h747.c:22
UART_InitTypeDef::Mode
uint32_t Mode
Definition: stm32f4xx_hal_uart.h:68
RCC_APB2_DIV2
#define RCC_APB2_DIV2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:457
RCC_APB3_DIV2
#define RCC_APB3_DIV2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:416
pv_clock_config
static pv_status_t pv_clock_config(void)
Definition: pv_stm32h747.c:57
UART_OVERSAMPLING_16
#define UART_OVERSAMPLING_16
Definition: stm32f4xx_hal_uart.h:305
pv_stm32h747.h
RCC_ClkInitTypeDef::APB4CLKDivider
uint32_t APB4CLKDivider
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:145
UART_InitTypeDef::HwFlowCtl
uint32_t HwFlowCtl
Definition: stm32f4xx_hal_uart.h:71
RCC_CSI_OFF
#define RCC_CSI_OFF
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:242
UART_PARITY_NONE
#define UART_PARITY_NONE
Definition: stm32f4xx_hal_uart.h:265
RCC_ClkInitTypeDef::SYSCLKSource
uint32_t SYSCLKSource
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:82
RCC_OSCILLATORTYPE_HSE
#define RCC_OSCILLATORTYPE_HSE
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:109
RCC_OscInitTypeDef::HSEState
uint32_t HSEState
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:56
HAL_NVIC_SetPriority
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
RCC_CLOCKTYPE_D1PCLK1
#define RCC_CLOCKTYPE_D1PCLK1
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:316
HAL_UARTEx_SetTxFifoThreshold
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
HAL_EnableCompensationCell
void HAL_EnableCompensationCell(void)
Enables the I/O Compensation Cell.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:524
HAL_UARTEx_SetRxFifoThreshold
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
RCC_PLLInitTypeDef::PLLN
uint32_t PLLN
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:58
__HAL_RCC_CSI_ENABLE
#define __HAL_RCC_CSI_ENABLE()
Macros to enable or disable the Internal oscillator (CSI).
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:7236
RCC_PLLInitTypeDef::PLLVCOSEL
uint32_t PLLVCOSEL
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:75
RCC_OscInitTypeDef::OscillatorType
uint32_t OscillatorType
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:53
__UART_HandleTypeDef::Instance
USART_TypeDef * Instance
Definition: stm32f4xx_hal_uart.h:143
RCC_ClkInitTypeDef::APB1CLKDivider
uint32_t APB1CLKDivider
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:88
RCC_HSI_OFF
#define RCC_HSI_OFF
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:140
BSP_LED_Init
void BSP_LED_Init(Led_TypeDef Led)
Configures LED GPIO.
Definition: stm32f4_discovery.c:170
UART_STOPBITS_1
#define UART_STOPBITS_1
Definition: stm32f4xx_hal_uart.h:256
__HAL_PWR_VOLTAGESCALING_CONFIG
#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__)
macros configure the main internal regulator output voltage.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:135
PV_COM_ALT
#define PV_COM_ALT
Definition: pv_stm32h747.c:23
UART_InitTypeDef::Parity
uint32_t Parity
Definition: stm32f4xx_hal_uart.h:61
RCC_APB1_DIV2
#define RCC_APB1_DIV2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:436
GPIO_InitTypeDef::Pin
uint32_t Pin
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:49


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:14:50