Macros
AHB1 Peripheral Clock Enable Disable
STM32F4xx_HAL_Driver | STM32F7xx_HAL_Driver | STM32H7xx_HAL_Driver » RCC » RCC Exported Macros

Enable or disable the AHB1 peripheral clock. More...

Collaboration diagram for AHB1 Peripheral Clock Enable Disable:

Macros

#define __HAL_RCC_CRC_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
 
#define __HAL_RCC_CRC_CLK_ENABLE()
 
#define __HAL_RCC_DMA1_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))
 
#define __HAL_RCC_DMA1_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))
 
#define __HAL_RCC_DMA1_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))
 
#define __HAL_RCC_DMA1_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))
 
#define __HAL_RCC_DMA1_CLK_ENABLE()
 
#define __HAL_RCC_DMA1_CLK_ENABLE()
 
#define __HAL_RCC_DMA1_CLK_ENABLE()
 
#define __HAL_RCC_DMA1_CLK_ENABLE()
 
#define __HAL_RCC_DMA2_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2EN))
 
#define __HAL_RCC_DMA2_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2EN))
 
#define __HAL_RCC_DMA2_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2EN))
 
#define __HAL_RCC_DMA2_CLK_ENABLE()
 
#define __HAL_RCC_DMA2_CLK_ENABLE()
 
#define __HAL_RCC_DMA2_CLK_ENABLE()
 
#define __HAL_RCC_GPIOA_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN))
 
#define __HAL_RCC_GPIOA_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN))
 
#define __HAL_RCC_GPIOA_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN))
 
#define __HAL_RCC_GPIOA_CLK_ENABLE()
 
#define __HAL_RCC_GPIOA_CLK_ENABLE()
 
#define __HAL_RCC_GPIOA_CLK_ENABLE()
 
#define __HAL_RCC_GPIOB_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOBEN))
 
#define __HAL_RCC_GPIOB_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOBEN))
 
#define __HAL_RCC_GPIOB_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOBEN))
 
#define __HAL_RCC_GPIOB_CLK_ENABLE()
 
#define __HAL_RCC_GPIOB_CLK_ENABLE()
 
#define __HAL_RCC_GPIOB_CLK_ENABLE()
 
#define __HAL_RCC_GPIOC_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOCEN))
 
#define __HAL_RCC_GPIOC_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOCEN))
 
#define __HAL_RCC_GPIOC_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOCEN))
 
#define __HAL_RCC_GPIOC_CLK_ENABLE()
 
#define __HAL_RCC_GPIOC_CLK_ENABLE()
 
#define __HAL_RCC_GPIOC_CLK_ENABLE()
 
#define __HAL_RCC_GPIOH_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOHEN))
 
#define __HAL_RCC_GPIOH_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOHEN))
 
#define __HAL_RCC_GPIOH_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOHEN))
 
#define __HAL_RCC_GPIOH_CLK_ENABLE()
 
#define __HAL_RCC_GPIOH_CLK_ENABLE()
 
#define __HAL_RCC_GPIOH_CLK_ENABLE()
 

Detailed Description

Enable or disable the AHB1 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_CRC_CLK_DISABLE

#define __HAL_RCC_CRC_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))

Definition at line 425 of file stm32f7xx_hal_rcc.h.

◆ __HAL_RCC_CRC_CLK_ENABLE

#define __HAL_RCC_CRC_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
UNUSED(tmpreg); \
} while(0)

Definition at line 409 of file stm32f7xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_CLK_DISABLE [1/4]

#define __HAL_RCC_DMA1_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))

Definition at line 426 of file stm32f7xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_CLK_DISABLE [2/4]

#define __HAL_RCC_DMA1_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))

Definition at line 433 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_CLK_DISABLE [3/4]

#define __HAL_RCC_DMA1_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))

Definition at line 433 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_CLK_DISABLE [4/4]

#define __HAL_RCC_DMA1_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))

Definition at line 433 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_CLK_ENABLE [1/4]

#define __HAL_RCC_DMA1_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 414 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_CLK_ENABLE [2/4]

#define __HAL_RCC_DMA1_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 414 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_CLK_ENABLE [3/4]

#define __HAL_RCC_DMA1_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 414 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_CLK_ENABLE [4/4]

#define __HAL_RCC_DMA1_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
UNUSED(tmpreg); \
} while(0)

Definition at line 417 of file stm32f7xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_CLK_DISABLE [1/3]

#define __HAL_RCC_DMA2_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2EN))

Definition at line 434 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_CLK_DISABLE [2/3]

#define __HAL_RCC_DMA2_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2EN))

Definition at line 434 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_CLK_DISABLE [3/3]

#define __HAL_RCC_DMA2_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2EN))

Definition at line 434 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_CLK_ENABLE [1/3]

#define __HAL_RCC_DMA2_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 421 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_CLK_ENABLE [2/3]

#define __HAL_RCC_DMA2_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 421 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_CLK_ENABLE [3/3]

#define __HAL_RCC_DMA2_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 421 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOA_CLK_DISABLE [1/3]

#define __HAL_RCC_GPIOA_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN))

Definition at line 429 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOA_CLK_DISABLE [2/3]

#define __HAL_RCC_GPIOA_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN))

Definition at line 429 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOA_CLK_DISABLE [3/3]

#define __HAL_RCC_GPIOA_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN))

Definition at line 429 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOA_CLK_ENABLE [1/3]

#define __HAL_RCC_GPIOA_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 386 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOA_CLK_ENABLE [2/3]

#define __HAL_RCC_GPIOA_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 386 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOA_CLK_ENABLE [3/3]

#define __HAL_RCC_GPIOA_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 386 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOB_CLK_DISABLE [1/3]

#define __HAL_RCC_GPIOB_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOBEN))

Definition at line 430 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOB_CLK_DISABLE [2/3]

#define __HAL_RCC_GPIOB_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOBEN))

Definition at line 430 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOB_CLK_DISABLE [3/3]

#define __HAL_RCC_GPIOB_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOBEN))

Definition at line 430 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOB_CLK_ENABLE [1/3]

#define __HAL_RCC_GPIOB_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 393 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOB_CLK_ENABLE [2/3]

#define __HAL_RCC_GPIOB_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 393 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOB_CLK_ENABLE [3/3]

#define __HAL_RCC_GPIOB_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 393 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOC_CLK_DISABLE [1/3]

#define __HAL_RCC_GPIOC_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOCEN))

Definition at line 431 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOC_CLK_DISABLE [2/3]

#define __HAL_RCC_GPIOC_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOCEN))

Definition at line 431 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOC_CLK_DISABLE [3/3]

#define __HAL_RCC_GPIOC_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOCEN))

Definition at line 431 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOC_CLK_ENABLE [1/3]

#define __HAL_RCC_GPIOC_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 400 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOC_CLK_ENABLE [2/3]

#define __HAL_RCC_GPIOC_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 400 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOC_CLK_ENABLE [3/3]

#define __HAL_RCC_GPIOC_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 400 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOH_CLK_DISABLE [1/3]

#define __HAL_RCC_GPIOH_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOHEN))

Definition at line 432 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOH_CLK_DISABLE [2/3]

#define __HAL_RCC_GPIOH_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOHEN))

Definition at line 432 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOH_CLK_DISABLE [3/3]

#define __HAL_RCC_GPIOH_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOHEN))

Definition at line 432 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOH_CLK_ENABLE [1/3]

#define __HAL_RCC_GPIOH_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 407 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOH_CLK_ENABLE [2/3]

#define __HAL_RCC_GPIOH_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 407 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOH_CLK_ENABLE [3/3]

#define __HAL_RCC_GPIOH_CLK_ENABLE ( )
Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 407 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h.

RCC_AHB1ENR_GPIOBEN
#define RCC_AHB1ENR_GPIOBEN
Definition: stm32f407xx.h:9882
RCC_AHB1ENR_CRCEN
#define RCC_AHB1ENR_CRCEN
Definition: stm32f407xx.h:9906
RCC_AHB1ENR_DMA2EN
#define RCC_AHB1ENR_DMA2EN
Definition: stm32f407xx.h:9918
RCC_AHB1ENR_DMA1EN
#define RCC_AHB1ENR_DMA1EN
Definition: stm32f407xx.h:9915
RCC_AHB1ENR_GPIOCEN
#define RCC_AHB1ENR_GPIOCEN
Definition: stm32f407xx.h:9885
READ_BIT
#define READ_BIT(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:216
RCC_AHB1ENR_GPIOHEN
#define RCC_AHB1ENR_GPIOHEN
Definition: stm32f407xx.h:9900
RCC
#define RCC
Definition: stm32f407xx.h:1113
RCC_AHB1ENR_GPIOAEN
#define RCC_AHB1ENR_GPIOAEN
Definition: stm32f407xx.h:9879

picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:06