32 #ifndef __IOCON_11XX_H_ 33 #define __IOCON_11XX_H_ 47 #if defined(CHIP_LPC11UXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11AXX) 95 #
if !defined(CHIP_LPC1125)
100 #if !defined(CHIP_LPC1125) 114 #
if !defined(CHIP_LPC1125)
120 #
if !defined(CHIP_LPC1125)
130 #
if defined(CHIP_LPC1125)
131 IOCON_SSEL1_LOC_PIO2_2 = (0x18),
132 IOCON_SSEL1_LOC_PIO2_4 = (0x18 | 1),
134 IOCON_CT16B0_CAP0_LOC_PIO0_2 = (0xC0),
135 IOCON_CT16B0_CAP0_LOC_PIO3_3 = (0xC0 | 1),
137 IOCON_SCK1_LOC_PIO2_1 = (0xC4),
138 IOCON_SCK1_LOC_PIO3_2 = (0xC4 | 1),
140 IOCON_MISO1_LOC_PIO2_2 = (0xC8),
141 IOCON_MISO1_LOC_PIO1_10 = (0xC8 | 1),
143 IOCON_MOSI1_LOC_PIO2_3 = (0xCC),
144 IOCON_MOSI1_LOC_PIO1_9 = (0xCC),
146 IOCON_CT326B0_CAP0_LOC_PIO1_5 = (0xD0),
147 IOCON_CT326B0_CAP0_LOC_PIO2_9 = (0xD0 | 1),
149 IOCON_U0_RXD_LOC_PIO1_6 = (0xD4),
150 IOCON_U0_RXD_LOC_PIO2_7 = (0xD4 | 1),
151 IOCON_U0_RXD_LOC_PIO3_4 = (0xD4 | 3),
166 #define IOCON_FUNC0 0x0 167 #define IOCON_FUNC1 0x1 168 #define IOCON_FUNC2 0x2 169 #define IOCON_FUNC3 0x3 170 #define IOCON_FUNC4 0x4 171 #define IOCON_FUNC5 0x5 172 #define IOCON_FUNC6 0x6 173 #define IOCON_FUNC7 0x7 174 #define IOCON_MODE_INACT (0x0 << 3) 175 #define IOCON_MODE_PULLDOWN (0x1 << 3) 176 #define IOCON_MODE_PULLUP (0x2 << 3) 177 #define IOCON_MODE_REPEATER (0x3 << 3) 178 #define IOCON_HYS_EN (0x1 << 5) 179 #define IOCON_INV_EN (0x1 << 6) 180 #define IOCON_ADMODE_EN (0x0 << 7) 181 #define IOCON_DIGMODE_EN (0x1 << 7) 182 #define IOCON_SFI2C_EN (0x0 << 8) 183 #define IOCON_STDI2C_EN (0x1 << 8) 184 #define IOCON_FASTI2C_EN (0x2 << 8) 185 #define IOCON_FILT_DIS (0x1 << 8) 186 #define IOCON_OPENDRAIN_EN (0x1 << 10) 192 #define MD_PLN (0x0 << 3) 193 #define MD_PDN (0x1 << 3) 194 #define MD_PUP (0x2 << 3) 195 #define MD_BUK (0x3 << 3) 196 #define MD_HYS (0x1 << 5) 197 #define MD_INV (0x1 << 6) 198 #define MD_ADMODE (0x0 << 7) 199 #define MD_DIGMODE (0x1 << 7) 200 #define MD_DISFIL (0x0 << 8) 201 #define MD_ENFIL (0x1 << 8) 202 #define MD_SFI2C (0x0 << 8) 203 #define MD_STDI2C (0x1 << 8) 204 #define MD_FASTI2C (0x2 << 8) 205 #define MD_OPENDRAIN (0x1 << 10) 215 #if defined(CHIP_LPC11UXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11AXX) 275 pIOCON->
REG[sel >> 2] = sel & 0x03;
STATIC INLINE void Chip_IOCON_PinLocSel(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIN_LOC_T sel)
Select pin location.
CHIP_IOCON_PIO
IO Configuration Unit register block structure.
STATIC INLINE void Chip_IOCON_PinMuxSet(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIO_T pin, uint32_t modefunc)
Sets I/O Control pin mux.
CHIP_IOCON_PIN_LOC
LPC11XX Pin location select.
STATIC INLINE void Chip_IOCON_PinMux(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIO_T pin, uint16_t mode, uint8_t func)
I/O Control pin mux.
enum CHIP_IOCON_PIN_LOC CHIP_IOCON_PIN_LOC_T
LPC11XX Pin location select.
enum CHIP_IOCON_PIO CHIP_IOCON_PIO_T
IO Configuration Unit register block structure.