Public Attributes | List of all members
TcChannel Struct Reference

TcChannel hardware registers. More...

#include <tc.h>

Public Attributes

__I uint32_t Reserved1 [3]
 
__O uint32_t TC_CCR
 (TcChannel Offset: 0x0) Channel Control Register More...
 
__IO uint32_t TC_CMR
 (TcChannel Offset: 0x4) Channel Mode Register More...
 
__I uint32_t TC_CV
 (TcChannel Offset: 0x10) Counter Value More...
 
__IO uint32_t TC_EMR
 (TcChannel Offset: 0x30) Extended Mode Register More...
 
__O uint32_t TC_IDR
 (TcChannel Offset: 0x28) Interrupt Disable Register More...
 
__O uint32_t TC_IER
 (TcChannel Offset: 0x24) Interrupt Enable Register More...
 
__I uint32_t TC_IMR
 (TcChannel Offset: 0x2C) Interrupt Mask Register More...
 
__IO uint32_t TC_RA
 (TcChannel Offset: 0x14) Register A More...
 
__I uint32_t TC_RAB
 (TcChannel Offset: 0xC) Register AB More...
 
__IO uint32_t TC_RB
 (TcChannel Offset: 0x18) Register B More...
 
__IO uint32_t TC_RC
 (TcChannel Offset: 0x1C) Register C More...
 
__IO uint32_t TC_SMMR
 (TcChannel Offset: 0x8) Stepper Motor Mode Register More...
 
__I uint32_t TC_SR
 (TcChannel Offset: 0x20) Status Register More...
 

Detailed Description

TcChannel hardware registers.

Definition at line 46 of file utils/cmsis/same70/include/component/tc.h.

Member Data Documentation

◆ Reserved1

__I uint32_t TcChannel::Reserved1[3]

Definition at line 60 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_CCR

__O uint32_t TcChannel::TC_CCR

(TcChannel Offset: 0x0) Channel Control Register

Definition at line 47 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_CMR

__IO uint32_t TcChannel::TC_CMR

(TcChannel Offset: 0x4) Channel Mode Register

Definition at line 48 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_CV

__I uint32_t TcChannel::TC_CV

(TcChannel Offset: 0x10) Counter Value

Definition at line 51 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_EMR

__IO uint32_t TcChannel::TC_EMR

(TcChannel Offset: 0x30) Extended Mode Register

Definition at line 59 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_IDR

__O uint32_t TcChannel::TC_IDR

(TcChannel Offset: 0x28) Interrupt Disable Register

Definition at line 57 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_IER

__O uint32_t TcChannel::TC_IER

(TcChannel Offset: 0x24) Interrupt Enable Register

Definition at line 56 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_IMR

__I uint32_t TcChannel::TC_IMR

(TcChannel Offset: 0x2C) Interrupt Mask Register

Definition at line 58 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_RA

__IO uint32_t TcChannel::TC_RA

(TcChannel Offset: 0x14) Register A

Definition at line 52 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_RAB

__I uint32_t TcChannel::TC_RAB

(TcChannel Offset: 0xC) Register AB

Definition at line 50 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_RB

__IO uint32_t TcChannel::TC_RB

(TcChannel Offset: 0x18) Register B

Definition at line 53 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_RC

__IO uint32_t TcChannel::TC_RC

(TcChannel Offset: 0x1C) Register C

Definition at line 54 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_SMMR

__IO uint32_t TcChannel::TC_SMMR

(TcChannel Offset: 0x8) Stepper Motor Mode Register

Definition at line 49 of file utils/cmsis/same70/include/component/tc.h.

◆ TC_SR

__I uint32_t TcChannel::TC_SR

(TcChannel Offset: 0x20) Status Register

Definition at line 55 of file utils/cmsis/same70/include/component/tc.h.


The documentation for this struct was generated from the following file:


inertial_sense_ros
Author(s):
autogenerated on Sat Sep 19 2020 03:19:09