rtc.c
Go to the documentation of this file.
1 
33 /*
34  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
35  */
36 
37 #include "rtc.h"
38 
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 
59 /* RTC Write Protect Key "RTC" in ASCII */
60 #define RTC_WP_KEY (0x525443)
61 
62 /* The BCD code shift value */
63 #define BCD_SHIFT 4
64 
65 /* The BCD code mask value */
66 #define BCD_MASK 0xfu
67 
68 /* The BCD mul/div factor value */
69 #define BCD_FACTOR 10
70 
77 void rtc_set_hour_mode(Rtc *p_rtc, uint32_t ul_mode)
78 {
79  if (ul_mode) {
80  p_rtc->RTC_MR |= RTC_MR_HRMOD;
81  } else {
82  p_rtc->RTC_MR &= (~RTC_MR_HRMOD);
83  }
84 }
85 
93 uint32_t rtc_get_hour_mode(Rtc *p_rtc)
94 {
95  uint32_t ul_temp = p_rtc->RTC_MR;
96 
97  if (ul_temp & RTC_MR_HRMOD) {
98  return 1;
99  } else {
100  return 0;
101  }
102 }
103 
110 void rtc_enable_interrupt(Rtc *p_rtc, uint32_t ul_sources)
111 {
112  p_rtc->RTC_IER = ul_sources;
113 }
114 
121 void rtc_disable_interrupt(Rtc *p_rtc, uint32_t ul_sources)
122 {
123  p_rtc->RTC_IDR = ul_sources;
124 }
125 
133 uint32_t rtc_get_interrupt_mask(Rtc *p_rtc)
134 {
135  return p_rtc->RTC_IMR;
136 }
137 
146 void rtc_get_time(Rtc *p_rtc, uint32_t *pul_hour, uint32_t *pul_minute,
147  uint32_t *pul_second)
148 {
149  uint32_t ul_time;
150  uint32_t ul_temp;
151 
152  /* Get the current RTC time (multiple reads are necessary to insure a stable value). */
153  ul_time = p_rtc->RTC_TIMR;
154  while (ul_time != p_rtc->RTC_TIMR) {
155  ul_time = p_rtc->RTC_TIMR;
156  }
157 
158  /* Hour */
159  if (pul_hour) {
160  ul_temp = (ul_time & RTC_TIMR_HOUR_Msk) >> RTC_TIMR_HOUR_Pos;
161  *pul_hour = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
162 
163  if ((ul_time & RTC_TIMR_AMPM) == RTC_TIMR_AMPM) {
164  *pul_hour += 12;
165  }
166  }
167 
168  /* Minute */
169  if (pul_minute) {
170  ul_temp = (ul_time & RTC_TIMR_MIN_Msk) >> RTC_TIMR_MIN_Pos;
171  *pul_minute = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
172  }
173 
174  /* Second */
175  if (pul_second) {
176  ul_temp = (ul_time & RTC_TIMR_SEC_Msk) >> RTC_TIMR_SEC_Pos;
177  *pul_second = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
178  }
179 }
180 
191 uint32_t rtc_set_time(Rtc *p_rtc, uint32_t ul_hour, uint32_t ul_minute,
192  uint32_t ul_second)
193 {
194  uint32_t ul_time = 0;
195 
196  /* If 12-hour mode, set AMPM bit */
197  if ((p_rtc->RTC_MR & RTC_MR_HRMOD) == RTC_MR_HRMOD) {
198  if (ul_hour > 12) {
199  ul_hour -= 12;
200  ul_time |= RTC_TIMR_AMPM;
201  }
202  }
203 
204  /* Hour */
205  ul_time |= ((ul_hour / BCD_FACTOR) << (RTC_TIMR_HOUR_Pos + BCD_SHIFT)) |
206  ((ul_hour % BCD_FACTOR) << RTC_TIMR_HOUR_Pos);
207 
208  /* Minute */
209  ul_time |= ((ul_minute / BCD_FACTOR) << (RTC_TIMR_MIN_Pos + BCD_SHIFT)) |
210  ((ul_minute % BCD_FACTOR) << RTC_TIMR_MIN_Pos);
211 
212  /* Second */
213  ul_time |= ((ul_second / BCD_FACTOR) << (RTC_TIMR_SEC_Pos + BCD_SHIFT)) |
214  ((ul_second % BCD_FACTOR) << RTC_TIMR_SEC_Pos);
215 
216  //Clear RTC_SR.SEC so we can tell when the second periodic event happens
217  p_rtc->RTC_SCCR = RTC_SCCR_SECCLR;
218 
219  //At this point we should not be in update mode (counting stopped)
220  if((p_rtc->RTC_CR & (RTC_CR_UPDTIM | RTC_CR_UPDCAL)) != 0)
221  p_rtc->RTC_CR &= ~(RTC_CR_UPDTIM | RTC_CR_UPDCAL); //If we are, clear it so it will start counting so the following will always succeed
222 
223  /* Update time register. Check the spec for the flow. */
224  while ((p_rtc->RTC_SR & RTC_SR_SEC) != RTC_SR_SEC);
225  p_rtc->RTC_CR |= RTC_CR_UPDTIM;
226  while ((p_rtc->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD);
227  p_rtc->RTC_SCCR = RTC_SCCR_ACKCLR;
228  p_rtc->RTC_TIMR = ul_time;
229  p_rtc->RTC_CR &= (~RTC_CR_UPDTIM);
230 
231  return (p_rtc->RTC_VER & RTC_VER_NVTIM);
232 }
233 
247 uint32_t rtc_set_time_alarm(Rtc *p_rtc,
248  uint32_t ul_hour_flag, uint32_t ul_hour,
249  uint32_t ul_minute_flag, uint32_t ul_minute,
250  uint32_t ul_second_flag, uint32_t ul_second)
251 {
252  uint32_t ul_alarm = 0;
253 
254  /* Hour alarm setting */
255  if (ul_hour_flag) {
256  /* If 12-hour mode, set AMPM bit */
257  if ((p_rtc->RTC_MR & RTC_MR_HRMOD) == RTC_MR_HRMOD) {
258  if (ul_hour > 12) {
259  ul_hour -= 12;
260  ul_alarm |= RTC_TIMR_AMPM;
261  }
262  }
263 
264  ul_alarm |= ((ul_hour / BCD_FACTOR) << (RTC_TIMR_HOUR_Pos + BCD_SHIFT)) |
265  ((ul_hour % BCD_FACTOR) << RTC_TIMR_HOUR_Pos);
266  }
267 
268  /* Minute alarm setting */
269  if (ul_minute_flag) {
270  ul_alarm |= ((ul_minute / BCD_FACTOR) << (RTC_TIMR_MIN_Pos + BCD_SHIFT)) |
271  ((ul_minute % BCD_FACTOR) << RTC_TIMR_MIN_Pos);
272  }
273 
274  /* Second alarm setting */
275  if (ul_second_flag) {
276  ul_alarm |= ((ul_second / BCD_FACTOR) << (RTC_TIMR_SEC_Pos + BCD_SHIFT)) |
277  ((ul_second % BCD_FACTOR) << RTC_TIMR_SEC_Pos);
278  }
279 
281  p_rtc->RTC_TIMALR = ul_alarm;
283 
284  return (p_rtc->RTC_VER & RTC_VER_NVTIMALR);
285 }
286 
296 void rtc_get_date(Rtc *p_rtc, uint32_t *pul_year, uint32_t *pul_month,
297  uint32_t *pul_day, uint32_t *pul_week)
298 {
299  uint32_t ul_date;
300  uint32_t ul_cent;
301  uint32_t ul_temp;
302 
303  /* Get the current date (multiple reads are necessary to insure a stable value). */
304  ul_date = p_rtc->RTC_CALR;
305  while (ul_date != p_rtc->RTC_CALR) {
306  ul_date = p_rtc->RTC_CALR;
307  }
308 
309  /* Retrieve year */
310  if (pul_year) {
311  ul_temp = (ul_date & RTC_CALR_CENT_Msk) >> RTC_CALR_CENT_Pos;
312  ul_cent = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
313  ul_temp = (ul_date & RTC_CALR_YEAR_Msk) >> RTC_CALR_YEAR_Pos;
314  *pul_year = (ul_cent * BCD_FACTOR * BCD_FACTOR) +
315  (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
316  }
317 
318  /* Retrieve month */
319  if (pul_month) {
320  ul_temp = (ul_date & RTC_CALR_MONTH_Msk) >> RTC_CALR_MONTH_Pos;
321  *pul_month = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
322  }
323 
324  /* Retrieve day */
325  if (pul_day) {
326  ul_temp = (ul_date & RTC_CALR_DATE_Msk) >> RTC_CALR_DATE_Pos;
327  *pul_day = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
328  }
329 
330  /* Retrieve week */
331  if (pul_week) {
332  *pul_week = ((ul_date & RTC_CALR_DAY_Msk) >> RTC_CALR_DAY_Pos);
333  }
334 }
335 
347 uint32_t rtc_set_date(Rtc *p_rtc, uint32_t ul_year, uint32_t ul_month,
348  uint32_t ul_day, uint32_t ul_week)
349 {
350  uint32_t ul_date = 0;
351 
352  /* Cent */
353  ul_date |= ((ul_year / BCD_FACTOR / BCD_FACTOR / BCD_FACTOR) <<
355  ((ul_year / BCD_FACTOR / BCD_FACTOR) % BCD_FACTOR) << RTC_CALR_CENT_Pos);
356 
357  /* Year */
358  ul_date |= (((ul_year / BCD_FACTOR) % BCD_FACTOR) <<
360  ((ul_year % BCD_FACTOR) << RTC_CALR_YEAR_Pos);
361 
362  /* Month */
363  ul_date |= ((ul_month / BCD_FACTOR) << (RTC_CALR_MONTH_Pos + BCD_SHIFT)) |
364  ((ul_month % BCD_FACTOR) << RTC_CALR_MONTH_Pos);
365 
366  /* Week */
367  ul_date |= (ul_week << RTC_CALR_DAY_Pos);
368 
369  /* Day */
370  ul_date |= ((ul_day / BCD_FACTOR) << (RTC_CALR_DATE_Pos + BCD_SHIFT)) |
371  ((ul_day % BCD_FACTOR) << RTC_CALR_DATE_Pos);
372 
373  //Clear RTC_SR.SEC so we can tell when the second periodic event happens
374  p_rtc->RTC_SCCR = RTC_SCCR_SECCLR;
375 
376  //At this point we should not be in update mode (counting stopped)
377  if((p_rtc->RTC_CR & (RTC_CR_UPDTIM | RTC_CR_UPDCAL)) != 0)
378  p_rtc->RTC_CR &= ~(RTC_CR_UPDTIM | RTC_CR_UPDCAL); //If we are, clear it so it will start counting so the following will always succeed
379 
380  /* Update calendar register. Check the spec for the flow. */
381  while ((p_rtc->RTC_SR & RTC_SR_SEC) != RTC_SR_SEC);
382  p_rtc->RTC_CR |= RTC_CR_UPDCAL;
383  while ((p_rtc->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD);
384  p_rtc->RTC_SCCR = RTC_SCCR_ACKCLR;
385  p_rtc->RTC_CALR = ul_date;
386  p_rtc->RTC_CR &= (~RTC_CR_UPDCAL);
387 
388  return (p_rtc->RTC_VER & RTC_VER_NVCAL);
389 }
390 
402 uint32_t rtc_set_date_alarm(Rtc *p_rtc,
403  uint32_t ul_month_flag, uint32_t ul_month,
404  uint32_t ul_day_flag, uint32_t ul_day)
405 {
406  uint32_t ul_alarm = 0;
407 
408  /* Month alarm setting */
409  if (ul_month_flag) {
410  ul_alarm |= ((ul_month / BCD_FACTOR) << (RTC_CALR_MONTH_Pos + BCD_SHIFT)) |
411  ((ul_month % BCD_FACTOR) << RTC_CALR_MONTH_Pos);
412  }
413 
414  /* Day alarm setting */
415  if (ul_day_flag) {
416  ul_alarm |= ((ul_day / BCD_FACTOR) << (RTC_CALR_DATE_Pos + BCD_SHIFT)) |
417  ((ul_day % BCD_FACTOR) << RTC_CALR_DATE_Pos);
418  }
419 
420  /* Set alarm */
422  p_rtc->RTC_CALALR = ul_alarm;
424 
425  return (p_rtc->RTC_VER & RTC_VER_NVCALALR);
426 }
427 
434 {
435  p_rtc->RTC_TIMALR = 0;
436 }
437 
444 {
445  /* Need a valid value without enabling */
446  p_rtc->RTC_CALALR = RTC_CALALR_MONTH(0x01) | RTC_CALALR_DATE(0x01);
447 }
448 
456 uint32_t rtc_get_status(Rtc *p_rtc)
457 {
458  return (p_rtc->RTC_SR);
459 }
460 
467 void rtc_clear_status(Rtc *p_rtc, uint32_t ul_clear)
468 {
469  p_rtc->RTC_SCCR = ul_clear;
470 }
471 
479 uint32_t rtc_get_valid_entry(Rtc *p_rtc)
480 {
481  return (p_rtc->RTC_VER);
482 }
483 
490 void rtc_set_time_event(Rtc *p_rtc, uint32_t ul_selection)
491 {
492  p_rtc->RTC_CR &= ~RTC_CR_TIMEVSEL_Msk;
493  p_rtc->RTC_CR |= (ul_selection << RTC_CR_TIMEVSEL_Pos) & RTC_CR_TIMEVSEL_Msk;
494 }
495 
502 void rtc_set_calendar_event(Rtc *p_rtc, uint32_t ul_selection)
503 {
504  p_rtc->RTC_CR &= ~RTC_CR_CALEVSEL_Msk;
505  p_rtc->RTC_CR |= (ul_selection << RTC_CR_CALEVSEL_Pos) & RTC_CR_CALEVSEL_Msk;
506 }
507 
508 #if ((SAM3S8) || (SAM3SD8) || (SAM4S) || (SAM4N) || (SAM4C) || (SAMG) || (SAM4CP) || (SAM4CM) || defined(__DOXYGEN__))
509 
517 void rtc_set_calendar_mode(Rtc *p_rtc, uint32_t ul_mode)
518 {
519  if (ul_mode) {
520  p_rtc->RTC_MR |= RTC_MR_PERSIAN;
521  } else {
522  p_rtc->RTC_MR &= (~RTC_MR_PERSIAN);
523  }
524 }
525 
535 uint32_t rtc_get_calendar_mode(Rtc *p_rtc)
536 {
537  uint32_t ul_temp = p_rtc->RTC_MR;
538 
539  if (ul_temp & RTC_MR_PERSIAN) {
540  return 1;
541  } else {
542  return 0;
543  }
544 }
545 
556 void rtc_set_calibration(Rtc *p_rtc, uint32_t ul_direction_ppm,
557  uint32_t ul_correction, uint32_t ul_range_ppm)
558 {
559  uint32_t ul_temp;
560 
561  ul_temp = p_rtc->RTC_MR;
562 
563  if (ul_direction_ppm) {
564  ul_temp |= RTC_MR_NEGPPM;
565  } else {
566  ul_temp &= (~RTC_MR_NEGPPM);
567  }
568 
569  ul_temp &= (~RTC_MR_CORRECTION_Msk);
570  ul_temp |= RTC_MR_CORRECTION(ul_correction);
571 
572  if (ul_range_ppm) {
573  ul_temp |= RTC_MR_HIGHPPM;
574  } else {
575  ul_temp &= (~RTC_MR_HIGHPPM);
576  }
577 
578  p_rtc->RTC_MR = ul_temp;
579 }
580 #endif
581 
582 #if ((SAM3S8) || (SAM3SD8) || (SAM4S) || (SAM4C) || (SAMG) || (SAM4CP) || (SAM4CM) || SAMV71 || SAMV70 || SAME70 || SAMS70 || defined(__DOXYGEN__))
583 
592 void rtc_set_waveform(Rtc *p_rtc, uint32_t ul_channel, uint32_t ul_value)
593 {
594  if (ul_channel == 0) {
595  switch (ul_value) {
596  case 0:
597  p_rtc->RTC_MR &= ~RTC_MR_OUT0_Msk;
598  p_rtc->RTC_MR |= RTC_MR_OUT0_NO_WAVE;
599  break;
600 
601  case 1:
602  p_rtc->RTC_MR &= ~RTC_MR_OUT0_Msk;
603  p_rtc->RTC_MR |= RTC_MR_OUT0_FREQ1HZ;
604  break;
605 
606  case 2:
607  p_rtc->RTC_MR &= ~RTC_MR_OUT0_Msk;
608  p_rtc->RTC_MR |= RTC_MR_OUT0_FREQ32HZ;
609  break;
610 
611  case 3:
612  p_rtc->RTC_MR &= ~RTC_MR_OUT0_Msk;
613  p_rtc->RTC_MR |= RTC_MR_OUT0_FREQ64HZ;
614  break;
615 
616  case 4:
617  p_rtc->RTC_MR &= ~RTC_MR_OUT0_Msk;
618  p_rtc->RTC_MR |= RTC_MR_OUT0_FREQ512HZ;
619  break;
620 
621 #if (!SAMG)
622  case 5:
623  p_rtc->RTC_MR &= ~RTC_MR_OUT0_Msk;
625  break;
626 #endif
627 
628  case 6:
629  p_rtc->RTC_MR &= ~RTC_MR_OUT0_Msk;
630  p_rtc->RTC_MR |= RTC_MR_OUT0_ALARM_FLAG;
631  break;
632 
633 #if (!SAMG)
634  case 7:
635  p_rtc->RTC_MR &= ~RTC_MR_OUT0_Msk;
636  p_rtc->RTC_MR |= RTC_MR_OUT0_PROG_PULSE;
637  break;
638 #endif
639 
640  default:
641  break;
642  }
643  } else {
644  #if (!SAM4C && !SAM4CP && !SAM4CM)
645  switch (ul_value) {
646  case 0:
647  p_rtc->RTC_MR &= ~RTC_MR_OUT1_Msk;
648  p_rtc->RTC_MR |= RTC_MR_OUT1_NO_WAVE;
649  break;
650 
651  case 1:
652  p_rtc->RTC_MR &= ~RTC_MR_OUT1_Msk;
653  p_rtc->RTC_MR |= RTC_MR_OUT1_FREQ1HZ;
654  break;
655 
656  case 2:
657  p_rtc->RTC_MR &= ~RTC_MR_OUT1_Msk;
658  p_rtc->RTC_MR |= RTC_MR_OUT1_FREQ32HZ;
659  break;
660 
661  case 3:
662  p_rtc->RTC_MR &= ~RTC_MR_OUT1_Msk;
663  p_rtc->RTC_MR |= RTC_MR_OUT1_FREQ64HZ;
664  break;
665 
666  case 4:
667  p_rtc->RTC_MR &= ~RTC_MR_OUT1_Msk;
668  p_rtc->RTC_MR |= RTC_MR_OUT1_FREQ512HZ;
669  break;
670 
671 #if (!SAMG)
672  case 5:
673  p_rtc->RTC_MR &= ~RTC_MR_OUT1_Msk;
675  break;
676 #endif
677 
678  case 6:
679  p_rtc->RTC_MR &= ~RTC_MR_OUT1_Msk;
680  p_rtc->RTC_MR |= RTC_MR_OUT1_ALARM_FLAG;
681  break;
682 
683 #if (!SAMG)
684  case 7:
685  p_rtc->RTC_MR &= ~RTC_MR_OUT1_Msk;
686  p_rtc->RTC_MR |= RTC_MR_OUT1_PROG_PULSE;
687  break;
688 #endif
689 
690  default:
691  break;
692  }
693  #endif
694  }
695 }
696 
697 #if ((SAM3S8) || (SAM3SD8) || (SAM4S) || (SAM4C) || SAMV71 || SAMV70 || SAME70 || SAMS70 || defined(__DOXYGEN__))
698 
707 void rtc_set_pulse_parameter(Rtc *p_rtc, uint32_t ul_time_high,
708  uint32_t ul_period)
709 {
710  uint32_t ul_temp;
711 
712  ul_temp = p_rtc->RTC_MR;
713 
714  ul_temp |= (RTC_MR_THIGH_Msk & ((ul_time_high) << RTC_MR_THIGH_Pos));
715  ul_temp |= (RTC_MR_TPERIOD_Msk & ((ul_period) << RTC_MR_TPERIOD_Pos));
716 
717  p_rtc->RTC_MR = ul_temp;
718 }
719 #endif
720 #endif
721 
722 
723 #if ((SAM3N) || (SAM3U) || (SAM3XA) || defined(__DOXYGEN__))
724 
732 void rtc_set_writeprotect(Rtc *p_rtc, uint32_t ul_enable)
733 {
734  if (ul_enable) {
736  } else {
738  }
739 }
740 #endif /* ((SAM3N) || (SAM3U) || (SAM3XA)) */
741 
742 #if SAM4C || SAM4CP || SAM4CM || defined(__DOXYGEN__)
743 
757 void rtc_get_tamper_time(Rtc *p_rtc, uint32_t *pul_hour, uint32_t *pul_minute,
758  uint32_t *pul_second, uint8_t reg_num)
759 {
760  uint32_t ul_time;
761  uint32_t ul_temp;
762 
763  /* Get the current RTC time (multiple reads are to insure a stable value). */
764  ul_time = p_rtc->RTC_TS[reg_num].RTC_TSTR;
765  while (ul_time != p_rtc->RTC_TS[reg_num].RTC_TSTR) {
766  ul_time = p_rtc->RTC_TS[reg_num].RTC_TSTR;
767  }
768 
769  /* Hour */
770  if (pul_hour) {
771  ul_temp = (ul_time & RTC_TSTR_HOUR_Msk) >> RTC_TSTR_HOUR_Pos;
772  *pul_hour = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
773 
774  if ((ul_time & RTC_TSTR_AMPM) == RTC_TSTR_AMPM) {
775  *pul_hour += 12;
776  }
777  }
778 
779  /* Minute */
780  if (pul_minute) {
781  ul_temp = (ul_time & RTC_TSTR_MIN_Msk) >> RTC_TSTR_MIN_Pos;
782  *pul_minute = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
783  }
784 
785  /* Second */
786  if (pul_second) {
787  ul_temp = (ul_time & RTC_TSTR_SEC_Msk) >> RTC_TSTR_SEC_Pos;
788  *pul_second = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
789  }
790 }
791 
807 void rtc_get_tamper_date(Rtc *p_rtc, uint32_t *pul_year, uint32_t *pul_month,
808  uint32_t *pul_day, uint32_t *pul_week, uint8_t reg_num)
809 {
810  uint32_t ul_date;
811  uint32_t ul_cent;
812  uint32_t ul_temp;
813 
814  /* Get the current date (multiple reads are to insure a stable value). */
815  ul_date = p_rtc->RTC_TS[reg_num].RTC_TSDR;
816  while (ul_date != p_rtc->RTC_TS[reg_num].RTC_TSDR) {
817  ul_date = p_rtc->RTC_TS[reg_num].RTC_TSDR;
818  }
819 
820  /* Retrieve year */
821  if (pul_year) {
822  ul_temp = (ul_date & RTC_TSDR_CENT_Msk) >> RTC_TSDR_CENT_Pos;
823  ul_cent = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
824  ul_temp = (ul_date & RTC_TSDR_YEAR_Msk) >> RTC_TSDR_YEAR_Pos;
825  *pul_year = (ul_cent * BCD_FACTOR * BCD_FACTOR) +
826  (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
827  }
828 
829  /* Retrieve month */
830  if (pul_month) {
831  ul_temp = (ul_date & RTC_TSDR_MONTH_Msk) >> RTC_TSDR_MONTH_Pos;
832  *pul_month = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
833  }
834 
835  /* Retrieve day */
836  if (pul_day) {
837  ul_temp = (ul_date & RTC_TSDR_DATE_Msk) >> RTC_TSDR_DATE_Pos;
838  *pul_day = (ul_temp >> BCD_SHIFT) * BCD_FACTOR + (ul_temp & BCD_MASK);
839  }
840 
841  /* Retrieve week */
842  if (pul_week) {
843  *pul_week = ((ul_date & RTC_TSDR_DAY_Msk) >> RTC_TSDR_DAY_Pos);
844  }
845 }
846 
857 uint32_t rtc_get_tamper_source(Rtc *p_rtc, uint8_t reg_num)
858 {
859  return (p_rtc->RTC_TS[reg_num].RTC_TSSR & RTC_TSSR_TSRC_Msk) >>
860  RTC_TSSR_TSRC_Pos;
861 }
862 
875 uint32_t rtc_get_tamper_event_counter(Rtc *p_rtc)
876 {
877  return (p_rtc->RTC_TS[0].RTC_TSTR & RTC_TSTR_TEVCNT_Msk) >>
878  RTC_TSTR_TEVCNT_Pos;
879 }
880 
896 bool rtc_is_tamper_occur_in_backup_mode(Rtc *p_rtc, uint8_t reg_num)
897 {
898  if(p_rtc->RTC_TS[reg_num].RTC_TSTR & RTC_TSTR_BACKUP) {
899  return true;
900  } else {
901  return false;
902  }
903 }
904 #endif
905 
906 #if (SAMG55) || defined(__DOXYGEN__)
907 
916 uint32_t rtc_get_milliseconds(Rtc *p_rtc)
917 {
918  return (p_rtc->RTC_MSR) & RTC_MSR_MS_Msk;
919 }
920 #endif
921 
922 
924 
926 
927 #ifdef __cplusplus
928 }
929 #endif
930 
931 
uint32_t rtc_set_time(Rtc *p_rtc, uint32_t ul_hour, uint32_t ul_minute, uint32_t ul_second)
Set the RTC time value.
Definition: rtc.c:191
#define RTC_TIMR_MIN_Msk
(RTC_TIMR) Current Minute
#define RTC_MR_HRMOD
(RTC_MR) 12-/24-hour Mode
#define RTC_MR_OUT0_FREQ64HZ
(RTC_MR) 64 Hz square wave
__O uint32_t RTC_IDR
(Rtc Offset: 0x24) Interrupt Disable Register
#define RTC_TIMALR_HOUREN
(RTC_TIMALR) Hour Alarm Enable
#define RTC_MR_OUT1_NO_WAVE
(RTC_MR) No waveform, stuck at &#39;0&#39;
#define RTC_CALR_CENT_Msk
(RTC_CALR) Current Century
#define BCD_FACTOR
Definition: rtc.c:69
#define RTC_MR_OUT1_FREQ512HZ
(RTC_MR) 512 Hz square wave
__IO uint32_t RTC_CALALR
(Rtc Offset: 0x14) Calendar Alarm Register
#define RTC_VER_NVCALALR
(RTC_VER) Non-valid Calendar Alarm
#define RTC_MR_OUT0_NO_WAVE
(RTC_MR) No waveform, stuck at &#39;0&#39;
void rtc_enable_interrupt(Rtc *p_rtc, uint32_t ul_sources)
Enable RTC interrupts.
Definition: rtc.c:110
uint32_t rtc_get_hour_mode(Rtc *p_rtc)
Get the RTC hour mode.
Definition: rtc.c:93
#define RTC_CR_TIMEVSEL_Msk
(RTC_CR) Time Event Selection
__I uint32_t RTC_VER
(Rtc Offset: 0x2C) Valid Entry Register
void rtc_get_time(Rtc *p_rtc, uint32_t *pul_hour, uint32_t *pul_minute, uint32_t *pul_second)
Get the RTC time value.
Definition: rtc.c:146
#define RTC_CR_UPDCAL
(RTC_CR) Update Request Calendar Register
#define RTC_MR_OUT0_PROG_PULSE
(RTC_MR) Duty cycle programmable pulse
#define RTC_CALALR_MONTH(value)
uint32_t rtc_get_status(Rtc *p_rtc)
Get the RTC status.
Definition: rtc.c:456
#define RTC_CALALR_DATEEN
(RTC_CALALR) Date Alarm Enable
#define RTC_TIMALR_MINEN
(RTC_TIMALR) Minute Alarm Enable
__IO uint32_t RTC_CR
(Rtc Offset: 0x00) Control Register
#define RTC_TIMR_AMPM
(RTC_TIMR) Ante Meridiem Post Meridiem Indicator
#define BCD_SHIFT
Definition: rtc.c:63
void rtc_clear_time_alarm(Rtc *p_rtc)
Clear the RTC time alarm setting.
Definition: rtc.c:433
#define RTC_CALR_YEAR_Msk
(RTC_CALR) Current Year
#define RTC_CALR_DATE_Msk
(RTC_CALR) Current Day in Current Month
#define RTC_MR_OUT1_FREQ32HZ
(RTC_MR) 32 Hz square wave
#define RTC_MR_HIGHPPM
(RTC_MR) HIGH PPM Correction
__IO uint32_t RTC_WPMR
(Rtc Offset: 0xE4) Write Protection Mode Register
void rtc_clear_date_alarm(Rtc *p_rtc)
Clear the RTC date alarm setting.
Definition: rtc.c:443
void rtc_set_calendar_event(Rtc *p_rtc, uint32_t ul_selection)
Set the RTC calendar event selection.
Definition: rtc.c:502
uint32_t rtc_set_time_alarm(Rtc *p_rtc, uint32_t ul_hour_flag, uint32_t ul_hour, uint32_t ul_minute_flag, uint32_t ul_minute, uint32_t ul_second_flag, uint32_t ul_second)
Set the RTC alarm time value.
Definition: rtc.c:247
#define RTC_MR_THIGH_Msk
(RTC_MR) High Duration of the Output Pulse
#define RTC_MR_OUT1_ALARM_TOGGLE
(RTC_MR) Output toggles when alarm flag rises
__IO uint32_t RTC_CALR
(Rtc Offset: 0x0C) Calendar Register
#define RTC_MR_TPERIOD_Msk
(RTC_MR) Period of the Output Pulse
#define RTC_CALALR_DATE(value)
#define RTC_VER_NVTIM
(RTC_VER) Non-valid Time
__O uint32_t RTC_IER
(Rtc Offset: 0x20) Interrupt Enable Register
#define RTC_CALR_DAY_Msk
(RTC_CALR) Current Day in Current Week
#define RTC_MR_OUT0_FREQ1HZ
(RTC_MR) 1 Hz square wave
__I uint32_t RTC_SR
(Rtc Offset: 0x18) Status Register
#define RTC_MR_OUT1_Msk
(RTC_MR) RTCOUT1 Output Source Selection
#define RTC_CR_CALEVSEL_Msk
(RTC_CR) Calendar Event Selection
#define RTC_CALR_MONTH_Msk
(RTC_CALR) Current Month
#define RTC_MR_OUT0_FREQ32HZ
(RTC_MR) 32 Hz square wave
#define RTC_TIMR_SEC_Msk
(RTC_TIMR) Current Second
__IO uint32_t RTC_TIMR
(Rtc Offset: 0x08) Time Register
#define RTC_WPMR_WPEN
(RTC_WPMR) Write Protection Enable
uint32_t rtc_set_date(Rtc *p_rtc, uint32_t ul_year, uint32_t ul_month, uint32_t ul_day, uint32_t ul_week)
Set the RTC date.
Definition: rtc.c:347
uint32_t rtc_set_date_alarm(Rtc *p_rtc, uint32_t ul_month_flag, uint32_t ul_month, uint32_t ul_day_flag, uint32_t ul_day)
Set the RTC alarm date value.
Definition: rtc.c:402
__IO uint32_t RTC_MR
(Rtc Offset: 0x04) Mode Register
#define RTC_MR_OUT0_FREQ512HZ
(RTC_MR) 512 Hz square wave
#define RTC_CR_UPDTIM
(RTC_CR) Update Request Time Register
#define RTC_TIMALR_SECEN
(RTC_TIMALR) Second Alarm Enable
#define RTC_MR_OUT1_PROG_PULSE
(RTC_MR) Duty cycle programmable pulse
#define RTC_WPMR_WPKEY(value)
#define RTC_MR_OUT1_ALARM_FLAG
(RTC_MR) Output is a copy of the alarm flag
#define RTC_SR_ACKUPD
(RTC_SR) Acknowledge for Update
#define RTC_MR_OUT0_ALARM_FLAG
(RTC_MR) Output is a copy of the alarm flag
void rtc_set_time_event(Rtc *p_rtc, uint32_t ul_selection)
Set the RTC time event selection.
Definition: rtc.c:490
#define BCD_MASK
Definition: rtc.c:66
#define RTC_VER_NVTIMALR
(RTC_VER) Non-valid Time Alarm
void rtc_disable_interrupt(Rtc *p_rtc, uint32_t ul_sources)
Disable RTC interrupts.
Definition: rtc.c:121
__IO uint32_t RTC_TIMALR
(Rtc Offset: 0x10) Time Alarm Register
__O uint32_t RTC_SCCR
(Rtc Offset: 0x1C) Status Clear Command Register
#define RTC_SCCR_SECCLR
(RTC_SCCR) Second Clear
void rtc_get_date(Rtc *p_rtc, uint32_t *pul_year, uint32_t *pul_month, uint32_t *pul_day, uint32_t *pul_week)
Get the RTC date value.
Definition: rtc.c:296
#define RTC_MR_OUT0_Msk
(RTC_MR) RTCOUT0 OutputSource Selection
#define RTC_MR_PERSIAN
(RTC_MR) PERSIAN Calendar
#define RTC_SCCR_ACKCLR
(RTC_SCCR) Acknowledge Clear
void rtc_set_hour_mode(Rtc *p_rtc, uint32_t ul_mode)
Set the RTC hour mode.
Definition: rtc.c:77
Real-Time Clock (RTC) driver for SAM.
#define RTC_CALALR_MTHEN
(RTC_CALALR) Month Alarm Enable
#define RTC_SR_SEC
(RTC_SR) Second Event
#define RTC_MR_OUT0_ALARM_TOGGLE
(RTC_MR) Output toggles when alarm flag rises
#define RTC_MR_CORRECTION(value)
#define RTC_TIMR_HOUR_Msk
(RTC_TIMR) Current Hour
uint32_t rtc_get_interrupt_mask(Rtc *p_rtc)
Read RTC interrupt mask.
Definition: rtc.c:133
#define RTC_WP_KEY
Definition: rtc.c:60
uint32_t rtc_get_valid_entry(Rtc *p_rtc)
Get the RTC valid entry.
Definition: rtc.c:479
#define RTC_MR_CORRECTION_Msk
(RTC_MR) Slow Clock Correction
void rtc_clear_status(Rtc *p_rtc, uint32_t ul_clear)
Set the RTC SCCR to clear status bits.
Definition: rtc.c:467
#define RTC_MR_OUT1_FREQ1HZ
(RTC_MR) 1 Hz square wave
#define RTC_MR_NEGPPM
(RTC_MR) NEGative PPM Correction
#define RTC_VER_NVCAL
(RTC_VER) Non-valid Calendar
__I uint32_t RTC_IMR
(Rtc Offset: 0x28) Interrupt Mask Register
Rtc hardware registers.
#define RTC_MR_OUT1_FREQ64HZ
(RTC_MR) 64 Hz square wave


inertial_sense_ros
Author(s):
autogenerated on Sat Sep 19 2020 03:19:04