Macros
instance/sdramc.h File Reference
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Macros

#define REG_SDRAMC_CFR1   (*(__IO uint32_t*)0x40084028U)
 (SDRAMC) SDRAMC Configuration Register 1 More...
 
#define REG_SDRAMC_CR   (*(__IO uint32_t*)0x40084008U)
 (SDRAMC) SDRAMC Configuration Register More...
 
#define REG_SDRAMC_IDR   (*(__O uint32_t*)0x40084018U)
 (SDRAMC) SDRAMC Interrupt Disable Register More...
 
#define REG_SDRAMC_IER   (*(__O uint32_t*)0x40084014U)
 (SDRAMC) SDRAMC Interrupt Enable Register More...
 
#define REG_SDRAMC_IMR   (*(__I uint32_t*)0x4008401CU)
 (SDRAMC) SDRAMC Interrupt Mask Register More...
 
#define REG_SDRAMC_ISR   (*(__I uint32_t*)0x40084020U)
 (SDRAMC) SDRAMC Interrupt Status Register More...
 
#define REG_SDRAMC_LPR   (*(__IO uint32_t*)0x40084010U)
 (SDRAMC) SDRAMC Low Power Register More...
 
#define REG_SDRAMC_MDR   (*(__IO uint32_t*)0x40084024U)
 (SDRAMC) SDRAMC Memory Device Register More...
 
#define REG_SDRAMC_MR   (*(__IO uint32_t*)0x40084000U)
 (SDRAMC) SDRAMC Mode Register More...
 
#define REG_SDRAMC_OCMS   (*(__IO uint32_t*)0x4008402CU)
 (SDRAMC) SDRAMC OCMS Register More...
 
#define REG_SDRAMC_OCMS_KEY1   (*(__O uint32_t*)0x40084030U)
 (SDRAMC) SDRAMC OCMS KEY1 Register More...
 
#define REG_SDRAMC_OCMS_KEY2   (*(__O uint32_t*)0x40084034U)
 (SDRAMC) SDRAMC OCMS KEY2 Register More...
 
#define REG_SDRAMC_TR   (*(__IO uint32_t*)0x40084004U)
 (SDRAMC) SDRAMC Refresh Timer Register More...
 
#define REG_SDRAMC_VERSION   (*(__I uint32_t*)0x400840FCU)
 (SDRAMC) SDRAMC Version Register More...
 

Detailed Description

Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.

Definition in file instance/sdramc.h.

Macro Definition Documentation

◆ REG_SDRAMC_CFR1

#define REG_SDRAMC_CFR1   (*(__IO uint32_t*)0x40084028U)

(SDRAMC) SDRAMC Configuration Register 1

Definition at line 64 of file instance/sdramc.h.

◆ REG_SDRAMC_CR

#define REG_SDRAMC_CR   (*(__IO uint32_t*)0x40084008U)

(SDRAMC) SDRAMC Configuration Register

Definition at line 57 of file instance/sdramc.h.

◆ REG_SDRAMC_IDR

#define REG_SDRAMC_IDR   (*(__O uint32_t*)0x40084018U)

(SDRAMC) SDRAMC Interrupt Disable Register

Definition at line 60 of file instance/sdramc.h.

◆ REG_SDRAMC_IER

#define REG_SDRAMC_IER   (*(__O uint32_t*)0x40084014U)

(SDRAMC) SDRAMC Interrupt Enable Register

Definition at line 59 of file instance/sdramc.h.

◆ REG_SDRAMC_IMR

#define REG_SDRAMC_IMR   (*(__I uint32_t*)0x4008401CU)

(SDRAMC) SDRAMC Interrupt Mask Register

Definition at line 61 of file instance/sdramc.h.

◆ REG_SDRAMC_ISR

#define REG_SDRAMC_ISR   (*(__I uint32_t*)0x40084020U)

(SDRAMC) SDRAMC Interrupt Status Register

Definition at line 62 of file instance/sdramc.h.

◆ REG_SDRAMC_LPR

#define REG_SDRAMC_LPR   (*(__IO uint32_t*)0x40084010U)

(SDRAMC) SDRAMC Low Power Register

Definition at line 58 of file instance/sdramc.h.

◆ REG_SDRAMC_MDR

#define REG_SDRAMC_MDR   (*(__IO uint32_t*)0x40084024U)

(SDRAMC) SDRAMC Memory Device Register

Definition at line 63 of file instance/sdramc.h.

◆ REG_SDRAMC_MR

#define REG_SDRAMC_MR   (*(__IO uint32_t*)0x40084000U)

(SDRAMC) SDRAMC Mode Register

Definition at line 55 of file instance/sdramc.h.

◆ REG_SDRAMC_OCMS

#define REG_SDRAMC_OCMS   (*(__IO uint32_t*)0x4008402CU)

(SDRAMC) SDRAMC OCMS Register

Definition at line 65 of file instance/sdramc.h.

◆ REG_SDRAMC_OCMS_KEY1

#define REG_SDRAMC_OCMS_KEY1   (*(__O uint32_t*)0x40084030U)

(SDRAMC) SDRAMC OCMS KEY1 Register

Definition at line 66 of file instance/sdramc.h.

◆ REG_SDRAMC_OCMS_KEY2

#define REG_SDRAMC_OCMS_KEY2   (*(__O uint32_t*)0x40084034U)

(SDRAMC) SDRAMC OCMS KEY2 Register

Definition at line 67 of file instance/sdramc.h.

◆ REG_SDRAMC_TR

#define REG_SDRAMC_TR   (*(__IO uint32_t*)0x40084004U)

(SDRAMC) SDRAMC Refresh Timer Register

Definition at line 56 of file instance/sdramc.h.

◆ REG_SDRAMC_VERSION

#define REG_SDRAMC_VERSION   (*(__I uint32_t*)0x400840FCU)

(SDRAMC) SDRAMC Version Register

Definition at line 68 of file instance/sdramc.h.



inertial_sense_ros
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autogenerated on Sat Sep 19 2020 03:19:07