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Macros | |
| #define | REG_AES_AADLENR (*(__IO uint32_t*)0x4006C070U) |
| (AES) Additional Authenticated Data Length Register More... | |
| #define | REG_AES_CLENR (*(__IO uint32_t*)0x4006C074U) |
| (AES) Plaintext/Ciphertext Length Register More... | |
| #define | REG_AES_CR (*(__O uint32_t*)0x4006C000U) |
| (AES) Control Register More... | |
| #define | REG_AES_CTRR (*(__I uint32_t*)0x4006C098U) |
| (AES) GCM Encryption Counter Value Register More... | |
| #define | REG_AES_GCMHR (*(__IO uint32_t*)0x4006C09CU) |
| (AES) GCM H Word Register More... | |
| #define | REG_AES_GHASHR (*(__IO uint32_t*)0x4006C078U) |
| (AES) GCM Intermediate Hash Word Register More... | |
| #define | REG_AES_IDATAR (*(__O uint32_t*)0x4006C040U) |
| (AES) Input Data Register More... | |
| #define | REG_AES_IDR (*(__O uint32_t*)0x4006C014U) |
| (AES) Interrupt Disable Register More... | |
| #define | REG_AES_IER (*(__O uint32_t*)0x4006C010U) |
| (AES) Interrupt Enable Register More... | |
| #define | REG_AES_IMR (*(__I uint32_t*)0x4006C018U) |
| (AES) Interrupt Mask Register More... | |
| #define | REG_AES_ISR (*(__I uint32_t*)0x4006C01CU) |
| (AES) Interrupt Status Register More... | |
| #define | REG_AES_IVR (*(__O uint32_t*)0x4006C060U) |
| (AES) Initialization Vector Register More... | |
| #define | REG_AES_KEYWR (*(__O uint32_t*)0x4006C020U) |
| (AES) Key Word Register More... | |
| #define | REG_AES_MR (*(__IO uint32_t*)0x4006C004U) |
| (AES) Mode Register More... | |
| #define | REG_AES_ODATAR (*(__I uint32_t*)0x4006C050U) |
| (AES) Output Data Register More... | |
| #define | REG_AES_TAGR (*(__I uint32_t*)0x4006C088U) |
| (AES) GCM Authentication Tag Word Register More... | |
| #define | REG_AES_VERSION (*(__I uint32_t*)0x4006C0FCU) |
| (AES) Version Register More... | |
Detailed Description
Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
Definition in file instance/aes.h.
Macro Definition Documentation
◆ REG_AES_AADLENR
| #define REG_AES_AADLENR (*(__IO uint32_t*)0x4006C070U) |
(AES) Additional Authenticated Data Length Register
Definition at line 68 of file instance/aes.h.
◆ REG_AES_CLENR
| #define REG_AES_CLENR (*(__IO uint32_t*)0x4006C074U) |
(AES) Plaintext/Ciphertext Length Register
Definition at line 69 of file instance/aes.h.
◆ REG_AES_CR
| #define REG_AES_CR (*(__O uint32_t*)0x4006C000U) |
(AES) Control Register
Definition at line 58 of file instance/aes.h.
◆ REG_AES_CTRR
| #define REG_AES_CTRR (*(__I uint32_t*)0x4006C098U) |
(AES) GCM Encryption Counter Value Register
Definition at line 72 of file instance/aes.h.
◆ REG_AES_GCMHR
| #define REG_AES_GCMHR (*(__IO uint32_t*)0x4006C09CU) |
(AES) GCM H Word Register
Definition at line 73 of file instance/aes.h.
◆ REG_AES_GHASHR
| #define REG_AES_GHASHR (*(__IO uint32_t*)0x4006C078U) |
(AES) GCM Intermediate Hash Word Register
Definition at line 70 of file instance/aes.h.
◆ REG_AES_IDATAR
| #define REG_AES_IDATAR (*(__O uint32_t*)0x4006C040U) |
(AES) Input Data Register
Definition at line 65 of file instance/aes.h.
◆ REG_AES_IDR
| #define REG_AES_IDR (*(__O uint32_t*)0x4006C014U) |
(AES) Interrupt Disable Register
Definition at line 61 of file instance/aes.h.
◆ REG_AES_IER
| #define REG_AES_IER (*(__O uint32_t*)0x4006C010U) |
(AES) Interrupt Enable Register
Definition at line 60 of file instance/aes.h.
◆ REG_AES_IMR
| #define REG_AES_IMR (*(__I uint32_t*)0x4006C018U) |
(AES) Interrupt Mask Register
Definition at line 62 of file instance/aes.h.
◆ REG_AES_ISR
| #define REG_AES_ISR (*(__I uint32_t*)0x4006C01CU) |
(AES) Interrupt Status Register
Definition at line 63 of file instance/aes.h.
◆ REG_AES_IVR
| #define REG_AES_IVR (*(__O uint32_t*)0x4006C060U) |
(AES) Initialization Vector Register
Definition at line 67 of file instance/aes.h.
◆ REG_AES_KEYWR
| #define REG_AES_KEYWR (*(__O uint32_t*)0x4006C020U) |
(AES) Key Word Register
Definition at line 64 of file instance/aes.h.
◆ REG_AES_MR
| #define REG_AES_MR (*(__IO uint32_t*)0x4006C004U) |
(AES) Mode Register
Definition at line 59 of file instance/aes.h.
◆ REG_AES_ODATAR
| #define REG_AES_ODATAR (*(__I uint32_t*)0x4006C050U) |
(AES) Output Data Register
Definition at line 66 of file instance/aes.h.
◆ REG_AES_TAGR
| #define REG_AES_TAGR (*(__I uint32_t*)0x4006C088U) |
(AES) GCM Authentication Tag Word Register
Definition at line 71 of file instance/aes.h.
◆ REG_AES_VERSION
| #define REG_AES_VERSION (*(__I uint32_t*)0x4006C0FCU) |
(AES) Version Register
Definition at line 74 of file instance/aes.h.