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36 #include "stm32h7xx_hal.h"
52 #define __STM32H7xx_HAL_VERSION_MAIN (0x01UL)
53 #define __STM32H7xx_HAL_VERSION_SUB1 (0x09UL)
54 #define __STM32H7xx_HAL_VERSION_SUB2 (0x00UL)
55 #define __STM32H7xx_HAL_VERSION_RC (0x00UL)
56 #define __STM32H7xx_HAL_VERSION ((__STM32H7xx_HAL_VERSION_MAIN << 24)\
57 |(__STM32H7xx_HAL_VERSION_SUB1 << 16)\
58 |(__STM32H7xx_HAL_VERSION_SUB2 << 8 )\
59 |(__STM32H7xx_HAL_VERSION_RC))
61 #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
62 #define VREFBUF_TIMEOUT_VALUE (uint32_t)10
137 uint32_t common_system_clock;
139 #if defined(DUAL_CORE) && defined(CORE_CM4)
141 __HAL_RCC_ART_CLK_ENABLE();
142 __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL);
150 #if defined(RCC_D1CFGR_D1CPRE)
157 #if defined(RCC_D1CFGR_HPRE)
163 #if defined(DUAL_CORE) && defined(CORE_CM4)
407 uint32_t
wait = Delay;
467 return((
DBGMCU->IDCODE) >> 16);
591 #if defined(SYSCFG_PMCR_EPIS_SEL)
600 void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface)
636 MODIFY_REG(
SYSCFG->PMCR, (uint32_t) SYSCFG_AnalogSwitch, (uint32_t)(SYSCFG_SwitchState));
639 #if defined(SYSCFG_PMCR_BOOSTEN)
648 void HAL_SYSCFG_EnableBOOST(
void)
660 void HAL_SYSCFG_DisableBOOST(
void)
666 #if defined (SYSCFG_UR2_BOOT_ADD0) || defined (SYSCFG_UR2_BCM7_ADD0)
676 void HAL_SYSCFG_CM7BootAddConfig(uint32_t BootRegister, uint32_t BootAddress)
684 #if defined(DUAL_CORE)
693 #if defined(DUAL_CORE)
702 #if defined(DUAL_CORE)
712 void HAL_SYSCFG_CM4BootAddConfig(uint32_t BootRegister, uint32_t BootAddress)
735 void HAL_SYSCFG_EnableCM7BOOT(
void)
745 void HAL_SYSCFG_DisableCM7BOOT(
void)
754 void HAL_SYSCFG_EnableCM4BOOT(
void)
764 void HAL_SYSCFG_DisableCM4BOOT(
void)
801 #if defined(SYSCFG_CCCSR_HSLV)
804 SET_BIT(
SYSCFG->CCCSR, (SYSCFG_CCCSR_HSLV0| SYSCFG_CCCSR_HSLV1 | SYSCFG_CCCSR_HSLV2 | SYSCFG_CCCSR_HSLV3));
817 #if defined(SYSCFG_CCCSR_HSLV)
820 CLEAR_BIT(
SYSCFG->CCCSR, (SYSCFG_CCCSR_HSLV0| SYSCFG_CCCSR_HSLV1 | SYSCFG_CCCSR_HSLV2 | SYSCFG_CCCSR_HSLV3));
857 #if defined(SYSCFG_CCCR_NCC_MMC)
868 void HAL_SYSCFG_VDDMMC_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode )
873 MODIFY_REG(
SYSCFG->CCCR, (SYSCFG_CCCR_NCC_MMC | SYSCFG_CCCR_PCC_MMC), (((uint32_t)(SYSCFG_PMOSCode)<< 4)|(uint32_t)(SYSCFG_NMOSCode)) );
877 #if defined(SYSCFG_ADC2ALT_ADC2_ROUT0)
883 void HAL_SYSCFG_ADC2ALT_Rout0Config(uint32_t Adc2AltRout0)
895 #if defined(SYSCFG_ADC2ALT_ADC2_ROUT1)
901 void HAL_SYSCFG_ADC2ALT_Rout1Config(uint32_t Adc2AltRout1)
968 #if defined(DUAL_CORE)
973 void HAL_EnableDomain2DBGSleepMode(
void)
982 void HAL_DisableDomain2DBGSleepMode(
void)
991 void HAL_EnableDomain2DBGStopMode(
void)
1000 void HAL_DisableDomain2DBGStopMode(
void)
1009 void HAL_EnableDomain2DBGStandbyMode(
void)
1018 void HAL_DisableDomain2DBGStandbyMode(
void)
1101 CLEAR_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI->FTSR1)) + ((EXTI_Line >> 5 ) * 0x20UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1102 CLEAR_BIT( *(
__IO uint32_t *) (((uint32_t) &(
EXTI->RTSR1)) + ((EXTI_Line >> 5 ) * 0x20UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1106 SET_BIT( *(
__IO uint32_t *) (((uint32_t) &(
EXTI->RTSR1)) + ((EXTI_Line >> 5 ) * 0x20UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1110 SET_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI->FTSR1)) + ((EXTI_Line >> 5 ) * 0x20UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1125 SET_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI->SWIER1)) + ((EXTI_Line >> 5 ) * 0x20UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1139 WRITE_REG(*(
__IO uint32_t *) (((uint32_t) &(
EXTI_D1->PR1)) + ((EXTI_Line >> 5 ) * 0x10UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1143 #if defined(DUAL_CORE)
1150 void HAL_EXTI_D2_ClearFlag(uint32_t EXTI_Line)
1154 WRITE_REG(*(
__IO uint32_t *) (((uint32_t) &(
EXTI_D2->PR1)) + ((EXTI_Line >> 5 ) * 0x10UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1178 if( EXTI_LineCmd == 0UL)
1181 CLEAR_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI_D1->IMR1)) + ((EXTI_Line >> 5 ) * 0x10UL)),(uint32_t)(1UL << (EXTI_Line & 0x1FUL)) );
1185 SET_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI_D1->IMR1)) + ((EXTI_Line >> 5 ) * 0x10UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1191 if( EXTI_LineCmd == 0UL)
1194 CLEAR_BIT( *(
__IO uint32_t *) (((uint32_t) &(
EXTI_D1->EMR1)) + ((EXTI_Line >> 5 ) * 0x10UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1198 SET_BIT( *(
__IO uint32_t *) (((uint32_t) &(
EXTI_D1->EMR1)) + ((EXTI_Line >> 5 ) * 0x10UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1203 #if defined(DUAL_CORE)
1216 void HAL_EXTI_D2_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd )
1224 if( EXTI_LineCmd == 0UL)
1227 CLEAR_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI_D2->IMR1)) + ((EXTI_Line >> 5 ) * 0x10UL)),(uint32_t)(1UL << (EXTI_Line & 0x1FUL)) );
1231 SET_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI_D2->IMR1)) + ((EXTI_Line >> 5 ) * 0x10UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1237 if( EXTI_LineCmd == 0UL)
1240 CLEAR_BIT( *(
__IO uint32_t *) (((uint32_t) &(
EXTI_D2->EMR1)) + ((EXTI_Line >> 5 ) * 0x10UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1244 SET_BIT( *(
__IO uint32_t *) (((uint32_t) &(
EXTI_D2->EMR1)) + ((EXTI_Line >> 5 ) * 0x10UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1266 __IO uint32_t *pRegv;
1272 if( EXTI_LineCmd == 0UL)
1275 CLEAR_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI->D3PMR1)) + ((EXTI_Line >> 5 ) * 0x20UL)),(uint32_t)(1UL << (EXTI_Line & 0x1FUL)) );
1279 SET_BIT(*(
__IO uint32_t *) (((uint32_t) &(
EXTI->D3PMR1)) +((EXTI_Line >> 5 ) * 0x20UL)), (uint32_t)(1UL << (EXTI_Line & 0x1FUL)));
1282 if(((EXTI_Line>>4)%2UL) == 0UL)
1284 pRegv = (
__IO uint32_t *) (((uint32_t) &(
EXTI->D3PCR1L)) + ((EXTI_Line >> 5 ) * 0x20UL));
1288 pRegv = (
__IO uint32_t *) (((uint32_t) &(
EXTI->D3PCR1H)) + ((EXTI_Line >> 5 ) * 0x20UL));
1290 MODIFY_REG(*pRegv, (uint32_t)(3UL << ((EXTI_Line*2UL) & 0x1FUL)), (uint32_t)(EXTI_ClearSrc << ((EXTI_Line*2UL) & 0x1FUL)));
void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
Tune the Internal Voltage Reference buffer (VREFBUF).
#define IS_SYSCFG_CODE_SELECT(SELECT)
#define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__)
#define assert_param(expr)
Include module's header file.
#define RCC_D1CFGR_HPRE_Pos
void HAL_MspDeInit(void)
DeInitializes the MSP.
#define SYSCFG_UR3_BOOT_ADD1
HAL_StatusTypeDef
HAL Status structures definition
#define IS_SYSCFG_CODE_CONFIG(CONFIG)
#define RCC_D1CFGR_D1CPRE_Pos
#define VREFBUF_TIMEOUT_VALUE
void HAL_EnableDomain3DBGStopMode(void)
Enable the Debug Module during Domain3/SRDomain STOP mode.
#define IS_SYSCFG_ANALOG_SWITCH(SWITCH)
uint32_t HAL_GetTickPrio(void)
This function returns a tick priority.
HAL_TickFreqTypeDef HAL_GetTickFreq(void)
Return tick frequency.
void HAL_SetFMCMemorySwappingConfig(uint32_t BankMapConfig)
Set the FMC Memory Mapping Swapping config.
#define DBGMCU_CR_DBG_STANDBYD1
#define DBGMCU_CR_DBG_STANDBYD3
uint32_t HAL_GetFMCMemorySwappingConfig(void)
Get FMC Bank mapping mode.
void HAL_DisableDomain3DBGStopMode(void)
Disable the Debug Module during Domain3/SRDomain STOP mode.
#define SYSCFG_ADC2ALT_ADC2_ROUT0
#define SYSCFG_UR4_BCM4_ADD1
#define SYSCFG_UR2_BCM7_ADD0
#define IS_FMC_SWAPBMAP_MODE(__MODE__)
void HAL_SYSCFG_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode)
Code selection for the I/O Compensation cell.
#define __HAL_RCC_APB1H_RELEASE_RESET()
void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
Configure the internal voltage reference buffer high impedance mode.
#define CLEAR_BIT(REG, BIT)
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
#define DBGMCU_CR_DBG_STOPD2
#define IS_SYSCFG_SWITCH_STATE(STATE)
#define __HAL_RCC_AHB2_FORCE_RESET()
Force or release AHB2 peripheral reset.
#define HAL_DisableDBGStopMode
Disable the Debug Module during Domain1/CDomain STOP mode.
#define DBGMCU_CR_DBG_STOPD3
void HAL_Delay(uint32_t Delay)
This function provides minimum delay (in milliseconds) based on variable incremented.
void HAL_SuspendTick(void)
Suspend Tick increment.
#define SYSCFG_UR3_BCM7_ADD1
#define DBGMCU_CR_DBG_STANDBYD2
#define __HAL_RCC_AHB1_RELEASE_RESET()
#define __HAL_RCC_APB4_RELEASE_RESET()
void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
Configure the internal voltage reference buffer voltage scale.
#define SysTick_CTRL_TICKINT_Msk
HAL_StatusTypeDef HAL_DeInit(void)
This function de-Initializes common part of the HAL and stops the systick. This function is optional.
#define HAL_EnableDBGStandbyMode
Enable the Debug Module during Domain1/CDomain STANDBY mode.
uint32_t HAL_GetUIDw2(void)
Returns third word of the unique device identifier (UID based on 96 bits)
#define DBGMCU_CR_DBG_SLEEPD1
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
#define __HAL_RCC_APB4_FORCE_RESET()
Force or release the APB4 peripheral reset.
#define __HAL_RCC_APB1L_FORCE_RESET()
Force or release the APB1 peripheral reset.
uint32_t HAL_GetHalVersion(void)
Returns the HAL revision.
#define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__)
void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch, uint32_t SYSCFG_SwitchState)
Analog Switch control for dual analog pads.
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
void HAL_EXTI_EdgeConfig(uint32_t EXTI_Line, uint32_t EXTI_Edge)
Configure the EXTI input event line edge.
void HAL_EnableDomain3DBGStandbyMode(void)
Enable the Debug Module during Domain3/SRDomain STANDBY mode.
#define __HAL_RCC_AHB2_RELEASE_RESET()
void HAL_MspInit(void)
Initialize the MSP.
#define SYSCFG_UR3_BCM4_ADD0_Pos
uint32_t HAL_GetREVID(void)
Returns the device revision identifier.
void HAL_SYSCFG_CompensationCodeSelect(uint32_t SYSCFG_CompCode)
Code selection for the I/O Compensation cell.
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
void HAL_EXTI_D1_ClearFlag(uint32_t EXTI_Line)
Clears the EXTI's line pending flags for Domain D1.
#define __HAL_RCC_APB1L_RELEASE_RESET()
#define HAL_EnableDBGStopMode
Enable the Debug Module during Domain1/CDomain STOP mode.
#define DBGMCU_CR_DBG_SLEEPD2
#define IS_SYSCFG_ETHERNET_CONFIG(CONFIG)
#define SYSCFG_UR2_BCM7_ADD0_Pos
HAL_TickFreqTypeDef uwTickFreq
#define SYSCFG_UR2_BOOT_ADD0_Pos
#define READ_BIT(REG, BIT)
#define SYSCFG_UR3_BCM4_ADD0
#define IS_SYSCFG_BOOT_ADDRESS(ADDRESS)
#define RCC_D1CFGR_D1CPRE
HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
Enable the Internal Voltage Reference buffer (VREFBUF).
#define __HAL_RCC_APB2_RELEASE_RESET()
#define SYSCFG_PMCR_EPIS_SEL
#define __HAL_RCC_AHB3_RELEASE_RESET()
#define __HAL_RCC_AHB3_FORCE_RESET()
Force or release AHB3 peripheral reset.
#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__)
void HAL_IncTick(void)
This function is called to increment a global variable "uwTick" used as application time base.
#define __HAL_RCC_APB3_FORCE_RESET()
Force or release the APB3 peripheral reset.
HAL_StatusTypeDef HAL_Init(void)
This function is used to initialize the HAL Library; it must be the first instruction to be executed ...
uint32_t HAL_GetDEVID(void)
Returns the device identifier.
void HAL_SYSCFG_EnableIOSpeedOptimize(void)
To Enable optimize the I/O speed when the product voltage is low.
#define __STM32H7xx_HAL_VERSION
#define DBGMCU_CR_DBG_STOPD1
#define __HAL_RCC_APB2_FORCE_RESET()
#define HAL_EnableDBGSleepMode
Enable the Debug Module during Domain1/CDomain SLEEP mode.
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
This function configures the source of the time base. The time source is configured to have 1ms time ...
uint32_t HAL_RCC_GetSysClockFreq(void)
#define SYSCFG_PMCR_BOOSTEN
void HAL_SYSCFG_DisableIOSpeedOptimize(void)
To Disable optimize the I/O speed when the product voltage is low.
void HAL_ResumeTick(void)
Resume Tick increment.
#define __HAL_RCC_APB3_RELEASE_RESET()
uint32_t HAL_GetUIDw1(void)
Returns second word of the unique device identifier (UID based on 96 bits)
#define NVIC_PRIORITYGROUP_4
void HAL_DisableCompensationCell(void)
Power-down the I/O Compensation Cell.
void HAL_EXTI_D1_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_Mode, uint32_t EXTI_LineCmd)
Configure the EXTI input event line for Domain D1.
#define HAL_DisableDBGStandbyMode
Disable the Debug Module during Domain1/CDomain STANDBY mode.
uint32_t HAL_GetUIDw0(void)
Returns first word of the unique device identifier (UID based on 96 bits)
void HAL_EXTI_D3_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_LineCmd, uint32_t EXTI_ClearSrc)
Configure the EXTI input event line for Domain D3.
#define __HAL_RCC_AHB4_FORCE_RESET()
Force or release the AHB4 peripheral reset.
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
#define WRITE_REG(REG, VAL)
void HAL_EnableCompensationCell(void)
Enables the I/O Compensation Cell.
#define SYSCFG_BOOT_ADDR0
#define HAL_DisableDBGSleepMode
Disable the Debug Module during Domain1/CDomain SLEEP mode.
#define IDCODE_DEVID_MASK
#define SET_BIT(REG, BIT)
#define IS_SYSCFG_BOOT_REGISTER(REGISTER)
#define __HAL_RCC_AHB4_RELEASE_RESET()
void HAL_EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
Generates a Software interrupt on selected EXTI line.
#define SYSCFG_UR2_BOOT_ADD0
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
Set new tick Freq.
#define __HAL_RCC_AHB1_FORCE_RESET()
#define TICK_INT_PRIORITY
void HAL_DisableDomain3DBGStandbyMode(void)
Disable the Debug Module during Domain3/SRDomain STANDBY mode.
#define SYSCFG_ADC2ALT_ADC2_ROUT1
#define SYSCFG_CCCSR_HSLV
#define IS_TICKFREQ(FREQ)
#define __HAL_RCC_APB1H_FORCE_RESET()
const uint8_t D1CorePrescTable[16]
void HAL_SYSCFG_DisableVREFBUF(void)
Disable the Internal Voltage Reference buffer (VREFBUF).