stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c
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1 
161 /* Includes ------------------------------------------------------------------*/
162 #include "stm32h7xx_hal.h"
163 
173 #ifdef HAL_UART_MODULE_ENABLED
174 
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
180 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | \
181  USART_CR1_OVER8 | USART_CR1_FIFOEN))
183 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT | USART_CR3_TXFTCFG | \
184  USART_CR3_RXFTCFG))
186 #define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */
187 #define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */
188 
189 #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */
190 #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */
191 
195 /* Private macros ------------------------------------------------------------*/
196 /* Private variables ---------------------------------------------------------*/
197 /* Private function prototypes -----------------------------------------------*/
201 static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
202 static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
203 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
204 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
205 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
206 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
207 static void UART_DMAError(DMA_HandleTypeDef *hdma);
208 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
209 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
210 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
211 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
212 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
213 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart);
214 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart);
215 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
216 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
217 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart);
218 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart);
219 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart);
220 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
221 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
226 /* Exported Constants --------------------------------------------------------*/
230 const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U};
235 /* Exported functions --------------------------------------------------------*/
236 
307 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
308 {
309  /* Check the UART handle allocation */
310  if (huart == NULL)
311  {
312  return HAL_ERROR;
313  }
314 
315  if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
316  {
317  /* Check the parameters */
318  assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
319  }
320  else
321  {
322  /* Check the parameters */
323  assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
324  }
325 
326  if (huart->gState == HAL_UART_STATE_RESET)
327  {
328  /* Allocate lock resource and initialize it */
329  huart->Lock = HAL_UNLOCKED;
330 
331 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
332  UART_InitCallbacksToDefault(huart);
333 
334  if (huart->MspInitCallback == NULL)
335  {
336  huart->MspInitCallback = HAL_UART_MspInit;
337  }
338 
339  /* Init the low level hardware */
340  huart->MspInitCallback(huart);
341 #else
342  /* Init the low level hardware : GPIO, CLOCK */
343  HAL_UART_MspInit(huart);
344 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
345  }
346 
347  huart->gState = HAL_UART_STATE_BUSY;
348 
349  __HAL_UART_DISABLE(huart);
350 
351  /* Set the UART Communication parameters */
352  if (UART_SetConfig(huart) == HAL_ERROR)
353  {
354  return HAL_ERROR;
355  }
356 
357  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
358  {
359  UART_AdvFeatureConfig(huart);
360  }
361 
362  /* In asynchronous mode, the following bits must be kept cleared:
363  - LINEN and CLKEN bits in the USART_CR2 register,
364  - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
365  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
366  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
367 
368  __HAL_UART_ENABLE(huart);
369 
370  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
371  return (UART_CheckIdleState(huart));
372 }
373 
380 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
381 {
382  /* Check the UART handle allocation */
383  if (huart == NULL)
384  {
385  return HAL_ERROR;
386  }
387 
388  /* Check UART instance */
389  assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
390 
391  if (huart->gState == HAL_UART_STATE_RESET)
392  {
393  /* Allocate lock resource and initialize it */
394  huart->Lock = HAL_UNLOCKED;
395 
396 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
397  UART_InitCallbacksToDefault(huart);
398 
399  if (huart->MspInitCallback == NULL)
400  {
401  huart->MspInitCallback = HAL_UART_MspInit;
402  }
403 
404  /* Init the low level hardware */
405  huart->MspInitCallback(huart);
406 #else
407  /* Init the low level hardware : GPIO, CLOCK */
408  HAL_UART_MspInit(huart);
409 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
410  }
411 
412  huart->gState = HAL_UART_STATE_BUSY;
413 
414  __HAL_UART_DISABLE(huart);
415 
416  /* Set the UART Communication parameters */
417  if (UART_SetConfig(huart) == HAL_ERROR)
418  {
419  return HAL_ERROR;
420  }
421 
422  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
423  {
424  UART_AdvFeatureConfig(huart);
425  }
426 
427  /* In half-duplex mode, the following bits must be kept cleared:
428  - LINEN and CLKEN bits in the USART_CR2 register,
429  - SCEN and IREN bits in the USART_CR3 register.*/
430  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
431  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
432 
433  /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
434  SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
435 
436  __HAL_UART_ENABLE(huart);
437 
438  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
439  return (UART_CheckIdleState(huart));
440 }
441 
442 
453 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
454 {
455  /* Check the UART handle allocation */
456  if (huart == NULL)
457  {
458  return HAL_ERROR;
459  }
460 
461  /* Check the LIN UART instance */
462  assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
463  /* Check the Break detection length parameter */
464  assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
465 
466  /* LIN mode limited to 16-bit oversampling only */
467  if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
468  {
469  return HAL_ERROR;
470  }
471  /* LIN mode limited to 8-bit data length */
472  if (huart->Init.WordLength != UART_WORDLENGTH_8B)
473  {
474  return HAL_ERROR;
475  }
476 
477  if (huart->gState == HAL_UART_STATE_RESET)
478  {
479  /* Allocate lock resource and initialize it */
480  huart->Lock = HAL_UNLOCKED;
481 
482 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
483  UART_InitCallbacksToDefault(huart);
484 
485  if (huart->MspInitCallback == NULL)
486  {
487  huart->MspInitCallback = HAL_UART_MspInit;
488  }
489 
490  /* Init the low level hardware */
491  huart->MspInitCallback(huart);
492 #else
493  /* Init the low level hardware : GPIO, CLOCK */
494  HAL_UART_MspInit(huart);
495 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
496  }
497 
498  huart->gState = HAL_UART_STATE_BUSY;
499 
500  __HAL_UART_DISABLE(huart);
501 
502  /* Set the UART Communication parameters */
503  if (UART_SetConfig(huart) == HAL_ERROR)
504  {
505  return HAL_ERROR;
506  }
507 
508  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
509  {
510  UART_AdvFeatureConfig(huart);
511  }
512 
513  /* In LIN mode, the following bits must be kept cleared:
514  - LINEN and CLKEN bits in the USART_CR2 register,
515  - SCEN and IREN bits in the USART_CR3 register.*/
516  CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
517  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
518 
519  /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
520  SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
521 
522  /* Set the USART LIN Break detection length. */
523  MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
524 
525  __HAL_UART_ENABLE(huart);
526 
527  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
528  return (UART_CheckIdleState(huart));
529 }
530 
531 
550 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
551 {
552  /* Check the UART handle allocation */
553  if (huart == NULL)
554  {
555  return HAL_ERROR;
556  }
557 
558  /* Check the wake up method parameter */
559  assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
560 
561  if (huart->gState == HAL_UART_STATE_RESET)
562  {
563  /* Allocate lock resource and initialize it */
564  huart->Lock = HAL_UNLOCKED;
565 
566 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
567  UART_InitCallbacksToDefault(huart);
568 
569  if (huart->MspInitCallback == NULL)
570  {
571  huart->MspInitCallback = HAL_UART_MspInit;
572  }
573 
574  /* Init the low level hardware */
575  huart->MspInitCallback(huart);
576 #else
577  /* Init the low level hardware : GPIO, CLOCK */
578  HAL_UART_MspInit(huart);
579 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
580  }
581 
582  huart->gState = HAL_UART_STATE_BUSY;
583 
584  __HAL_UART_DISABLE(huart);
585 
586  /* Set the UART Communication parameters */
587  if (UART_SetConfig(huart) == HAL_ERROR)
588  {
589  return HAL_ERROR;
590  }
591 
592  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
593  {
594  UART_AdvFeatureConfig(huart);
595  }
596 
597  /* In multiprocessor mode, the following bits must be kept cleared:
598  - LINEN and CLKEN bits in the USART_CR2 register,
599  - SCEN, HDSEL and IREN bits in the USART_CR3 register. */
600  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
601  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
602 
603  if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
604  {
605  /* If address mark wake up method is chosen, set the USART address node */
606  MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
607  }
608 
609  /* Set the wake up method by setting the WAKE bit in the CR1 register */
610  MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
611 
612  __HAL_UART_ENABLE(huart);
613 
614  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
615  return (UART_CheckIdleState(huart));
616 }
617 
618 
624 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
625 {
626  /* Check the UART handle allocation */
627  if (huart == NULL)
628  {
629  return HAL_ERROR;
630  }
631 
632  /* Check the parameters */
633  assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
634 
635  huart->gState = HAL_UART_STATE_BUSY;
636 
637  __HAL_UART_DISABLE(huart);
638 
639  huart->Instance->CR1 = 0x0U;
640  huart->Instance->CR2 = 0x0U;
641  huart->Instance->CR3 = 0x0U;
642 
643 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
644  if (huart->MspDeInitCallback == NULL)
645  {
646  huart->MspDeInitCallback = HAL_UART_MspDeInit;
647  }
648  /* DeInit the low level hardware */
649  huart->MspDeInitCallback(huart);
650 #else
651  /* DeInit the low level hardware */
652  HAL_UART_MspDeInit(huart);
653 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
654 
655  huart->ErrorCode = HAL_UART_ERROR_NONE;
656  huart->gState = HAL_UART_STATE_RESET;
657  huart->RxState = HAL_UART_STATE_RESET;
658  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
659 
660  __HAL_UNLOCK(huart);
661 
662  return HAL_OK;
663 }
664 
670 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
671 {
672  /* Prevent unused argument(s) compilation warning */
673  UNUSED(huart);
674 
675  /* NOTE : This function should not be modified, when the callback is needed,
676  the HAL_UART_MspInit can be implemented in the user file
677  */
678 }
679 
685 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
686 {
687  /* Prevent unused argument(s) compilation warning */
688  UNUSED(huart);
689 
690  /* NOTE : This function should not be modified, when the callback is needed,
691  the HAL_UART_MspDeInit can be implemented in the user file
692  */
693 }
694 
695 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
696 
718 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
719  pUART_CallbackTypeDef pCallback)
720 {
721  HAL_StatusTypeDef status = HAL_OK;
722 
723  if (pCallback == NULL)
724  {
725  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
726 
727  return HAL_ERROR;
728  }
729 
730  __HAL_LOCK(huart);
731 
732  if (huart->gState == HAL_UART_STATE_READY)
733  {
734  switch (CallbackID)
735  {
736  case HAL_UART_TX_HALFCOMPLETE_CB_ID :
737  huart->TxHalfCpltCallback = pCallback;
738  break;
739 
740  case HAL_UART_TX_COMPLETE_CB_ID :
741  huart->TxCpltCallback = pCallback;
742  break;
743 
744  case HAL_UART_RX_HALFCOMPLETE_CB_ID :
745  huart->RxHalfCpltCallback = pCallback;
746  break;
747 
748  case HAL_UART_RX_COMPLETE_CB_ID :
749  huart->RxCpltCallback = pCallback;
750  break;
751 
752  case HAL_UART_ERROR_CB_ID :
753  huart->ErrorCallback = pCallback;
754  break;
755 
756  case HAL_UART_ABORT_COMPLETE_CB_ID :
757  huart->AbortCpltCallback = pCallback;
758  break;
759 
760  case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
761  huart->AbortTransmitCpltCallback = pCallback;
762  break;
763 
764  case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
765  huart->AbortReceiveCpltCallback = pCallback;
766  break;
767 
768  case HAL_UART_WAKEUP_CB_ID :
769  huart->WakeupCallback = pCallback;
770  break;
771 
772  case HAL_UART_RX_FIFO_FULL_CB_ID :
773  huart->RxFifoFullCallback = pCallback;
774  break;
775 
776  case HAL_UART_TX_FIFO_EMPTY_CB_ID :
777  huart->TxFifoEmptyCallback = pCallback;
778  break;
779 
780  case HAL_UART_MSPINIT_CB_ID :
781  huart->MspInitCallback = pCallback;
782  break;
783 
784  case HAL_UART_MSPDEINIT_CB_ID :
785  huart->MspDeInitCallback = pCallback;
786  break;
787 
788  default :
789  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
790 
791  status = HAL_ERROR;
792  break;
793  }
794  }
795  else if (huart->gState == HAL_UART_STATE_RESET)
796  {
797  switch (CallbackID)
798  {
799  case HAL_UART_MSPINIT_CB_ID :
800  huart->MspInitCallback = pCallback;
801  break;
802 
803  case HAL_UART_MSPDEINIT_CB_ID :
804  huart->MspDeInitCallback = pCallback;
805  break;
806 
807  default :
808  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
809 
810  status = HAL_ERROR;
811  break;
812  }
813  }
814  else
815  {
816  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
817 
818  status = HAL_ERROR;
819  }
820 
821  __HAL_UNLOCK(huart);
822 
823  return status;
824 }
825 
847 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
848 {
849  HAL_StatusTypeDef status = HAL_OK;
850 
851  __HAL_LOCK(huart);
852 
853  if (HAL_UART_STATE_READY == huart->gState)
854  {
855  switch (CallbackID)
856  {
857  case HAL_UART_TX_HALFCOMPLETE_CB_ID :
858  huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
859  break;
860 
861  case HAL_UART_TX_COMPLETE_CB_ID :
862  huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
863  break;
864 
865  case HAL_UART_RX_HALFCOMPLETE_CB_ID :
866  huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
867  break;
868 
869  case HAL_UART_RX_COMPLETE_CB_ID :
870  huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
871  break;
872 
873  case HAL_UART_ERROR_CB_ID :
874  huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
875  break;
876 
877  case HAL_UART_ABORT_COMPLETE_CB_ID :
878  huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
879  break;
880 
881  case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
882  huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak
883  AbortTransmitCpltCallback */
884  break;
885 
886  case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
887  huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak
888  AbortReceiveCpltCallback */
889  break;
890 
891  case HAL_UART_WAKEUP_CB_ID :
892  huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
893  break;
894 
895  case HAL_UART_RX_FIFO_FULL_CB_ID :
896  huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
897  break;
898 
899  case HAL_UART_TX_FIFO_EMPTY_CB_ID :
900  huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
901  break;
902 
903  case HAL_UART_MSPINIT_CB_ID :
904  huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
905  break;
906 
907  case HAL_UART_MSPDEINIT_CB_ID :
908  huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
909  break;
910 
911  default :
912  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
913 
914  status = HAL_ERROR;
915  break;
916  }
917  }
918  else if (HAL_UART_STATE_RESET == huart->gState)
919  {
920  switch (CallbackID)
921  {
922  case HAL_UART_MSPINIT_CB_ID :
923  huart->MspInitCallback = HAL_UART_MspInit;
924  break;
925 
926  case HAL_UART_MSPDEINIT_CB_ID :
927  huart->MspDeInitCallback = HAL_UART_MspDeInit;
928  break;
929 
930  default :
931  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
932 
933  status = HAL_ERROR;
934  break;
935  }
936  }
937  else
938  {
939  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
940 
941  status = HAL_ERROR;
942  }
943 
944  __HAL_UNLOCK(huart);
945 
946  return status;
947 }
948 
956 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback)
957 {
958  HAL_StatusTypeDef status = HAL_OK;
959 
960  if (pCallback == NULL)
961  {
962  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
963 
964  return HAL_ERROR;
965  }
966 
967  /* Process locked */
968  __HAL_LOCK(huart);
969 
970  if (huart->gState == HAL_UART_STATE_READY)
971  {
972  huart->RxEventCallback = pCallback;
973  }
974  else
975  {
976  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
977 
978  status = HAL_ERROR;
979  }
980 
981  /* Release Lock */
982  __HAL_UNLOCK(huart);
983 
984  return status;
985 }
986 
993 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
994 {
995  HAL_StatusTypeDef status = HAL_OK;
996 
997  /* Process locked */
998  __HAL_LOCK(huart);
999 
1000  if (huart->gState == HAL_UART_STATE_READY)
1001  {
1002  huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */
1003  }
1004  else
1005  {
1006  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
1007 
1008  status = HAL_ERROR;
1009  }
1010 
1011  /* Release Lock */
1012  __HAL_UNLOCK(huart);
1013  return status;
1014 }
1015 
1016 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1017 
1121 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1122 {
1123  uint8_t *pdata8bits;
1124  uint16_t *pdata16bits;
1125  uint32_t tickstart;
1126 
1127  /* Check that a Tx process is not already ongoing */
1128  if (huart->gState == HAL_UART_STATE_READY)
1129  {
1130  if ((pData == NULL) || (Size == 0U))
1131  {
1132  return HAL_ERROR;
1133  }
1134 
1135  __HAL_LOCK(huart);
1136 
1137  huart->ErrorCode = HAL_UART_ERROR_NONE;
1138  huart->gState = HAL_UART_STATE_BUSY_TX;
1139 
1140  /* Init tickstart for timeout management */
1141  tickstart = HAL_GetTick();
1142 
1143  huart->TxXferSize = Size;
1144  huart->TxXferCount = Size;
1145 
1146  /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
1147  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1148  {
1149  pdata8bits = NULL;
1150  pdata16bits = (uint16_t *) pData;
1151  }
1152  else
1153  {
1154  pdata8bits = pData;
1155  pdata16bits = NULL;
1156  }
1157 
1158  __HAL_UNLOCK(huart);
1159 
1160  while (huart->TxXferCount > 0U)
1161  {
1162  if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1163  {
1164  return HAL_TIMEOUT;
1165  }
1166  if (pdata8bits == NULL)
1167  {
1168  huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
1169  pdata16bits++;
1170  }
1171  else
1172  {
1173  huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
1174  pdata8bits++;
1175  }
1176  huart->TxXferCount--;
1177  }
1178 
1179  if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
1180  {
1181  return HAL_TIMEOUT;
1182  }
1183 
1184  /* At end of Tx process, restore huart->gState to Ready */
1185  huart->gState = HAL_UART_STATE_READY;
1186 
1187  return HAL_OK;
1188  }
1189  else
1190  {
1191  return HAL_BUSY;
1192  }
1193 }
1194 
1210 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1211 {
1212  uint8_t *pdata8bits;
1213  uint16_t *pdata16bits;
1214  uint16_t uhMask;
1215  uint32_t tickstart;
1216 
1217  /* Check that a Rx process is not already ongoing */
1218  if (huart->RxState == HAL_UART_STATE_READY)
1219  {
1220  if ((pData == NULL) || (Size == 0U))
1221  {
1222  return HAL_ERROR;
1223  }
1224 
1225  __HAL_LOCK(huart);
1226 
1227  huart->ErrorCode = HAL_UART_ERROR_NONE;
1228  huart->RxState = HAL_UART_STATE_BUSY_RX;
1229  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1230 
1231  /* Init tickstart for timeout management */
1232  tickstart = HAL_GetTick();
1233 
1234  huart->RxXferSize = Size;
1235  huart->RxXferCount = Size;
1236 
1237  /* Computation of UART mask to apply to RDR register */
1238  UART_MASK_COMPUTATION(huart);
1239  uhMask = huart->Mask;
1240 
1241  /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1242  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1243  {
1244  pdata8bits = NULL;
1245  pdata16bits = (uint16_t *) pData;
1246  }
1247  else
1248  {
1249  pdata8bits = pData;
1250  pdata16bits = NULL;
1251  }
1252 
1253  __HAL_UNLOCK(huart);
1254 
1255  /* as long as data have to be received */
1256  while (huart->RxXferCount > 0U)
1257  {
1258  if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1259  {
1260  return HAL_TIMEOUT;
1261  }
1262  if (pdata8bits == NULL)
1263  {
1264  *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
1265  pdata16bits++;
1266  }
1267  else
1268  {
1269  *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
1270  pdata8bits++;
1271  }
1272  huart->RxXferCount--;
1273  }
1274 
1275  /* At end of Rx process, restore huart->RxState to Ready */
1276  huart->RxState = HAL_UART_STATE_READY;
1277 
1278  return HAL_OK;
1279  }
1280  else
1281  {
1282  return HAL_BUSY;
1283  }
1284 }
1285 
1296 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1297 {
1298  /* Check that a Tx process is not already ongoing */
1299  if (huart->gState == HAL_UART_STATE_READY)
1300  {
1301  if ((pData == NULL) || (Size == 0U))
1302  {
1303  return HAL_ERROR;
1304  }
1305 
1306  __HAL_LOCK(huart);
1307 
1308  huart->pTxBuffPtr = pData;
1309  huart->TxXferSize = Size;
1310  huart->TxXferCount = Size;
1311  huart->TxISR = NULL;
1312 
1313  huart->ErrorCode = HAL_UART_ERROR_NONE;
1314  huart->gState = HAL_UART_STATE_BUSY_TX;
1315 
1316  /* Configure Tx interrupt processing */
1317  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1318  {
1319  /* Set the Tx ISR function pointer according to the data word length */
1320  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1321  {
1322  huart->TxISR = UART_TxISR_16BIT_FIFOEN;
1323  }
1324  else
1325  {
1326  huart->TxISR = UART_TxISR_8BIT_FIFOEN;
1327  }
1328 
1329  __HAL_UNLOCK(huart);
1330 
1331  /* Enable the TX FIFO threshold interrupt */
1332  SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1333  }
1334  else
1335  {
1336  /* Set the Tx ISR function pointer according to the data word length */
1337  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1338  {
1339  huart->TxISR = UART_TxISR_16BIT;
1340  }
1341  else
1342  {
1343  huart->TxISR = UART_TxISR_8BIT;
1344  }
1345 
1346  __HAL_UNLOCK(huart);
1347 
1348  /* Enable the Transmit Data Register Empty interrupt */
1349  SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
1350  }
1351 
1352  return HAL_OK;
1353  }
1354  else
1355  {
1356  return HAL_BUSY;
1357  }
1358 }
1359 
1370 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1371 {
1372  /* Check that a Rx process is not already ongoing */
1373  if (huart->RxState == HAL_UART_STATE_READY)
1374  {
1375  if ((pData == NULL) || (Size == 0U))
1376  {
1377  return HAL_ERROR;
1378  }
1379 
1380  __HAL_LOCK(huart);
1381 
1382  /* Set Reception type to Standard reception */
1383  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1384 
1385  if (!(IS_LPUART_INSTANCE(huart->Instance)))
1386  {
1387  /* Check that USART RTOEN bit is set */
1388  if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
1389  {
1390  /* Enable the UART Receiver Timeout Interrupt */
1391  SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
1392  }
1393  }
1394 
1395  return (UART_Start_Receive_IT(huart, pData, Size));
1396  }
1397  else
1398  {
1399  return HAL_BUSY;
1400  }
1401 }
1402 
1413 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1414 {
1415  /* Check that a Tx process is not already ongoing */
1416  if (huart->gState == HAL_UART_STATE_READY)
1417  {
1418  if ((pData == NULL) || (Size == 0U))
1419  {
1420  return HAL_ERROR;
1421  }
1422 
1423  __HAL_LOCK(huart);
1424 
1425  huart->pTxBuffPtr = pData;
1426  huart->TxXferSize = Size;
1427  huart->TxXferCount = Size;
1428 
1429  huart->ErrorCode = HAL_UART_ERROR_NONE;
1430  huart->gState = HAL_UART_STATE_BUSY_TX;
1431 
1432  if (huart->hdmatx != NULL)
1433  {
1434  /* Set the UART DMA transfer complete callback */
1435  huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
1436 
1437  /* Set the UART DMA Half transfer complete callback */
1438  huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
1439 
1440  /* Set the DMA error callback */
1441  huart->hdmatx->XferErrorCallback = UART_DMAError;
1442 
1443  /* Set the DMA abort callback */
1444  huart->hdmatx->XferAbortCallback = NULL;
1445 
1446  /* Enable the UART transmit DMA channel */
1447  if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
1448  {
1449  /* Set error code to DMA */
1450  huart->ErrorCode = HAL_UART_ERROR_DMA;
1451 
1452  __HAL_UNLOCK(huart);
1453 
1454  /* Restore huart->gState to ready */
1455  huart->gState = HAL_UART_STATE_READY;
1456 
1457  return HAL_ERROR;
1458  }
1459  }
1460  /* Clear the TC flag in the ICR register */
1461  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
1462 
1463  __HAL_UNLOCK(huart);
1464 
1465  /* Enable the DMA transfer for transmit request by setting the DMAT bit
1466  in the UART CR3 register */
1467  SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1468 
1469  return HAL_OK;
1470  }
1471  else
1472  {
1473  return HAL_BUSY;
1474  }
1475 }
1476 
1489 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1490 {
1491  /* Check that a Rx process is not already ongoing */
1492  if (huart->RxState == HAL_UART_STATE_READY)
1493  {
1494  if ((pData == NULL) || (Size == 0U))
1495  {
1496  return HAL_ERROR;
1497  }
1498 
1499  __HAL_LOCK(huart);
1500 
1501  /* Set Reception type to Standard reception */
1502  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1503 
1504  if (!(IS_LPUART_INSTANCE(huart->Instance)))
1505  {
1506  /* Check that USART RTOEN bit is set */
1507  if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
1508  {
1509  /* Enable the UART Receiver Timeout Interrupt */
1510  SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
1511  }
1512  }
1513 
1514  return (UART_Start_Receive_DMA(huart, pData, Size));
1515  }
1516  else
1517  {
1518  return HAL_BUSY;
1519  }
1520 }
1521 
1527 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
1528 {
1529  const HAL_UART_StateTypeDef gstate = huart->gState;
1530  const HAL_UART_StateTypeDef rxstate = huart->RxState;
1531 
1532  __HAL_LOCK(huart);
1533 
1534  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1535  (gstate == HAL_UART_STATE_BUSY_TX))
1536  {
1537  /* Disable the UART DMA Tx request */
1538  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1539  }
1540  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1541  (rxstate == HAL_UART_STATE_BUSY_RX))
1542  {
1543  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
1544  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1545  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1546 
1547  /* Disable the UART DMA Rx request */
1548  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1549  }
1550 
1551  __HAL_UNLOCK(huart);
1552 
1553  return HAL_OK;
1554 }
1555 
1561 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
1562 {
1563  __HAL_LOCK(huart);
1564 
1565  if (huart->gState == HAL_UART_STATE_BUSY_TX)
1566  {
1567  /* Enable the UART DMA Tx request */
1568  SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1569  }
1570  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
1571  {
1572  /* Clear the Overrun flag before resuming the Rx transfer */
1573  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
1574 
1575  /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
1576  SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1577  SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1578 
1579  /* Enable the UART DMA Rx request */
1580  SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1581  }
1582 
1583  __HAL_UNLOCK(huart);
1584 
1585  return HAL_OK;
1586 }
1587 
1593 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
1594 {
1595  /* The Lock is not implemented on this API to allow the user application
1596  to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
1597  HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback:
1598  indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
1599  interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
1600  the stream and the corresponding call back is executed. */
1601 
1602  const HAL_UART_StateTypeDef gstate = huart->gState;
1603  const HAL_UART_StateTypeDef rxstate = huart->RxState;
1604 
1605  /* Stop UART DMA Tx request if ongoing */
1606  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1607  (gstate == HAL_UART_STATE_BUSY_TX))
1608  {
1609  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1610 
1611  /* Abort the UART DMA Tx channel */
1612  if (huart->hdmatx != NULL)
1613  {
1614  if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1615  {
1616  if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1617  {
1618  /* Set error code to DMA */
1619  huart->ErrorCode = HAL_UART_ERROR_DMA;
1620 
1621  return HAL_TIMEOUT;
1622  }
1623  }
1624  }
1625 
1626  UART_EndTxTransfer(huart);
1627  }
1628 
1629  /* Stop UART DMA Rx request if ongoing */
1630  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1631  (rxstate == HAL_UART_STATE_BUSY_RX))
1632  {
1633  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1634 
1635  /* Abort the UART DMA Rx channel */
1636  if (huart->hdmarx != NULL)
1637  {
1638  if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1639  {
1640  if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1641  {
1642  /* Set error code to DMA */
1643  huart->ErrorCode = HAL_UART_ERROR_DMA;
1644 
1645  return HAL_TIMEOUT;
1646  }
1647  }
1648  }
1649 
1650  UART_EndRxTransfer(huart);
1651  }
1652 
1653  return HAL_OK;
1654 }
1655 
1668 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
1669 {
1670  /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */
1671  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE |
1672  USART_CR1_TCIE));
1673  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
1674 
1675  /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1676  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1677  {
1678  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1679  }
1680 
1681  /* Disable the UART DMA Tx request if enabled */
1682  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1683  {
1684  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1685 
1686  /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1687  if (huart->hdmatx != NULL)
1688  {
1689  /* Set the UART DMA Abort callback to Null.
1690  No call back execution at end of DMA abort procedure */
1691  huart->hdmatx->XferAbortCallback = NULL;
1692 
1693  if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1694  {
1695  if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1696  {
1697  /* Set error code to DMA */
1698  huart->ErrorCode = HAL_UART_ERROR_DMA;
1699 
1700  return HAL_TIMEOUT;
1701  }
1702  }
1703  }
1704  }
1705 
1706  /* Disable the UART DMA Rx request if enabled */
1707  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1708  {
1709  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1710 
1711  /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1712  if (huart->hdmarx != NULL)
1713  {
1714  /* Set the UART DMA Abort callback to Null.
1715  No call back execution at end of DMA abort procedure */
1716  huart->hdmarx->XferAbortCallback = NULL;
1717 
1718  if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1719  {
1720  if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1721  {
1722  /* Set error code to DMA */
1723  huart->ErrorCode = HAL_UART_ERROR_DMA;
1724 
1725  return HAL_TIMEOUT;
1726  }
1727  }
1728  }
1729  }
1730 
1731  /* Reset Tx and Rx transfer counters */
1732  huart->TxXferCount = 0U;
1733  huart->RxXferCount = 0U;
1734 
1735  /* Clear the Error flags in the ICR register */
1736  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1737 
1738  /* Flush the whole TX FIFO (if needed) */
1739  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1740  {
1741  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1742  }
1743 
1744  /* Discard the received data */
1745  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1746 
1747  /* Restore huart->gState and huart->RxState to Ready */
1748  huart->gState = HAL_UART_STATE_READY;
1749  huart->RxState = HAL_UART_STATE_READY;
1750  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1751 
1752  huart->ErrorCode = HAL_UART_ERROR_NONE;
1753 
1754  return HAL_OK;
1755 }
1756 
1769 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
1770 {
1771  /* Disable TCIE, TXEIE and TXFTIE interrupts */
1772  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
1773  CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1774 
1775  /* Disable the UART DMA Tx request if enabled */
1776  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1777  {
1778  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1779 
1780  /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1781  if (huart->hdmatx != NULL)
1782  {
1783  /* Set the UART DMA Abort callback to Null.
1784  No call back execution at end of DMA abort procedure */
1785  huart->hdmatx->XferAbortCallback = NULL;
1786 
1787  if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1788  {
1789  if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1790  {
1791  /* Set error code to DMA */
1792  huart->ErrorCode = HAL_UART_ERROR_DMA;
1793 
1794  return HAL_TIMEOUT;
1795  }
1796  }
1797  }
1798  }
1799 
1800  /* Reset Tx transfer counter */
1801  huart->TxXferCount = 0U;
1802 
1803  /* Flush the whole TX FIFO (if needed) */
1804  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1805  {
1806  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1807  }
1808 
1809  /* Restore huart->gState to Ready */
1810  huart->gState = HAL_UART_STATE_READY;
1811 
1812  return HAL_OK;
1813 }
1814 
1827 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
1828 {
1829  /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */
1830  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
1831  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
1832 
1833  /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1834  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1835  {
1836  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1837  }
1838 
1839  /* Disable the UART DMA Rx request if enabled */
1840  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1841  {
1842  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1843 
1844  /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1845  if (huart->hdmarx != NULL)
1846  {
1847  /* Set the UART DMA Abort callback to Null.
1848  No call back execution at end of DMA abort procedure */
1849  huart->hdmarx->XferAbortCallback = NULL;
1850 
1851  if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1852  {
1853  if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1854  {
1855  /* Set error code to DMA */
1856  huart->ErrorCode = HAL_UART_ERROR_DMA;
1857 
1858  return HAL_TIMEOUT;
1859  }
1860  }
1861  }
1862  }
1863 
1864  /* Reset Rx transfer counter */
1865  huart->RxXferCount = 0U;
1866 
1867  /* Clear the Error flags in the ICR register */
1868  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1869 
1870  /* Discard the received data */
1871  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1872 
1873  /* Restore huart->RxState to Ready */
1874  huart->RxState = HAL_UART_STATE_READY;
1875  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1876 
1877  return HAL_OK;
1878 }
1879 
1894 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
1895 {
1896  uint32_t abortcplt = 1U;
1897 
1898  /* Disable interrupts */
1899  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE |
1900  USART_CR1_TXEIE_TXFNFIE));
1901  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1902 
1903  /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1904  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1905  {
1906  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1907  }
1908 
1909  /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
1910  before any call to DMA Abort functions */
1911  /* DMA Tx Handle is valid */
1912  if (huart->hdmatx != NULL)
1913  {
1914  /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
1915  Otherwise, set it to NULL */
1916  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1917  {
1918  huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
1919  }
1920  else
1921  {
1922  huart->hdmatx->XferAbortCallback = NULL;
1923  }
1924  }
1925  /* DMA Rx Handle is valid */
1926  if (huart->hdmarx != NULL)
1927  {
1928  /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
1929  Otherwise, set it to NULL */
1930  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1931  {
1932  huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
1933  }
1934  else
1935  {
1936  huart->hdmarx->XferAbortCallback = NULL;
1937  }
1938  }
1939 
1940  /* Disable the UART DMA Tx request if enabled */
1941  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1942  {
1943  /* Disable DMA Tx at UART level */
1944  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1945 
1946  /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
1947  if (huart->hdmatx != NULL)
1948  {
1949  /* UART Tx DMA Abort callback has already been initialised :
1950  will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
1951 
1952  /* Abort DMA TX */
1953  if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
1954  {
1955  huart->hdmatx->XferAbortCallback = NULL;
1956  }
1957  else
1958  {
1959  abortcplt = 0U;
1960  }
1961  }
1962  }
1963 
1964  /* Disable the UART DMA Rx request if enabled */
1965  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1966  {
1967  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1968 
1969  /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
1970  if (huart->hdmarx != NULL)
1971  {
1972  /* UART Rx DMA Abort callback has already been initialised :
1973  will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
1974 
1975  /* Abort DMA RX */
1976  if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
1977  {
1978  huart->hdmarx->XferAbortCallback = NULL;
1979  abortcplt = 1U;
1980  }
1981  else
1982  {
1983  abortcplt = 0U;
1984  }
1985  }
1986  }
1987 
1988  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
1989  if (abortcplt == 1U)
1990  {
1991  /* Reset Tx and Rx transfer counters */
1992  huart->TxXferCount = 0U;
1993  huart->RxXferCount = 0U;
1994 
1995  /* Clear ISR function pointers */
1996  huart->RxISR = NULL;
1997  huart->TxISR = NULL;
1998 
1999  /* Reset errorCode */
2000  huart->ErrorCode = HAL_UART_ERROR_NONE;
2001 
2002  /* Clear the Error flags in the ICR register */
2003  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2004 
2005  /* Flush the whole TX FIFO (if needed) */
2006  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2007  {
2008  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2009  }
2010 
2011  /* Discard the received data */
2012  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2013 
2014  /* Restore huart->gState and huart->RxState to Ready */
2015  huart->gState = HAL_UART_STATE_READY;
2016  huart->RxState = HAL_UART_STATE_READY;
2017  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2018 
2019  /* As no DMA to be aborted, call directly user Abort complete callback */
2020 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2021  /* Call registered Abort complete callback */
2022  huart->AbortCpltCallback(huart);
2023 #else
2024  /* Call legacy weak Abort complete callback */
2025  HAL_UART_AbortCpltCallback(huart);
2026 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2027  }
2028 
2029  return HAL_OK;
2030 }
2031 
2046 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
2047 {
2048  /* Disable interrupts */
2049  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
2050  CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
2051 
2052  /* Disable the UART DMA Tx request if enabled */
2053  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2054  {
2055  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2056 
2057  /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
2058  if (huart->hdmatx != NULL)
2059  {
2060  /* Set the UART DMA Abort callback :
2061  will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2062  huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
2063 
2064  /* Abort DMA TX */
2065  if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2066  {
2067  /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
2068  huart->hdmatx->XferAbortCallback(huart->hdmatx);
2069  }
2070  }
2071  else
2072  {
2073  /* Reset Tx transfer counter */
2074  huart->TxXferCount = 0U;
2075 
2076  /* Clear TxISR function pointers */
2077  huart->TxISR = NULL;
2078 
2079  /* Restore huart->gState to Ready */
2080  huart->gState = HAL_UART_STATE_READY;
2081 
2082  /* As no DMA to be aborted, call directly user Abort complete callback */
2083 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2084  /* Call registered Abort Transmit Complete Callback */
2085  huart->AbortTransmitCpltCallback(huart);
2086 #else
2087  /* Call legacy weak Abort Transmit Complete Callback */
2088  HAL_UART_AbortTransmitCpltCallback(huart);
2089 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2090  }
2091  }
2092  else
2093  {
2094  /* Reset Tx transfer counter */
2095  huart->TxXferCount = 0U;
2096 
2097  /* Clear TxISR function pointers */
2098  huart->TxISR = NULL;
2099 
2100  /* Flush the whole TX FIFO (if needed) */
2101  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2102  {
2103  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2104  }
2105 
2106  /* Restore huart->gState to Ready */
2107  huart->gState = HAL_UART_STATE_READY;
2108 
2109  /* As no DMA to be aborted, call directly user Abort complete callback */
2110 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2111  /* Call registered Abort Transmit Complete Callback */
2112  huart->AbortTransmitCpltCallback(huart);
2113 #else
2114  /* Call legacy weak Abort Transmit Complete Callback */
2115  HAL_UART_AbortTransmitCpltCallback(huart);
2116 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2117  }
2118 
2119  return HAL_OK;
2120 }
2121 
2136 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
2137 {
2138  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2139  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
2140  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2141 
2142  /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
2143  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
2144  {
2145  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
2146  }
2147 
2148  /* Disable the UART DMA Rx request if enabled */
2149  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2150  {
2151  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2152 
2153  /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2154  if (huart->hdmarx != NULL)
2155  {
2156  /* Set the UART DMA Abort callback :
2157  will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2158  huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
2159 
2160  /* Abort DMA RX */
2161  if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2162  {
2163  /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2164  huart->hdmarx->XferAbortCallback(huart->hdmarx);
2165  }
2166  }
2167  else
2168  {
2169  /* Reset Rx transfer counter */
2170  huart->RxXferCount = 0U;
2171 
2172  /* Clear RxISR function pointer */
2173  huart->pRxBuffPtr = NULL;
2174 
2175  /* Clear the Error flags in the ICR register */
2176  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2177 
2178  /* Discard the received data */
2179  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2180 
2181  /* Restore huart->RxState to Ready */
2182  huart->RxState = HAL_UART_STATE_READY;
2183  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2184 
2185  /* As no DMA to be aborted, call directly user Abort complete callback */
2186 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2187  /* Call registered Abort Receive Complete Callback */
2188  huart->AbortReceiveCpltCallback(huart);
2189 #else
2190  /* Call legacy weak Abort Receive Complete Callback */
2191  HAL_UART_AbortReceiveCpltCallback(huart);
2192 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2193  }
2194  }
2195  else
2196  {
2197  /* Reset Rx transfer counter */
2198  huart->RxXferCount = 0U;
2199 
2200  /* Clear RxISR function pointer */
2201  huart->pRxBuffPtr = NULL;
2202 
2203  /* Clear the Error flags in the ICR register */
2204  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2205 
2206  /* Restore huart->RxState to Ready */
2207  huart->RxState = HAL_UART_STATE_READY;
2208  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2209 
2210  /* As no DMA to be aborted, call directly user Abort complete callback */
2211 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2212  /* Call registered Abort Receive Complete Callback */
2213  huart->AbortReceiveCpltCallback(huart);
2214 #else
2215  /* Call legacy weak Abort Receive Complete Callback */
2216  HAL_UART_AbortReceiveCpltCallback(huart);
2217 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2218  }
2219 
2220  return HAL_OK;
2221 }
2222 
2228 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
2229 {
2230  uint32_t isrflags = READ_REG(huart->Instance->ISR);
2231  uint32_t cr1its = READ_REG(huart->Instance->CR1);
2232  uint32_t cr3its = READ_REG(huart->Instance->CR3);
2233 
2234  uint32_t errorflags;
2235  uint32_t errorcode;
2236 
2237  /* If no error occurs */
2238  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
2239  if (errorflags == 0U)
2240  {
2241  /* UART in mode Receiver ---------------------------------------------------*/
2242  if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2243  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2244  || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2245  {
2246  if (huart->RxISR != NULL)
2247  {
2248  huart->RxISR(huart);
2249  }
2250  return;
2251  }
2252  }
2253 
2254  /* If some errors occur */
2255  if ((errorflags != 0U)
2256  && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
2257  || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
2258  {
2259  /* UART parity error interrupt occurred -------------------------------------*/
2260  if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
2261  {
2262  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
2263 
2264  huart->ErrorCode |= HAL_UART_ERROR_PE;
2265  }
2266 
2267  /* UART frame error interrupt occurred --------------------------------------*/
2268  if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2269  {
2270  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
2271 
2272  huart->ErrorCode |= HAL_UART_ERROR_FE;
2273  }
2274 
2275  /* UART noise error interrupt occurred --------------------------------------*/
2276  if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2277  {
2278  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
2279 
2280  huart->ErrorCode |= HAL_UART_ERROR_NE;
2281  }
2282 
2283  /* UART Over-Run interrupt occurred -----------------------------------------*/
2284  if (((isrflags & USART_ISR_ORE) != 0U)
2285  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
2286  ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
2287  {
2288  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
2289 
2290  huart->ErrorCode |= HAL_UART_ERROR_ORE;
2291  }
2292 
2293  /* UART Receiver Timeout interrupt occurred ---------------------------------*/
2294  if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
2295  {
2296  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
2297 
2298  huart->ErrorCode |= HAL_UART_ERROR_RTO;
2299  }
2300 
2301  /* Call UART Error Call back function if need be ----------------------------*/
2302  if (huart->ErrorCode != HAL_UART_ERROR_NONE)
2303  {
2304  /* UART in mode Receiver --------------------------------------------------*/
2305  if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2306  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2307  || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2308  {
2309  if (huart->RxISR != NULL)
2310  {
2311  huart->RxISR(huart);
2312  }
2313  }
2314 
2315  /* If Error is to be considered as blocking :
2316  - Receiver Timeout error in Reception
2317  - Overrun error in Reception
2318  - any error occurs in DMA mode reception
2319  */
2320  errorcode = huart->ErrorCode;
2321  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
2322  ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
2323  {
2324  /* Blocking error : transfer is aborted
2325  Set the UART state ready to be able to start again the process,
2326  Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
2327  UART_EndRxTransfer(huart);
2328 
2329  /* Disable the UART DMA Rx request if enabled */
2330  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2331  {
2332  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2333 
2334  /* Abort the UART DMA Rx channel */
2335  if (huart->hdmarx != NULL)
2336  {
2337  /* Set the UART DMA Abort callback :
2338  will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
2339  huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
2340 
2341  /* Abort DMA RX */
2342  if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2343  {
2344  /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2345  huart->hdmarx->XferAbortCallback(huart->hdmarx);
2346  }
2347  }
2348  else
2349  {
2350  /* Call user error callback */
2351 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2352  /*Call registered error callback*/
2353  huart->ErrorCallback(huart);
2354 #else
2355  /*Call legacy weak error callback*/
2356  HAL_UART_ErrorCallback(huart);
2357 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2358 
2359  }
2360  }
2361  else
2362  {
2363  /* Call user error callback */
2364 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2365  /*Call registered error callback*/
2366  huart->ErrorCallback(huart);
2367 #else
2368  /*Call legacy weak error callback*/
2369  HAL_UART_ErrorCallback(huart);
2370 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2371  }
2372  }
2373  else
2374  {
2375  /* Non Blocking error : transfer could go on.
2376  Error is notified to user through user error callback */
2377 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2378  /*Call registered error callback*/
2379  huart->ErrorCallback(huart);
2380 #else
2381  /*Call legacy weak error callback*/
2382  HAL_UART_ErrorCallback(huart);
2383 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2384  huart->ErrorCode = HAL_UART_ERROR_NONE;
2385  }
2386  }
2387  return;
2388 
2389  } /* End if some error occurs */
2390 
2391  /* Check current reception Mode :
2392  If Reception till IDLE event has been selected : */
2393  if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
2394  && ((isrflags & USART_ISR_IDLE) != 0U)
2395  && ((cr1its & USART_ISR_IDLE) != 0U))
2396  {
2397  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
2398 
2399  /* Check if DMA mode is enabled in UART */
2400  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2401  {
2402  /* DMA mode enabled */
2403  /* Check received length : If all expected data are received, do nothing,
2404  (DMA cplt callback will be called).
2405  Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
2406  uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
2407  if ((nb_remaining_rx_data > 0U)
2408  && (nb_remaining_rx_data < huart->RxXferSize))
2409  {
2410  /* Reception is not complete */
2411  huart->RxXferCount = nb_remaining_rx_data;
2412 
2413  /* In Normal mode, end DMA xfer and HAL UART Rx process*/
2414  if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
2415  {
2416  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
2417  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
2418  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2419 
2420  /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
2421  in the UART CR3 register */
2422  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2423 
2424  /* At end of Rx process, restore huart->RxState to Ready */
2425  huart->RxState = HAL_UART_STATE_READY;
2426  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2427 
2428  CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2429 
2430  /* Last bytes received, so no need as the abort is immediate */
2431  (void)HAL_DMA_Abort(huart->hdmarx);
2432  }
2433 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2434  /*Call registered Rx Event callback*/
2435  huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2436 #else
2437  /*Call legacy weak Rx Event callback*/
2438  HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2439 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
2440  }
2441  return;
2442  }
2443  else
2444  {
2445  /* DMA mode not enabled */
2446  /* Check received length : If all expected data are received, do nothing.
2447  Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
2448  uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
2449  if ((huart->RxXferCount > 0U)
2450  && (nb_rx_data > 0U))
2451  {
2452  /* Disable the UART Parity Error Interrupt and RXNE interrupts */
2453  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
2454 
2455  /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
2456  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2457 
2458  /* Rx process is completed, restore huart->RxState to Ready */
2459  huart->RxState = HAL_UART_STATE_READY;
2460  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2461 
2462  /* Clear RxISR function pointer */
2463  huart->RxISR = NULL;
2464 
2465  CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2466 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2467  /*Call registered Rx complete callback*/
2468  huart->RxEventCallback(huart, nb_rx_data);
2469 #else
2470  /*Call legacy weak Rx Event callback*/
2471  HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
2472 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
2473  }
2474  return;
2475  }
2476  }
2477 
2478  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
2479  if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
2480  {
2481  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
2482 
2483  /* UART Rx state is not reset as a reception process might be ongoing.
2484  If UART handle state fields need to be reset to READY, this could be done in Wakeup callback */
2485 
2486 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2487  /* Call registered Wakeup Callback */
2488  huart->WakeupCallback(huart);
2489 #else
2490  /* Call legacy weak Wakeup Callback */
2491  HAL_UARTEx_WakeupCallback(huart);
2492 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2493  return;
2494  }
2495 
2496  /* UART in mode Transmitter ------------------------------------------------*/
2497  if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
2498  && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
2499  || ((cr3its & USART_CR3_TXFTIE) != 0U)))
2500  {
2501  if (huart->TxISR != NULL)
2502  {
2503  huart->TxISR(huart);
2504  }
2505  return;
2506  }
2507 
2508  /* UART in mode Transmitter (transmission end) -----------------------------*/
2509  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
2510  {
2511  UART_EndTransmit_IT(huart);
2512  return;
2513  }
2514 
2515  /* UART TX Fifo Empty occurred ----------------------------------------------*/
2516  if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
2517  {
2518 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2519  /* Call registered Tx Fifo Empty Callback */
2520  huart->TxFifoEmptyCallback(huart);
2521 #else
2522  /* Call legacy weak Tx Fifo Empty Callback */
2523  HAL_UARTEx_TxFifoEmptyCallback(huart);
2524 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2525  return;
2526  }
2527 
2528  /* UART RX Fifo Full occurred ----------------------------------------------*/
2529  if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
2530  {
2531 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2532  /* Call registered Rx Fifo Full Callback */
2533  huart->RxFifoFullCallback(huart);
2534 #else
2535  /* Call legacy weak Rx Fifo Full Callback */
2536  HAL_UARTEx_RxFifoFullCallback(huart);
2537 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2538  return;
2539  }
2540 }
2541 
2547 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
2548 {
2549  /* Prevent unused argument(s) compilation warning */
2550  UNUSED(huart);
2551 
2552  /* NOTE : This function should not be modified, when the callback is needed,
2553  the HAL_UART_TxCpltCallback can be implemented in the user file.
2554  */
2555 }
2556 
2562 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
2563 {
2564  /* Prevent unused argument(s) compilation warning */
2565  UNUSED(huart);
2566 
2567  /* NOTE: This function should not be modified, when the callback is needed,
2568  the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
2569  */
2570 }
2571 
2577 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
2578 {
2579  /* Prevent unused argument(s) compilation warning */
2580  UNUSED(huart);
2581 
2582  /* NOTE : This function should not be modified, when the callback is needed,
2583  the HAL_UART_RxCpltCallback can be implemented in the user file.
2584  */
2585 }
2586 
2592 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
2593 {
2594  /* Prevent unused argument(s) compilation warning */
2595  UNUSED(huart);
2596 
2597  /* NOTE: This function should not be modified, when the callback is needed,
2598  the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
2599  */
2600 }
2601 
2607 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
2608 {
2609  /* Prevent unused argument(s) compilation warning */
2610  UNUSED(huart);
2611 
2612  /* NOTE : This function should not be modified, when the callback is needed,
2613  the HAL_UART_ErrorCallback can be implemented in the user file.
2614  */
2615 }
2616 
2622 __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
2623 {
2624  /* Prevent unused argument(s) compilation warning */
2625  UNUSED(huart);
2626 
2627  /* NOTE : This function should not be modified, when the callback is needed,
2628  the HAL_UART_AbortCpltCallback can be implemented in the user file.
2629  */
2630 }
2631 
2637 __weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
2638 {
2639  /* Prevent unused argument(s) compilation warning */
2640  UNUSED(huart);
2641 
2642  /* NOTE : This function should not be modified, when the callback is needed,
2643  the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
2644  */
2645 }
2646 
2652 __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
2653 {
2654  /* Prevent unused argument(s) compilation warning */
2655  UNUSED(huart);
2656 
2657  /* NOTE : This function should not be modified, when the callback is needed,
2658  the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
2659  */
2660 }
2661 
2669 __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
2670 {
2671  /* Prevent unused argument(s) compilation warning */
2672  UNUSED(huart);
2673  UNUSED(Size);
2674 
2675  /* NOTE : This function should not be modified, when the callback is needed,
2676  the HAL_UARTEx_RxEventCallback can be implemented in the user file.
2677  */
2678 }
2679 
2717 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
2718 {
2719  if (!(IS_LPUART_INSTANCE(huart->Instance)))
2720  {
2721  assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue));
2722  MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue);
2723  }
2724 }
2725 
2732 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
2733 {
2734  if (!(IS_LPUART_INSTANCE(huart->Instance)))
2735  {
2736  if (huart->gState == HAL_UART_STATE_READY)
2737  {
2738  /* Process Locked */
2739  __HAL_LOCK(huart);
2740 
2741  huart->gState = HAL_UART_STATE_BUSY;
2742 
2743  /* Set the USART RTOEN bit */
2744  SET_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2745 
2746  huart->gState = HAL_UART_STATE_READY;
2747 
2748  /* Process Unlocked */
2749  __HAL_UNLOCK(huart);
2750 
2751  return HAL_OK;
2752  }
2753  else
2754  {
2755  return HAL_BUSY;
2756  }
2757  }
2758  else
2759  {
2760  return HAL_ERROR;
2761  }
2762 }
2763 
2770 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
2771 {
2772  if (!(IS_LPUART_INSTANCE(huart->Instance)))
2773  {
2774  if (huart->gState == HAL_UART_STATE_READY)
2775  {
2776  /* Process Locked */
2777  __HAL_LOCK(huart);
2778 
2779  huart->gState = HAL_UART_STATE_BUSY;
2780 
2781  /* Clear the USART RTOEN bit */
2782  CLEAR_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2783 
2784  huart->gState = HAL_UART_STATE_READY;
2785 
2786  /* Process Unlocked */
2787  __HAL_UNLOCK(huart);
2788 
2789  return HAL_OK;
2790  }
2791  else
2792  {
2793  return HAL_BUSY;
2794  }
2795  }
2796  else
2797  {
2798  return HAL_ERROR;
2799  }
2800 }
2801 
2808 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
2809 {
2810  __HAL_LOCK(huart);
2811 
2812  huart->gState = HAL_UART_STATE_BUSY;
2813 
2814  /* Enable USART mute mode by setting the MME bit in the CR1 register */
2815  SET_BIT(huart->Instance->CR1, USART_CR1_MME);
2816 
2817  huart->gState = HAL_UART_STATE_READY;
2818 
2819  return (UART_CheckIdleState(huart));
2820 }
2821 
2828 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
2829 {
2830  __HAL_LOCK(huart);
2831 
2832  huart->gState = HAL_UART_STATE_BUSY;
2833 
2834  /* Disable USART mute mode by clearing the MME bit in the CR1 register */
2835  CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
2836 
2837  huart->gState = HAL_UART_STATE_READY;
2838 
2839  return (UART_CheckIdleState(huart));
2840 }
2841 
2848 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
2849 {
2850  __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
2851 }
2852 
2858 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
2859 {
2860  __HAL_LOCK(huart);
2861  huart->gState = HAL_UART_STATE_BUSY;
2862 
2863  /* Clear TE and RE bits */
2864  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2865 
2866  /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
2867  SET_BIT(huart->Instance->CR1, USART_CR1_TE);
2868 
2869  huart->gState = HAL_UART_STATE_READY;
2870 
2871  __HAL_UNLOCK(huart);
2872 
2873  return HAL_OK;
2874 }
2875 
2881 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
2882 {
2883  __HAL_LOCK(huart);
2884  huart->gState = HAL_UART_STATE_BUSY;
2885 
2886  /* Clear TE and RE bits */
2887  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2888 
2889  /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
2890  SET_BIT(huart->Instance->CR1, USART_CR1_RE);
2891 
2892  huart->gState = HAL_UART_STATE_READY;
2893 
2894  __HAL_UNLOCK(huart);
2895 
2896  return HAL_OK;
2897 }
2898 
2899 
2905 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
2906 {
2907  /* Check the parameters */
2908  assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
2909 
2910  __HAL_LOCK(huart);
2911 
2912  huart->gState = HAL_UART_STATE_BUSY;
2913 
2914  /* Send break characters */
2915  __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST);
2916 
2917  huart->gState = HAL_UART_STATE_READY;
2918 
2919  __HAL_UNLOCK(huart);
2920 
2921  return HAL_OK;
2922 }
2923 
2950 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
2951 {
2952  uint32_t temp1;
2953  uint32_t temp2;
2954  temp1 = huart->gState;
2955  temp2 = huart->RxState;
2956 
2957  return (HAL_UART_StateTypeDef)(temp1 | temp2);
2958 }
2959 
2966 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
2967 {
2968  return huart->ErrorCode;
2969 }
2987 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2988 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
2989 {
2990  /* Init the UART Callback settings */
2991  huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
2992  huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
2993  huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
2994  huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
2995  huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
2996  huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
2997  huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
2998  huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
2999  huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
3000  huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
3001  huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
3002  huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */
3003 
3004 }
3005 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3006 
3012 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
3013 {
3014  uint32_t tmpreg;
3015  uint16_t brrtemp;
3016  UART_ClockSourceTypeDef clocksource;
3017  uint32_t usartdiv;
3018  HAL_StatusTypeDef ret = HAL_OK;
3019  uint32_t lpuart_ker_ck_pres;
3020  PLL2_ClocksTypeDef pll2_clocks;
3021  PLL3_ClocksTypeDef pll3_clocks;
3022  uint32_t pclk;
3023 
3024  /* Check the parameters */
3025  assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
3026  assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
3027  if (UART_INSTANCE_LOWPOWER(huart))
3028  {
3029  assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
3030  }
3031  else
3032  {
3033  assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
3034  assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
3035  }
3036 
3037  assert_param(IS_UART_PARITY(huart->Init.Parity));
3038  assert_param(IS_UART_MODE(huart->Init.Mode));
3039  assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
3040  assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
3041  assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler));
3042 
3043  /*-------------------------- USART CR1 Configuration -----------------------*/
3044  /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
3045  * the UART Word Length, Parity, Mode and oversampling:
3046  * set the M bits according to huart->Init.WordLength value
3047  * set PCE and PS bits according to huart->Init.Parity value
3048  * set TE and RE bits according to huart->Init.Mode value
3049  * set OVER8 bit according to huart->Init.OverSampling value */
3050  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
3051  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
3052 
3053  /*-------------------------- USART CR2 Configuration -----------------------*/
3054  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
3055  * to huart->Init.StopBits value */
3056  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
3057 
3058  /*-------------------------- USART CR3 Configuration -----------------------*/
3059  /* Configure
3060  * - UART HardWare Flow Control: set CTSE and RTSE bits according
3061  * to huart->Init.HwFlowCtl value
3062  * - one-bit sampling method versus three samples' majority rule according
3063  * to huart->Init.OneBitSampling (not applicable to LPUART) */
3064  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
3065 
3066  if (!(UART_INSTANCE_LOWPOWER(huart)))
3067  {
3068  tmpreg |= huart->Init.OneBitSampling;
3069  }
3070  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
3071 
3072  /*-------------------------- USART PRESC Configuration -----------------------*/
3073  /* Configure
3074  * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
3075  MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
3076 
3077  /*-------------------------- USART BRR Configuration -----------------------*/
3078  UART_GETCLOCKSOURCE(huart, clocksource);
3079 
3080  /* Check LPUART instance */
3081  if (UART_INSTANCE_LOWPOWER(huart))
3082  {
3083  /* Retrieve frequency clock */
3084  switch (clocksource)
3085  {
3086  case UART_CLOCKSOURCE_D3PCLK1:
3087  pclk = HAL_RCCEx_GetD3PCLK1Freq();
3088  break;
3089  case UART_CLOCKSOURCE_PLL2:
3090  HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
3091  pclk = pll2_clocks.PLL2_Q_Frequency;
3092  break;
3093  case UART_CLOCKSOURCE_PLL3:
3094  HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
3095  pclk = pll3_clocks.PLL3_Q_Frequency;
3096  break;
3097  case UART_CLOCKSOURCE_HSI:
3098  if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
3099  {
3100  pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
3101  }
3102  else
3103  {
3104  pclk = (uint32_t) HSI_VALUE;
3105  }
3106  break;
3107  case UART_CLOCKSOURCE_CSI:
3108  pclk = (uint32_t) CSI_VALUE;
3109  break;
3110  case UART_CLOCKSOURCE_LSE:
3111  pclk = (uint32_t) LSE_VALUE;
3112  break;
3113  default:
3114  pclk = 0U;
3115  ret = HAL_ERROR;
3116  break;
3117  }
3118 
3119  /* If proper clock source reported */
3120  if (pclk != 0U)
3121  {
3122  /* Compute clock after Prescaler */
3123  lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
3124 
3125  /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
3126  if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
3127  (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
3128  {
3129  ret = HAL_ERROR;
3130  }
3131  else
3132  {
3133  /* Check computed UsartDiv value is in allocated range
3134  (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
3135  usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3136  if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
3137  {
3138  huart->Instance->BRR = usartdiv;
3139  }
3140  else
3141  {
3142  ret = HAL_ERROR;
3143  }
3144  } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
3145  (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
3146  } /* if (pclk != 0) */
3147  }
3148  /* Check UART Over Sampling to set Baud Rate Register */
3149  else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
3150  {
3151  switch (clocksource)
3152  {
3153  case UART_CLOCKSOURCE_D2PCLK1:
3154  pclk = HAL_RCC_GetPCLK1Freq();
3155  break;
3156  case UART_CLOCKSOURCE_D2PCLK2:
3157  pclk = HAL_RCC_GetPCLK2Freq();
3158  break;
3159  case UART_CLOCKSOURCE_PLL2:
3160  HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
3161  pclk = pll2_clocks.PLL2_Q_Frequency;
3162  break;
3163  case UART_CLOCKSOURCE_PLL3:
3164  HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
3165  pclk = pll3_clocks.PLL3_Q_Frequency;
3166  break;
3167  case UART_CLOCKSOURCE_HSI:
3168  if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
3169  {
3170  pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
3171  }
3172  else
3173  {
3174  pclk = (uint32_t) HSI_VALUE;
3175  }
3176  break;
3177  case UART_CLOCKSOURCE_CSI:
3178  pclk = (uint32_t) CSI_VALUE;
3179  break;
3180  case UART_CLOCKSOURCE_LSE:
3181  pclk = (uint32_t) LSE_VALUE;
3182  break;
3183  default:
3184  pclk = 0U;
3185  ret = HAL_ERROR;
3186  break;
3187  }
3188 
3189  /* USARTDIV must be greater than or equal to 0d16 */
3190  if (pclk != 0U)
3191  {
3192  usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3193  if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3194  {
3195  brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
3196  brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
3197  huart->Instance->BRR = brrtemp;
3198  }
3199  else
3200  {
3201  ret = HAL_ERROR;
3202  }
3203  }
3204  }
3205  else
3206  {
3207  switch (clocksource)
3208  {
3209  case UART_CLOCKSOURCE_D2PCLK1:
3210  pclk = HAL_RCC_GetPCLK1Freq();
3211  break;
3212  case UART_CLOCKSOURCE_D2PCLK2:
3213  pclk = HAL_RCC_GetPCLK2Freq();
3214  break;
3215  case UART_CLOCKSOURCE_PLL2:
3216  HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
3217  pclk = pll2_clocks.PLL2_Q_Frequency;
3218  break;
3219  case UART_CLOCKSOURCE_PLL3:
3220  HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
3221  pclk = pll3_clocks.PLL3_Q_Frequency;
3222  break;
3223  case UART_CLOCKSOURCE_HSI:
3224  if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
3225  {
3226  pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
3227  }
3228  else
3229  {
3230  pclk = (uint32_t) HSI_VALUE;
3231  }
3232  break;
3233  case UART_CLOCKSOURCE_CSI:
3234  pclk = (uint32_t) CSI_VALUE;
3235  break;
3236  case UART_CLOCKSOURCE_LSE:
3237  pclk = (uint32_t) LSE_VALUE;
3238  break;
3239  default:
3240  pclk = 0U;
3241  ret = HAL_ERROR;
3242  break;
3243  }
3244 
3245  if (pclk != 0U)
3246  {
3247  /* USARTDIV must be greater than or equal to 0d16 */
3248  usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3249  if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3250  {
3251  huart->Instance->BRR = usartdiv;
3252  }
3253  else
3254  {
3255  ret = HAL_ERROR;
3256  }
3257  }
3258  }
3259 
3260  /* Initialize the number of data to process during RX/TX ISR execution */
3261  huart->NbTxDataToProcess = 1;
3262  huart->NbRxDataToProcess = 1;
3263 
3264  /* Clear ISR function pointers */
3265  huart->RxISR = NULL;
3266  huart->TxISR = NULL;
3267 
3268  return ret;
3269 }
3270 
3276 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
3277 {
3278  /* Check whether the set of advanced features to configure is properly set */
3279  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
3280 
3281  /* if required, configure TX pin active level inversion */
3282  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
3283  {
3284  assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
3285  MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
3286  }
3287 
3288  /* if required, configure RX pin active level inversion */
3289  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
3290  {
3291  assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
3292  MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
3293  }
3294 
3295  /* if required, configure data inversion */
3296  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
3297  {
3298  assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
3299  MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
3300  }
3301 
3302  /* if required, configure RX/TX pins swap */
3303  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
3304  {
3305  assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
3306  MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
3307  }
3308 
3309  /* if required, configure RX overrun detection disabling */
3310  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
3311  {
3312  assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
3313  MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
3314  }
3315 
3316  /* if required, configure DMA disabling on reception error */
3317  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
3318  {
3319  assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
3320  MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
3321  }
3322 
3323  /* if required, configure auto Baud rate detection scheme */
3324  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
3325  {
3326  assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
3327  assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
3328  MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
3329  /* set auto Baudrate detection parameters if detection is enabled */
3330  if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
3331  {
3332  assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
3333  MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
3334  }
3335  }
3336 
3337  /* if required, configure MSB first on communication line */
3338  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
3339  {
3340  assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
3341  MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
3342  }
3343 }
3344 
3350 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
3351 {
3352  uint32_t tickstart;
3353 
3354  /* Initialize the UART ErrorCode */
3355  huart->ErrorCode = HAL_UART_ERROR_NONE;
3356 
3357  /* Init tickstart for timeout management */
3358  tickstart = HAL_GetTick();
3359 
3360  /* Check if the Transmitter is enabled */
3361  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
3362  {
3363  /* Wait until TEACK flag is set */
3364  if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3365  {
3366  /* Timeout occurred */
3367  return HAL_TIMEOUT;
3368  }
3369  }
3370 
3371  /* Check if the Receiver is enabled */
3372  if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
3373  {
3374  /* Wait until REACK flag is set */
3375  if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3376  {
3377  /* Timeout occurred */
3378  return HAL_TIMEOUT;
3379  }
3380  }
3381 
3382  /* Initialize the UART State */
3383  huart->gState = HAL_UART_STATE_READY;
3384  huart->RxState = HAL_UART_STATE_READY;
3385  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3386 
3387  __HAL_UNLOCK(huart);
3388 
3389  return HAL_OK;
3390 }
3391 
3401 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
3402  uint32_t Tickstart, uint32_t Timeout)
3403 {
3404  /* Wait until flag is set */
3405  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
3406  {
3407  /* Check for the Timeout */
3408  if (Timeout != HAL_MAX_DELAY)
3409  {
3410  if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
3411  {
3412  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
3413  interrupts for the interrupt process */
3414  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
3415  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3416 
3417  huart->gState = HAL_UART_STATE_READY;
3418  huart->RxState = HAL_UART_STATE_READY;
3419 
3420  __HAL_UNLOCK(huart);
3421 
3422  return HAL_TIMEOUT;
3423  }
3424 
3425  if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
3426  {
3427  if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
3428  {
3429  /* Clear Receiver Timeout flag*/
3430  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
3431 
3432  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
3433  interrupts for the interrupt process */
3434  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
3435  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3436 
3437  huart->gState = HAL_UART_STATE_READY;
3438  huart->RxState = HAL_UART_STATE_READY;
3439  huart->ErrorCode = HAL_UART_ERROR_RTO;
3440 
3441  /* Process Unlocked */
3442  __HAL_UNLOCK(huart);
3443 
3444  return HAL_TIMEOUT;
3445  }
3446  }
3447  }
3448  }
3449  return HAL_OK;
3450 }
3451 
3463 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3464 {
3465  huart->pRxBuffPtr = pData;
3466  huart->RxXferSize = Size;
3467  huart->RxXferCount = Size;
3468  huart->RxISR = NULL;
3469 
3470  /* Computation of UART mask to apply to RDR register */
3471  UART_MASK_COMPUTATION(huart);
3472 
3473  huart->ErrorCode = HAL_UART_ERROR_NONE;
3474  huart->RxState = HAL_UART_STATE_BUSY_RX;
3475 
3476  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3477  SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3478 
3479  /* Configure Rx interrupt processing */
3480  if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
3481  {
3482  /* Set the Rx ISR function pointer according to the data word length */
3483  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3484  {
3485  huart->RxISR = UART_RxISR_16BIT_FIFOEN;
3486  }
3487  else
3488  {
3489  huart->RxISR = UART_RxISR_8BIT_FIFOEN;
3490  }
3491 
3492  __HAL_UNLOCK(huart);
3493 
3494  /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
3495  SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3496  SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
3497  }
3498  else
3499  {
3500  /* Set the Rx ISR function pointer according to the data word length */
3501  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3502  {
3503  huart->RxISR = UART_RxISR_16BIT;
3504  }
3505  else
3506  {
3507  huart->RxISR = UART_RxISR_8BIT;
3508  }
3509 
3510  __HAL_UNLOCK(huart);
3511 
3512  /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
3513  SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
3514  }
3515  return HAL_OK;
3516 }
3517 
3529 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3530 {
3531  huart->pRxBuffPtr = pData;
3532  huart->RxXferSize = Size;
3533 
3534  huart->ErrorCode = HAL_UART_ERROR_NONE;
3535  huart->RxState = HAL_UART_STATE_BUSY_RX;
3536 
3537  if (huart->hdmarx != NULL)
3538  {
3539  /* Set the UART DMA transfer complete callback */
3540  huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
3541 
3542  /* Set the UART DMA Half transfer complete callback */
3543  huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
3544 
3545  /* Set the DMA error callback */
3546  huart->hdmarx->XferErrorCallback = UART_DMAError;
3547 
3548  /* Set the DMA abort callback */
3549  huart->hdmarx->XferAbortCallback = NULL;
3550 
3551  /* Enable the DMA channel */
3552  if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
3553  {
3554  /* Set error code to DMA */
3555  huart->ErrorCode = HAL_UART_ERROR_DMA;
3556 
3557  __HAL_UNLOCK(huart);
3558 
3559  /* Restore huart->gState to ready */
3560  huart->gState = HAL_UART_STATE_READY;
3561 
3562  return HAL_ERROR;
3563  }
3564  }
3565  __HAL_UNLOCK(huart);
3566 
3567  /* Enable the UART Parity Error Interrupt */
3568  SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3569 
3570  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3571  SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3572 
3573  /* Enable the DMA transfer for the receiver request by setting the DMAR bit
3574  in the UART CR3 register */
3575  SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3576 
3577  return HAL_OK;
3578 }
3579 
3580 
3586 static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
3587 {
3588  /* Disable TXEIE, TCIE, TXFT interrupts */
3589  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
3590  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
3591 
3592  /* At end of Tx process, restore huart->gState to Ready */
3593  huart->gState = HAL_UART_STATE_READY;
3594 }
3595 
3596 
3602 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
3603 {
3604  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
3605  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3606  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3607 
3608  /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
3609  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3610  {
3611  CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3612  }
3613 
3614  /* At end of Rx process, restore huart->RxState to Ready */
3615  huart->RxState = HAL_UART_STATE_READY;
3616  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3617 
3618  /* Reset RxIsr function pointer */
3619  huart->RxISR = NULL;
3620 }
3621 
3622 
3628 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
3629 {
3630  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3631 
3632  /* DMA Normal mode */
3633  if (hdma->Init.Mode != DMA_CIRCULAR)
3634  {
3635  huart->TxXferCount = 0U;
3636 
3637  /* Disable the DMA transfer for transmit request by resetting the DMAT bit
3638  in the UART CR3 register */
3639  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
3640 
3641  /* Enable the UART Transmit Complete Interrupt */
3642  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3643  }
3644  /* DMA Circular mode */
3645  else
3646  {
3647 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3648  /*Call registered Tx complete callback*/
3649  huart->TxCpltCallback(huart);
3650 #else
3651  /*Call legacy weak Tx complete callback*/
3652  HAL_UART_TxCpltCallback(huart);
3653 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3654  }
3655 }
3656 
3662 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
3663 {
3664  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3665 
3666 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3667  /*Call registered Tx Half complete callback*/
3668  huart->TxHalfCpltCallback(huart);
3669 #else
3670  /*Call legacy weak Tx Half complete callback*/
3671  HAL_UART_TxHalfCpltCallback(huart);
3672 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3673 }
3674 
3680 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
3681 {
3682  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3683 
3684  /* DMA Normal mode */
3685  if (hdma->Init.Mode != DMA_CIRCULAR)
3686  {
3687  huart->RxXferCount = 0U;
3688 
3689  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
3690  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3691  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3692 
3693  /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
3694  in the UART CR3 register */
3695  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3696 
3697  /* At end of Rx process, restore huart->RxState to Ready */
3698  huart->RxState = HAL_UART_STATE_READY;
3699 
3700  /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */
3701  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3702  {
3703  CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3704  }
3705  }
3706 
3707  /* Check current reception Mode :
3708  If Reception till IDLE event has been selected : use Rx Event callback */
3709  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3710  {
3711 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3712  /*Call registered Rx Event callback*/
3713  huart->RxEventCallback(huart, huart->RxXferSize);
3714 #else
3715  /*Call legacy weak Rx Event callback*/
3716  HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
3717 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3718  }
3719  else
3720  {
3721  /* In other cases : use Rx Complete callback */
3722 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3723  /*Call registered Rx complete callback*/
3724  huart->RxCpltCallback(huart);
3725 #else
3726  /*Call legacy weak Rx complete callback*/
3727  HAL_UART_RxCpltCallback(huart);
3728 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3729  }
3730 }
3731 
3737 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
3738 {
3739  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3740 
3741  /* Check current reception Mode :
3742  If Reception till IDLE event has been selected : use Rx Event callback */
3743  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3744  {
3745 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3746  /*Call registered Rx Event callback*/
3747  huart->RxEventCallback(huart, huart->RxXferSize / 2U);
3748 #else
3749  /*Call legacy weak Rx Event callback*/
3750  HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U);
3751 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3752  }
3753  else
3754  {
3755  /* In other cases : use Rx Half Complete callback */
3756 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3757  /*Call registered Rx Half complete callback*/
3758  huart->RxHalfCpltCallback(huart);
3759 #else
3760  /*Call legacy weak Rx Half complete callback*/
3761  HAL_UART_RxHalfCpltCallback(huart);
3762 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3763  }
3764 }
3765 
3771 static void UART_DMAError(DMA_HandleTypeDef *hdma)
3772 {
3773  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3774 
3775  const HAL_UART_StateTypeDef gstate = huart->gState;
3776  const HAL_UART_StateTypeDef rxstate = huart->RxState;
3777 
3778  /* Stop UART DMA Tx request if ongoing */
3779  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
3780  (gstate == HAL_UART_STATE_BUSY_TX))
3781  {
3782  huart->TxXferCount = 0U;
3783  UART_EndTxTransfer(huart);
3784  }
3785 
3786  /* Stop UART DMA Rx request if ongoing */
3787  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
3788  (rxstate == HAL_UART_STATE_BUSY_RX))
3789  {
3790  huart->RxXferCount = 0U;
3791  UART_EndRxTransfer(huart);
3792  }
3793 
3794  huart->ErrorCode |= HAL_UART_ERROR_DMA;
3795 
3796 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3797  /*Call registered error callback*/
3798  huart->ErrorCallback(huart);
3799 #else
3800  /*Call legacy weak error callback*/
3801  HAL_UART_ErrorCallback(huart);
3802 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3803 }
3804 
3811 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
3812 {
3813  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3814  huart->RxXferCount = 0U;
3815  huart->TxXferCount = 0U;
3816 
3817 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3818  /*Call registered error callback*/
3819  huart->ErrorCallback(huart);
3820 #else
3821  /*Call legacy weak error callback*/
3822  HAL_UART_ErrorCallback(huart);
3823 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3824 }
3825 
3834 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
3835 {
3836  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3837 
3838  huart->hdmatx->XferAbortCallback = NULL;
3839 
3840  /* Check if an Abort process is still ongoing */
3841  if (huart->hdmarx != NULL)
3842  {
3843  if (huart->hdmarx->XferAbortCallback != NULL)
3844  {
3845  return;
3846  }
3847  }
3848 
3849  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3850  huart->TxXferCount = 0U;
3851  huart->RxXferCount = 0U;
3852 
3853  /* Reset errorCode */
3854  huart->ErrorCode = HAL_UART_ERROR_NONE;
3855 
3856  /* Clear the Error flags in the ICR register */
3857  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3858 
3859  /* Flush the whole TX FIFO (if needed) */
3860  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3861  {
3862  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3863  }
3864 
3865  /* Restore huart->gState and huart->RxState to Ready */
3866  huart->gState = HAL_UART_STATE_READY;
3867  huart->RxState = HAL_UART_STATE_READY;
3868  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3869 
3870  /* Call user Abort complete callback */
3871 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3872  /* Call registered Abort complete callback */
3873  huart->AbortCpltCallback(huart);
3874 #else
3875  /* Call legacy weak Abort complete callback */
3876  HAL_UART_AbortCpltCallback(huart);
3877 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3878 }
3879 
3880 
3889 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
3890 {
3891  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3892 
3893  huart->hdmarx->XferAbortCallback = NULL;
3894 
3895  /* Check if an Abort process is still ongoing */
3896  if (huart->hdmatx != NULL)
3897  {
3898  if (huart->hdmatx->XferAbortCallback != NULL)
3899  {
3900  return;
3901  }
3902  }
3903 
3904  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3905  huart->TxXferCount = 0U;
3906  huart->RxXferCount = 0U;
3907 
3908  /* Reset errorCode */
3909  huart->ErrorCode = HAL_UART_ERROR_NONE;
3910 
3911  /* Clear the Error flags in the ICR register */
3912  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3913 
3914  /* Discard the received data */
3915  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3916 
3917  /* Restore huart->gState and huart->RxState to Ready */
3918  huart->gState = HAL_UART_STATE_READY;
3919  huart->RxState = HAL_UART_STATE_READY;
3920  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3921 
3922  /* Call user Abort complete callback */
3923 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3924  /* Call registered Abort complete callback */
3925  huart->AbortCpltCallback(huart);
3926 #else
3927  /* Call legacy weak Abort complete callback */
3928  HAL_UART_AbortCpltCallback(huart);
3929 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3930 }
3931 
3932 
3941 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3942 {
3943  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3944 
3945  huart->TxXferCount = 0U;
3946 
3947  /* Flush the whole TX FIFO (if needed) */
3948  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3949  {
3950  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3951  }
3952 
3953  /* Restore huart->gState to Ready */
3954  huart->gState = HAL_UART_STATE_READY;
3955 
3956  /* Call user Abort complete callback */
3957 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3958  /* Call registered Abort Transmit Complete Callback */
3959  huart->AbortTransmitCpltCallback(huart);
3960 #else
3961  /* Call legacy weak Abort Transmit Complete Callback */
3962  HAL_UART_AbortTransmitCpltCallback(huart);
3963 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3964 }
3965 
3974 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3975 {
3976  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3977 
3978  huart->RxXferCount = 0U;
3979 
3980  /* Clear the Error flags in the ICR register */
3981  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3982 
3983  /* Discard the received data */
3984  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3985 
3986  /* Restore huart->RxState to Ready */
3987  huart->RxState = HAL_UART_STATE_READY;
3988  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3989 
3990  /* Call user Abort complete callback */
3991 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3992  /* Call registered Abort Receive Complete Callback */
3993  huart->AbortReceiveCpltCallback(huart);
3994 #else
3995  /* Call legacy weak Abort Receive Complete Callback */
3996  HAL_UART_AbortReceiveCpltCallback(huart);
3997 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3998 }
3999 
4007 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
4008 {
4009  /* Check that a Tx process is ongoing */
4010  if (huart->gState == HAL_UART_STATE_BUSY_TX)
4011  {
4012  if (huart->TxXferCount == 0U)
4013  {
4014  /* Disable the UART Transmit Data Register Empty Interrupt */
4015  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
4016 
4017  /* Enable the UART Transmit Complete Interrupt */
4018  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4019  }
4020  else
4021  {
4022  huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
4023  huart->pTxBuffPtr++;
4024  huart->TxXferCount--;
4025  }
4026  }
4027 }
4028 
4036 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
4037 {
4038  uint16_t *tmp;
4039 
4040  /* Check that a Tx process is ongoing */
4041  if (huart->gState == HAL_UART_STATE_BUSY_TX)
4042  {
4043  if (huart->TxXferCount == 0U)
4044  {
4045  /* Disable the UART Transmit Data Register Empty Interrupt */
4046  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
4047 
4048  /* Enable the UART Transmit Complete Interrupt */
4049  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4050  }
4051  else
4052  {
4053  tmp = (uint16_t *) huart->pTxBuffPtr;
4054  huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
4055  huart->pTxBuffPtr += 2U;
4056  huart->TxXferCount--;
4057  }
4058  }
4059 }
4060 
4068 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4069 {
4070  uint16_t nb_tx_data;
4071 
4072  /* Check that a Tx process is ongoing */
4073  if (huart->gState == HAL_UART_STATE_BUSY_TX)
4074  {
4075  for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
4076  {
4077  if (huart->TxXferCount == 0U)
4078  {
4079  /* Disable the TX FIFO threshold interrupt */
4080  CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
4081 
4082  /* Enable the UART Transmit Complete Interrupt */
4083  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4084 
4085  break; /* force exit loop */
4086  }
4087  else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
4088  {
4089  huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
4090  huart->pTxBuffPtr++;
4091  huart->TxXferCount--;
4092  }
4093  else
4094  {
4095  /* Nothing to do */
4096  }
4097  }
4098  }
4099 }
4100 
4108 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4109 {
4110  uint16_t *tmp;
4111  uint16_t nb_tx_data;
4112 
4113  /* Check that a Tx process is ongoing */
4114  if (huart->gState == HAL_UART_STATE_BUSY_TX)
4115  {
4116  for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
4117  {
4118  if (huart->TxXferCount == 0U)
4119  {
4120  /* Disable the TX FIFO threshold interrupt */
4121  CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
4122 
4123  /* Enable the UART Transmit Complete Interrupt */
4124  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4125 
4126  break; /* force exit loop */
4127  }
4128  else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
4129  {
4130  tmp = (uint16_t *) huart->pTxBuffPtr;
4131  huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
4132  huart->pTxBuffPtr += 2U;
4133  huart->TxXferCount--;
4134  }
4135  else
4136  {
4137  /* Nothing to do */
4138  }
4139  }
4140  }
4141 }
4142 
4149 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
4150 {
4151  /* Disable the UART Transmit Complete Interrupt */
4152  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4153 
4154  /* Tx process is ended, restore huart->gState to Ready */
4155  huart->gState = HAL_UART_STATE_READY;
4156 
4157  /* Cleat TxISR function pointer */
4158  huart->TxISR = NULL;
4159 
4160 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4161  /*Call registered Tx complete callback*/
4162  huart->TxCpltCallback(huart);
4163 #else
4164  /*Call legacy weak Tx complete callback*/
4165  HAL_UART_TxCpltCallback(huart);
4166 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4167 }
4168 
4174 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
4175 {
4176  uint16_t uhMask = huart->Mask;
4177  uint16_t uhdata;
4178 
4179  /* Check that a Rx process is ongoing */
4180  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4181  {
4182  uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4183  *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4184  huart->pRxBuffPtr++;
4185  huart->RxXferCount--;
4186 
4187  if (huart->RxXferCount == 0U)
4188  {
4189  /* Disable the UART Parity Error Interrupt and RXNE interrupts */
4190  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4191 
4192  /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
4193  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4194 
4195  /* Rx process is completed, restore huart->RxState to Ready */
4196  huart->RxState = HAL_UART_STATE_READY;
4197 
4198  /* Clear RxISR function pointer */
4199  huart->RxISR = NULL;
4200 
4201  /* Check current reception Mode :
4202  If Reception till IDLE event has been selected : */
4203  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4204  {
4205  /* Disable IDLE interrupt */
4206  CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4207 
4208 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4209  /*Call registered Rx Event callback*/
4210  huart->RxEventCallback(huart, huart->RxXferSize);
4211 #else
4212  /*Call legacy weak Rx Event callback*/
4213  HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4214 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4215  }
4216  else
4217  {
4218  /* Standard reception API called */
4219 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4220  /*Call registered Rx complete callback*/
4221  huart->RxCpltCallback(huart);
4222 #else
4223  /*Call legacy weak Rx complete callback*/
4224  HAL_UART_RxCpltCallback(huart);
4225 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4226  }
4227  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4228  }
4229  }
4230  else
4231  {
4232  /* Clear RXNE interrupt flag */
4233  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4234  }
4235 }
4236 
4244 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
4245 {
4246  uint16_t *tmp;
4247  uint16_t uhMask = huart->Mask;
4248  uint16_t uhdata;
4249 
4250  /* Check that a Rx process is ongoing */
4251  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4252  {
4253  uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4254  tmp = (uint16_t *) huart->pRxBuffPtr ;
4255  *tmp = (uint16_t)(uhdata & uhMask);
4256  huart->pRxBuffPtr += 2U;
4257  huart->RxXferCount--;
4258 
4259  if (huart->RxXferCount == 0U)
4260  {
4261  /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
4262  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4263 
4264  /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
4265  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4266 
4267  /* Rx process is completed, restore huart->RxState to Ready */
4268  huart->RxState = HAL_UART_STATE_READY;
4269 
4270  /* Clear RxISR function pointer */
4271  huart->RxISR = NULL;
4272 
4273  /* Check current reception Mode :
4274  If Reception till IDLE event has been selected : */
4275  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4276  {
4277  /* Disable IDLE interrupt */
4278  CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4279 
4280 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4281  /*Call registered Rx Event callback*/
4282  huart->RxEventCallback(huart, huart->RxXferSize);
4283 #else
4284  /*Call legacy weak Rx Event callback*/
4285  HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4286 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4287  }
4288  else
4289  {
4290  /* Standard reception API called */
4291 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4292  /*Call registered Rx complete callback*/
4293  huart->RxCpltCallback(huart);
4294 #else
4295  /*Call legacy weak Rx complete callback*/
4296  HAL_UART_RxCpltCallback(huart);
4297 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4298  }
4299  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4300  }
4301  }
4302  else
4303  {
4304  /* Clear RXNE interrupt flag */
4305  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4306  }
4307 }
4308 
4316 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4317 {
4318  uint16_t uhMask = huart->Mask;
4319  uint16_t uhdata;
4320  uint16_t nb_rx_data;
4321  uint16_t rxdatacount;
4322  uint32_t isrflags = READ_REG(huart->Instance->ISR);
4323  uint32_t cr1its = READ_REG(huart->Instance->CR1);
4324  uint32_t cr3its = READ_REG(huart->Instance->CR3);
4325 
4326  /* Check that a Rx process is ongoing */
4327  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4328  {
4329  nb_rx_data = huart->NbRxDataToProcess;
4330  while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
4331  {
4332  uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4333  *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4334  huart->pRxBuffPtr++;
4335  huart->RxXferCount--;
4336  isrflags = READ_REG(huart->Instance->ISR);
4337 
4338  /* If some non blocking errors occurred */
4339  if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
4340  {
4341  /* UART parity error interrupt occurred -------------------------------------*/
4342  if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
4343  {
4344  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
4345 
4346  huart->ErrorCode |= HAL_UART_ERROR_PE;
4347  }
4348 
4349  /* UART frame error interrupt occurred --------------------------------------*/
4350  if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4351  {
4352  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
4353 
4354  huart->ErrorCode |= HAL_UART_ERROR_FE;
4355  }
4356 
4357  /* UART noise error interrupt occurred --------------------------------------*/
4358  if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4359  {
4360  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
4361 
4362  huart->ErrorCode |= HAL_UART_ERROR_NE;
4363  }
4364 
4365  /* Call UART Error Call back function if need be ----------------------------*/
4366  if (huart->ErrorCode != HAL_UART_ERROR_NONE)
4367  {
4368  /* Non Blocking error : transfer could go on.
4369  Error is notified to user through user error callback */
4370 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4371  /*Call registered error callback*/
4372  huart->ErrorCallback(huart);
4373 #else
4374  /*Call legacy weak error callback*/
4375  HAL_UART_ErrorCallback(huart);
4376 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4377  huart->ErrorCode = HAL_UART_ERROR_NONE;
4378  }
4379  }
4380 
4381  if (huart->RxXferCount == 0U)
4382  {
4383  /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4384  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4385 
4386  /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
4387  and RX FIFO Threshold interrupt */
4388  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4389 
4390  /* Rx process is completed, restore huart->RxState to Ready */
4391  huart->RxState = HAL_UART_STATE_READY;
4392 
4393  /* Clear RxISR function pointer */
4394  huart->RxISR = NULL;
4395 
4396  /* Check current reception Mode :
4397  If Reception till IDLE event has been selected : */
4398  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4399  {
4400  /* Disable IDLE interrupt */
4401  CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4402 
4403 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4404  /*Call registered Rx Event callback*/
4405  huart->RxEventCallback(huart, huart->RxXferSize);
4406 #else
4407  /*Call legacy weak Rx Event callback*/
4408  HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4409 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4410  }
4411  else
4412  {
4413  /* Standard reception API called */
4414 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4415  /*Call registered Rx complete callback*/
4416  huart->RxCpltCallback(huart);
4417 #else
4418  /*Call legacy weak Rx complete callback*/
4419  HAL_UART_RxCpltCallback(huart);
4420 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4421  }
4422  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4423  }
4424  }
4425 
4426  /* When remaining number of bytes to receive is less than the RX FIFO
4427  threshold, next incoming frames are processed as if FIFO mode was
4428  disabled (i.e. one interrupt per received frame).
4429  */
4430  rxdatacount = huart->RxXferCount;
4431  if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4432  {
4433  /* Disable the UART RXFT interrupt*/
4434  CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4435 
4436  /* Update the RxISR function pointer */
4437  huart->RxISR = UART_RxISR_8BIT;
4438 
4439  /* Enable the UART Data Register Not Empty interrupt */
4440  SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4441  }
4442  }
4443  else
4444  {
4445  /* Clear RXNE interrupt flag */
4446  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4447  }
4448 }
4449 
4457 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4458 {
4459  uint16_t *tmp;
4460  uint16_t uhMask = huart->Mask;
4461  uint16_t uhdata;
4462  uint16_t nb_rx_data;
4463  uint16_t rxdatacount;
4464  uint32_t isrflags = READ_REG(huart->Instance->ISR);
4465  uint32_t cr1its = READ_REG(huart->Instance->CR1);
4466  uint32_t cr3its = READ_REG(huart->Instance->CR3);
4467 
4468  /* Check that a Rx process is ongoing */
4469  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4470  {
4471  nb_rx_data = huart->NbRxDataToProcess;
4472  while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
4473  {
4474  uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4475  tmp = (uint16_t *) huart->pRxBuffPtr ;
4476  *tmp = (uint16_t)(uhdata & uhMask);
4477  huart->pRxBuffPtr += 2U;
4478  huart->RxXferCount--;
4479  isrflags = READ_REG(huart->Instance->ISR);
4480 
4481  /* If some non blocking errors occurred */
4482  if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
4483  {
4484  /* UART parity error interrupt occurred -------------------------------------*/
4485  if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
4486  {
4487  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
4488 
4489  huart->ErrorCode |= HAL_UART_ERROR_PE;
4490  }
4491 
4492  /* UART frame error interrupt occurred --------------------------------------*/
4493  if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4494  {
4495  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
4496 
4497  huart->ErrorCode |= HAL_UART_ERROR_FE;
4498  }
4499 
4500  /* UART noise error interrupt occurred --------------------------------------*/
4501  if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4502  {
4503  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
4504 
4505  huart->ErrorCode |= HAL_UART_ERROR_NE;
4506  }
4507 
4508  /* Call UART Error Call back function if need be ----------------------------*/
4509  if (huart->ErrorCode != HAL_UART_ERROR_NONE)
4510  {
4511  /* Non Blocking error : transfer could go on.
4512  Error is notified to user through user error callback */
4513 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4514  /*Call registered error callback*/
4515  huart->ErrorCallback(huart);
4516 #else
4517  /*Call legacy weak error callback*/
4518  HAL_UART_ErrorCallback(huart);
4519 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4520  huart->ErrorCode = HAL_UART_ERROR_NONE;
4521  }
4522  }
4523 
4524  if (huart->RxXferCount == 0U)
4525  {
4526  /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4527  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4528 
4529  /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
4530  and RX FIFO Threshold interrupt */
4531  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4532 
4533  /* Rx process is completed, restore huart->RxState to Ready */
4534  huart->RxState = HAL_UART_STATE_READY;
4535 
4536  /* Clear RxISR function pointer */
4537  huart->RxISR = NULL;
4538 
4539  /* Check current reception Mode :
4540  If Reception till IDLE event has been selected : */
4541  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4542  {
4543  /* Disable IDLE interrupt */
4544  CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4545 
4546 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4547  /*Call registered Rx Event callback*/
4548  huart->RxEventCallback(huart, huart->RxXferSize);
4549 #else
4550  /*Call legacy weak Rx Event callback*/
4551  HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4552 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4553  }
4554  else
4555  {
4556  /* Standard reception API called */
4557 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4558  /*Call registered Rx complete callback*/
4559  huart->RxCpltCallback(huart);
4560 #else
4561  /*Call legacy weak Rx complete callback*/
4562  HAL_UART_RxCpltCallback(huart);
4563 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4564  }
4565  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4566  }
4567  }
4568 
4569  /* When remaining number of bytes to receive is less than the RX FIFO
4570  threshold, next incoming frames are processed as if FIFO mode was
4571  disabled (i.e. one interrupt per received frame).
4572  */
4573  rxdatacount = huart->RxXferCount;
4574  if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4575  {
4576  /* Disable the UART RXFT interrupt*/
4577  CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4578 
4579  /* Update the RxISR function pointer */
4580  huart->RxISR = UART_RxISR_16BIT;
4581 
4582  /* Enable the UART Data Register Not Empty interrupt */
4583  SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4584  }
4585  }
4586  else
4587  {
4588  /* Clear RXNE interrupt flag */
4589  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4590  }
4591 }
4592 
4597 #endif /* HAL_UART_MODULE_ENABLED */
4598 
4606 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_UART_ErrorCallback
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
IS_UART_OVERRUN
#define IS_UART_OVERRUN(__OVERRUN__)
Ensure that UART frame overrun setting is valid.
Definition: stm32f7xx_hal_uart.h:1327
USART_ISR_RTOF
#define USART_ISR_RTOF
Definition: stm32f769xx.h:15500
assert_param
#define assert_param(expr)
Include module's header file.
Definition: stm32f407/stm32f407g-disc1/Inc/stm32f4xx_hal_conf.h:353
UART_ADVFEATURE_AUTOBAUDRATE_ENABLE
#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE
Definition: stm32f7xx_hal_uart.h:542
HAL_UART_Transmit_IT
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_CLEAR_PEF
#define UART_CLEAR_PEF
Definition: stm32f7xx_hal_uart.h:723
USART_CR1_TXEIE_TXFNFIE
#define USART_CR1_TXEIE_TXFNFIE
Definition: stm32h735xx.h:21391
__UART_HandleTypeDef::TxISR
void(* TxISR)(struct __UART_HandleTypeDef *huart)
Definition: stm32f7xx_hal_uart.h:209
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
USART_ISR_RXFF
#define USART_ISR_RXFF
Definition: stm32h735xx.h:21725
USART_CR2_ABREN
#define USART_CR2_ABREN
Definition: stm32f769xx.h:15342
HAL_UART_TxCpltCallback
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
__UART_HandleTypeDef::Init
UART_InitTypeDef Init
Definition: stm32f4xx_hal_uart.h:145
HAL_UART_StateTypeDef
HAL_UART_StateTypeDef
HAL UART State structures definition.
Definition: stm32f4xx_hal_uart.h:117
__UART_HandleTypeDef::NbRxDataToProcess
uint16_t NbRxDataToProcess
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:237
HAL_UART_AbortReceive
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
UARTPrescTable
const uint16_t UARTPrescTable[12]
USART_CR3_DDRE
#define USART_CR3_DDRE
Definition: stm32f769xx.h:15397
__UART_HandleTypeDef::NbTxDataToProcess
uint16_t NbTxDataToProcess
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:239
HAL_UART_ERROR_NE
#define HAL_UART_ERROR_NE
Definition: stm32f4xx_hal_uart.h:233
HAL_LIN_SendBreak
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
HAL_UART_Transmit
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
__DMA_HandleTypeDef::XferHalfCpltCallback
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:153
IS_UART_HWFLOW_INSTANCE
#define IS_UART_HWFLOW_INSTANCE(INSTANCE)
Definition: stm32f407xx.h:15483
PLL3_ClocksTypeDef::PLL3_Q_Frequency
uint32_t PLL3_Q_Frequency
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h:134
HAL_UART_ERROR_FE
#define HAL_UART_ERROR_FE
Definition: stm32f4xx_hal_uart.h:234
USART_CR3_SCEN
#define USART_CR3_SCEN
Definition: stm32f407xx.h:12600
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
NULL
#define NULL
Definition: porcupine/demo/c/dr_libs/tests/external/miniaudio/extras/speex_resampler/thirdparty/resample.c:92
HAL_UART_Transmit_DMA
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_INSTANCE_LOWPOWER
#define UART_INSTANCE_LOWPOWER(__HANDLE__)
Check whether or not UART instance is Low Power UART.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:1265
USART_CR2_SWAP
#define USART_CR2_SWAP
Definition: stm32f769xx.h:15327
USART_TypeDef::TDR
__IO uint32_t TDR
Definition: stm32f769xx.h:1018
USART_CR2_ABRMODE
#define USART_CR2_ABRMODE
Definition: stm32f769xx.h:15345
IS_UART_HALFDUPLEX_INSTANCE
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE)
Definition: stm32f407xx.h:15472
HAL_DMA_ERROR_TIMEOUT
#define HAL_DMA_ERROR_TIMEOUT
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:190
USART_CR2_MSBFIRST
#define USART_CR2_MSBFIRST
Definition: stm32f769xx.h:15339
IS_UART_ADVFEATURE_MSBFIRST
#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__)
Ensure that UART frame MSB first setting is valid.
Definition: stm32f7xx_hal_uart.h:1351
USART_CR2_ADD
#define USART_CR2_ADD
Definition: stm32f407xx.h:12552
USART_CR1_TXFEIE
#define USART_CR1_TXFEIE
Definition: stm32h735xx.h:21449
UART_CLEAR_RTOF
#define UART_CLEAR_RTOF
Definition: stm32f7xx_hal_uart.h:735
USART_CR1_MME
#define USART_CR1_MME
Definition: stm32f769xx.h:15260
IS_UART_ADVFEATURE_AUTOBAUDRATE
#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__)
Ensure that UART auto Baud rate state is valid.
Definition: stm32f7xx_hal_uart.h:1335
HAL_UNLOCKED
@ HAL_UNLOCKED
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:53
UART_ADVFEATURE_MSBFIRST_INIT
#define UART_ADVFEATURE_MSBFIRST_INIT
Definition: stm32f7xx_hal_uart.h:488
USART_ISR_WUF
#define USART_ISR_WUF
Definition: stm32f769xx.h:15524
UART_InitTypeDef::OneBitSampling
uint32_t OneBitSampling
Definition: stm32f7xx_hal_uart.h:82
UART_FLAG_TC
#define UART_FLAG_TC
Definition: stm32f4xx_hal_uart.h:337
USART_CR3_HDSEL
#define USART_CR3_HDSEL
Definition: stm32f407xx.h:12594
RCC_FLAG_HSIDIV
#define RCC_FLAG_HSIDIV
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:652
huart
UART_HandleTypeDef huart
Definition: pv_stm32f469.c:31
HAL_UART_ERROR_RTO
#define HAL_UART_ERROR_RTO
Definition: stm32f7xx_hal_uart.h:313
HAL_DMA_Abort_IT
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
UART_CLEAR_IDLEF
#define UART_CLEAR_IDLEF
Definition: stm32f7xx_hal_uart.h:727
IS_UART_MODE
#define IS_UART_MODE(MODE)
Definition: stm32f4xx_hal_uart.h:788
UART_CLEAR_TCF
#define UART_CLEAR_TCF
Definition: stm32f7xx_hal_uart.h:728
UART_InitTypeDef::OverSampling
uint32_t OverSampling
Definition: stm32f4xx_hal_uart.h:74
UART_ADVFEATURE_NO_INIT
#define UART_ADVFEATURE_NO_INIT
Definition: stm32f7xx_hal_uart.h:480
IS_UART_RECEIVER_TIMEOUT_VALUE
#define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__)
Check the receiver timeout value.
Definition: stm32f7xx_hal_uart.h:1214
__UART_HandleTypeDef::TxXferCount
__IO uint16_t TxXferCount
Definition: stm32f4xx_hal_uart.h:151
HAL_UART_DMAStop
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
USART_ISR_RXNE_RXFNE
#define USART_ISR_RXNE_RXFNE
Definition: stm32h735xx.h:21668
UART_AdvFeatureConfig
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
HAL_RCCEx_GetD3PCLK1Freq
uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
HAL_UART_Abort_IT
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
HAL_RCC_GetPCLK2Freq
uint32_t HAL_RCC_GetPCLK2Freq(void)
__DMA_HandleTypeDef::XferAbortCallback
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:161
UART_InitTypeDef::ClockPrescaler
uint32_t ClockPrescaler
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:95
UART_InitTypeDef::WordLength
uint32_t WordLength
Definition: stm32f4xx_hal_uart.h:55
HAL_MultiProcessor_EnableMuteMode
HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
__UART_HandleTypeDef
UART handle Structure definition.
Definition: stm32f4xx_hal_uart.h:141
USART_CR2_TXINV
#define USART_CR2_TXINV
Definition: stm32f769xx.h:15333
__HAL_UART_ENABLE
#define __HAL_UART_ENABLE(__HANDLE__)
Enable UART.
Definition: stm32f4xx_hal_uart.h:652
USART_CR3_OVRDIS
#define USART_CR3_OVRDIS
Definition: stm32f769xx.h:15394
UART_InitTypeDef::BaudRate
uint32_t BaudRate
Definition: stm32f4xx_hal_uart.h:49
USART_CR3_DMAT
#define USART_CR3_DMAT
Definition: stm32f407xx.h:12606
UART_DIV_LPUART
#define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__)
BRR division operation to set BRR register with LPUART.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:1238
UART_ADVFEATURE_RXINVERT_INIT
#define UART_ADVFEATURE_RXINVERT_INIT
Definition: stm32f7xx_hal_uart.h:482
__DMA_HandleTypeDef::Init
DMA_InitTypeDef Init
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:143
UART_AdvFeatureInitTypeDef::RxPinLevelInvert
uint32_t RxPinLevelInvert
Definition: stm32f7xx_hal_uart.h:101
USART_TypeDef::CR1
__IO uint32_t CR1
Definition: stm32f407xx.h:763
HAL_ERROR
@ HAL_ERROR
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:43
UART_WORDLENGTH_9B
#define UART_WORDLENGTH_9B
Definition: stm32f4xx_hal_uart.h:248
__HAL_UART_GET_FLAG
#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__)
Checks whether the specified UART flag is set or not.
Definition: stm32f4xx_hal_uart.h:426
__HAL_UART_DISABLE
#define __HAL_UART_DISABLE(__HANDLE__)
Disable UART.
Definition: stm32f4xx_hal_uart.h:658
CLEAR_BIT
#define CLEAR_BIT(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:214
HAL_GetTick
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:323
UART_CLOCKSOURCE_PLL2
@ UART_CLOCKSOURCE_PLL2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:190
HAL_UART_DisableReceiverTimeout
HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
USART_ISR_FE
#define USART_ISR_FE
Definition: stm32f769xx.h:15470
IS_UART_WAKEUPMETHOD
#define IS_UART_WAKEUPMETHOD(WAKEUP)
Definition: stm32f4xx_hal_uart.h:796
DMA_CIRCULAR
#define DMA_CIRCULAR
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:282
USART_CR1_RTOIE
#define USART_CR1_RTOIE
Definition: stm32f769xx.h:15285
HAL_UART_ERROR_PE
#define HAL_UART_ERROR_PE
Definition: stm32f4xx_hal_uart.h:232
UART_CR2_ADDRESS_LSB_POS
#define UART_CR2_ADDRESS_LSB_POS
Definition: stm32f7xx_hal_uart.h:588
HAL_MultiProcessor_DisableMuteMode
HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
HAL_UART_DMAResume
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
UART_CLOCKSOURCE_HSI
@ UART_CLOCKSOURCE_HSI
Definition: stm32f7xx_hal_uart.h:176
HAL_UARTEx_RxEventCallback
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
USART_ISR_ORE
#define USART_ISR_ORE
Definition: stm32f769xx.h:15476
HAL_UART_STATE_BUSY_TX
@ HAL_UART_STATE_BUSY_TX
Definition: stm32f4xx_hal_uart.h:125
HAL_UART_MspInit
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
UART MSP Initialization This function configures the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:320
USART_TypeDef::RTOR
__IO uint32_t RTOR
Definition: stm32f769xx.h:1013
UART_ADVFEATURE_DATAINVERT_INIT
#define UART_ADVFEATURE_DATAINVERT_INIT
Definition: stm32f7xx_hal_uart.h:483
UART_HWCONTROL_NONE
#define UART_HWCONTROL_NONE
Definition: stm32f4xx_hal_uart.h:275
HAL_UART_RECEPTION_STANDARD
#define HAL_UART_RECEPTION_STANDARD
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:815
HAL_OK
@ HAL_OK
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:42
USART_CR1_RXNEIE_RXFNEIE
#define USART_CR1_RXNEIE_RXFNEIE
Definition: stm32h735xx.h:21385
UART_InitTypeDef::StopBits
uint32_t StopBits
Definition: stm32f4xx_hal_uart.h:58
IS_UART_PRESCALER
#define IS_UART_PRESCALER(__CLOCKPRESCALER__)
Ensure that UART Prescaler is valid.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:1558
UART_OVERSAMPLING_8
#define UART_OVERSAMPLING_8
Definition: stm32f4xx_hal_uart.h:306
HAL_UART_ReceiverTimeout_Config
void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
HAL_HalfDuplex_EnableReceiver
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
IS_UART_ADVFEATURE_SWAP
#define IS_UART_ADVFEATURE_SWAP(__SWAP__)
Ensure that UART frame RX/TX pins swap setting is valid.
Definition: stm32f7xx_hal_uart.h:1319
UART_CheckIdleState
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
UART_AdvFeatureInitTypeDef::OverrunDisable
uint32_t OverrunDisable
Definition: stm32f7xx_hal_uart.h:111
HAL_UART_RxCpltCallback
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
UART_CLOCKSOURCE_CSI
@ UART_CLOCKSOURCE_CSI
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:193
IS_UART_ADVFEATURE_RXINV
#define IS_UART_ADVFEATURE_RXINV(__RXINV__)
Ensure that UART frame RX inversion setting is valid.
Definition: stm32f7xx_hal_uart.h:1303
UNUSED
#define UNUSED(x)
Definition: porcupine/demo/c/dr_libs/old/dr.h:92
IS_UART_PARITY
#define IS_UART_PARITY(PARITY)
Definition: stm32f4xx_hal_uart.h:780
HSI_VALUE
#define HSI_VALUE
Internal High Speed oscillator (HSI) value. This value is used by the RCC HAL module to compute the s...
Definition: stm32f407/stm32f407g-disc1/Inc/stm32f4xx_hal_conf.h:82
USART_CR3_WUFIE
#define USART_CR3_WUFIE
Definition: stm32f769xx.h:15417
USART_CR2_STOP
#define USART_CR2_STOP
Definition: stm32f407xx.h:12574
IS_UART_LIN_BREAK_DETECT_LENGTH
#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH)
Definition: stm32f4xx_hal_uart.h:794
UART_FLAG_RTOF
#define UART_FLAG_RTOF
Definition: stm32f7xx_hal_uart.h:664
USART_TypeDef::PRESC
__IO uint32_t PRESC
Definition: stm32h735xx.h:1613
HAL_UART_RxHalfCpltCallback
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
__HAL_DMA_GET_COUNTER
#define __HAL_DMA_GET_COUNTER(__HANDLE__)
Returns the number of remaining data units in the current DMAy Streamx transfer.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:636
UART_FIFOMODE_ENABLE
#define UART_FIFOMODE_ENABLE
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart_ex.h:93
HAL_UARTEx_TxFifoEmptyCallback
void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
USART_CR2_CLKEN
#define USART_CR2_CLKEN
Definition: stm32f407xx.h:12570
__UART_HandleTypeDef::hdmatx
DMA_HandleTypeDef * hdmatx
Definition: stm32f4xx_hal_uart.h:159
IS_UART_ONE_BIT_SAMPLE
#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__)
Ensure that UART frame sampling is valid.
Definition: stm32f7xx_hal_uart.h:1188
__HAL_LOCK
#define __HAL_LOCK(__HANDLE__)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:93
HAL_UART_GetState
HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
IS_UART_ADVFEATURE_DMAONRXERROR
#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__)
Ensure that UART DMA enabling or disabling on error setting is valid.
Definition: stm32f7xx_hal_uart.h:1343
CSI_VALUE
#define CSI_VALUE
Internal oscillator (CSI) default value. This value is the default CSI value after Reset.
Definition: stm32h735/stm32h735g-dk/Inc/stm32h7xx_hal_conf.h:120
USART_TypeDef::RDR
__IO uint32_t RDR
Definition: stm32f769xx.h:1017
USART_ISR_REACK
#define USART_ISR_REACK
Definition: stm32f769xx.h:15530
USART_RTOR_RTO
#define USART_RTOR_RTO
Definition: stm32f769xx.h:15442
HAL_UART_RECEPTION_TOIDLE
#define HAL_UART_RECEPTION_TOIDLE
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:816
HAL_UART_EnableReceiverTimeout
HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
HAL_UART_AbortReceive_IT
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
UART_AdvFeatureInitTypeDef::DataInvert
uint32_t DataInvert
Definition: stm32f7xx_hal_uart.h:104
MODIFY_REG
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:224
HAL_UART_ERROR_DMA
#define HAL_UART_ERROR_DMA
Definition: stm32f4xx_hal_uart.h:236
UART_CLEAR_OREF
#define UART_CLEAR_OREF
Definition: stm32f7xx_hal_uart.h:726
HAL_UART_Init
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
UART_CLEAR_NEF
#define UART_CLEAR_NEF
Definition: stm32f7xx_hal_uart.h:725
HAL_UART_ERROR_ORE
#define HAL_UART_ERROR_ORE
Definition: stm32f4xx_hal_uart.h:235
HAL_UART_AbortTransmit_IT
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
RESET
@ RESET
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:187
UART_MUTE_MODE_REQUEST
#define UART_MUTE_MODE_REQUEST
Definition: stm32f7xx_hal_uart.h:470
__UART_HandleTypeDef::Mask
uint16_t Mask
Definition: stm32f7xx_hal_uart.h:205
UART_CLOCKSOURCE_PLL3
@ UART_CLOCKSOURCE_PLL3
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:191
__UART_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32f4xx_hal_uart.h:163
HAL_BUSY
@ HAL_BUSY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:44
HAL_DMA_Start_IT
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
HAL_UART_Receive_DMA
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_FLAG_RXNE
#define UART_FLAG_RXNE
Definition: stm32f4xx_hal_uart.h:338
UART_Start_Receive_IT
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_AdvFeatureInitTypeDef::DMADisableonRxError
uint32_t DMADisableonRxError
Definition: stm32f7xx_hal_uart.h:114
UART_CLOCKSOURCE_D3PCLK1
@ UART_CLOCKSOURCE_D3PCLK1
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:189
PLL2_ClocksTypeDef
RCC PLL2 Clocks structure definition.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h:121
UART_AdvFeatureInitTypeDef::AutoBaudRateMode
uint32_t AutoBaudRateMode
Definition: stm32f7xx_hal_uart.h:120
__UART_HandleTypeDef::RxState
__IO HAL_UART_StateTypeDef RxState
Definition: stm32f4xx_hal_uart.h:169
IS_LPUART_INSTANCE
#define IS_LPUART_INSTANCE(INSTANCE)
Definition: stm32h735xx.h:24654
USART_CR3_TXFTIE
#define USART_CR3_TXFTIE
Definition: stm32h735xx.h:21589
HAL_UART_TIMEOUT_VALUE
#define HAL_UART_TIMEOUT_VALUE
Definition: stm32f7xx_hal_uart.h:641
HAL_UART_STATE_BUSY_RX
@ HAL_UART_STATE_BUSY_RX
Definition: stm32f4xx_hal_uart.h:127
USART_TypeDef::CR3
__IO uint32_t CR3
Definition: stm32f407xx.h:765
USART_CR1_PEIE
#define USART_CR1_PEIE
Definition: stm32f407xx.h:12529
USART_TypeDef::CR2
__IO uint32_t CR2
Definition: stm32f407xx.h:764
__HAL_UNLOCK
#define __HAL_UNLOCK(__HANDLE__)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:105
UART_AdvFeatureInitTypeDef::TxPinLevelInvert
uint32_t TxPinLevelInvert
Definition: stm32f7xx_hal_uart.h:98
USART_ISR_TXE_TXFNF
#define USART_ISR_TXE_TXFNF
Definition: stm32h735xx.h:21674
READ_BIT
#define READ_BIT(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:216
UART_CLEAR_FEF
#define UART_CLEAR_FEF
Definition: stm32f7xx_hal_uart.h:724
UART_WORDLENGTH_8B
#define UART_WORDLENGTH_8B
Definition: stm32f4xx_hal_uart.h:247
USART_TypeDef::ISR
__IO uint32_t ISR
Definition: stm32f769xx.h:1015
HAL_MAX_DELAY
#define HAL_MAX_DELAY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:61
__UART_HandleTypeDef::AdvancedInit
UART_AdvFeatureInitTypeDef AdvancedInit
Definition: stm32f7xx_hal_uart.h:191
UART_ClockSourceTypeDef
UART_ClockSourceTypeDef
UART clock sources definition.
Definition: stm32f7xx_hal_uart.h:172
HAL_DMA_Abort
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
__UART_HandleTypeDef::TxXferSize
uint16_t TxXferSize
Definition: stm32f4xx_hal_uart.h:149
__UART_HandleTypeDef::RxISR
void(* RxISR)(struct __UART_HandleTypeDef *huart)
Definition: stm32f7xx_hal_uart.h:207
__HAL_UART_SEND_REQ
#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__)
Set a specific UART request flag.
Definition: stm32f7xx_hal_uart.h:987
__UART_HandleTypeDef::pTxBuffPtr
uint8_t * pTxBuffPtr
Definition: stm32f4xx_hal_uart.h:147
HAL_UART_Receive
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
__UART_HandleTypeDef::FifoMode
uint32_t FifoMode
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:234
HAL_RCCEx_GetPLL3ClockFreq
void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
UART_CLOCKSOURCE_D2PCLK1
@ UART_CLOCKSOURCE_D2PCLK1
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:187
__UART_HandleTypeDef::gState
__IO HAL_UART_StateTypeDef gState
Definition: stm32f4xx_hal_uart.h:165
HAL_UART_ERROR_NONE
#define HAL_UART_ERROR_NONE
Definition: stm32f4xx_hal_uart.h:231
UART_ADVFEATURE_DMADISABLEONERROR_INIT
#define UART_ADVFEATURE_DMADISABLEONERROR_INIT
Definition: stm32f7xx_hal_uart.h:486
IS_UART_INSTANCE
#define IS_UART_INSTANCE
Definition: stm32f407xx.h:15480
__UART_HandleTypeDef::hdmarx
DMA_HandleTypeDef * hdmarx
Definition: stm32f4xx_hal_uart.h:161
__UART_HandleTypeDef::RxXferSize
uint16_t RxXferSize
Definition: stm32f4xx_hal_uart.h:155
UART_SetConfig
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
USART_CR1_TCIE
#define USART_CR1_TCIE
Definition: stm32f407xx.h:12523
USART_TypeDef::BRR
__IO uint32_t BRR
Definition: stm32f407xx.h:762
IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE
#define IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(__INSTANCE__)
Definition: stm32f769xx.h:21979
USART_CR3_EIE
#define USART_CR3_EIE
Definition: stm32f407xx.h:12585
__UART_HandleTypeDef::pRxBuffPtr
uint8_t * pRxBuffPtr
Definition: stm32f4xx_hal_uart.h:153
USART_ISR_TC
#define USART_ISR_TC
Definition: stm32f769xx.h:15485
__UART_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32f4xx_hal_uart.h:172
HAL_TIMEOUT
@ HAL_TIMEOUT
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:45
UART_CLEAR_WUF
#define UART_CLEAR_WUF
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:806
PLL2_ClocksTypeDef::PLL2_Q_Frequency
uint32_t PLL2_Q_Frequency
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h:124
LSE_VALUE
#define LSE_VALUE
External Low Speed oscillator (LSE) value.
Definition: stm32f407/stm32f407g-disc1/Inc/stm32f4xx_hal_conf.h:97
USART_CR2_LBDL
#define USART_CR2_LBDL
Definition: stm32f407xx.h:12555
UART_TXDATA_FLUSH_REQUEST
#define UART_TXDATA_FLUSH_REQUEST
Definition: stm32f7xx_hal_uart.h:472
UART_WAKEUPMETHOD_ADDRESSMARK
#define UART_WAKEUPMETHOD_ADDRESSMARK
Definition: stm32f4xx_hal_uart.h:324
__DMA_HandleTypeDef::Parent
void * Parent
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:149
IS_UART_LIN_INSTANCE
#define IS_UART_LIN_INSTANCE
Definition: stm32f407xx.h:15488
HAL_HalfDuplex_EnableTransmitter
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
UART_ADVFEATURE_TXINVERT_INIT
#define UART_ADVFEATURE_TXINVERT_INIT
Definition: stm32f7xx_hal_uart.h:481
__DMA_HandleTypeDef::XferCpltCallback
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:151
PLL3_ClocksTypeDef
RCC PLL3 Clocks structure definition.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h:131
IS_UART_HARDWARE_FLOW_CONTROL
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)
Definition: stm32f4xx_hal_uart.h:783
UART_WaitOnFlagUntilTimeout
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
HAL_RCC_GetPCLK1Freq
uint32_t HAL_RCC_GetPCLK1Freq(void)
USART_CR1_WAKE
#define USART_CR1_WAKE
Definition: stm32f407xx.h:12538
UART_MASK_COMPUTATION
#define UART_MASK_COMPUTATION(__HANDLE__)
Report the UART mask to apply to retrieve the received data according to the word length and to the p...
Definition: stm32f7xx_hal_uart_ex.h:347
USART_ISR_NE
#define USART_ISR_NE
Definition: stm32f769xx.h:15473
SET
@ SET
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:188
UART_InitTypeDef::Mode
uint32_t Mode
Definition: stm32f4xx_hal_uart.h:68
UART_Start_Receive_DMA
HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
__HAL_RCC_GET_FLAG
#define __HAL_RCC_GET_FLAG(__FLAG__)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:1230
UART_RXDATA_FLUSH_REQUEST
#define UART_RXDATA_FLUSH_REQUEST
Definition: stm32f7xx_hal_uart.h:471
HAL_MultiProcessor_Init
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
HAL_UART_AbortTransmit
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
HAL_UART_STATE_RESET
@ HAL_UART_STATE_RESET
Definition: stm32f4xx_hal_uart.h:119
HAL_LIN_Init
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
UART_GETCLOCKSOURCE
#define UART_GETCLOCKSOURCE(__HANDLE__, __CLOCKSOURCE__)
Report the UART clock source.
Definition: stm32f7xx_hal_uart_ex.h:162
FlagStatus
FlagStatus
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:185
__UART_HandleTypeDef::ReceptionType
__IO HAL_UART_RxTypeTypeDef ReceptionType
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:241
USART_ISR_TXFE
#define USART_ISR_TXFE
Definition: stm32h735xx.h:21722
USART_PRESC_PRESCALER
#define USART_PRESC_PRESCALER
Definition: stm32h735xx.h:21796
HAL_UART_AbortReceiveCpltCallback
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
USART_CR1_RXFFIE
#define USART_CR1_RXFFIE
Definition: stm32h735xx.h:21452
HAL_UART_IRQHandler
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
UART_CLOCKSOURCE_LSE
@ UART_CLOCKSOURCE_LSE
Definition: stm32f7xx_hal_uart.h:178
UART_InitTypeDef::HwFlowCtl
uint32_t HwFlowCtl
Definition: stm32f4xx_hal_uart.h:71
USART_CR1_RE
#define USART_CR1_RE
Definition: stm32f407xx.h:12511
HAL_HalfDuplex_Init
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
UART_PARITY_NONE
#define UART_PARITY_NONE
Definition: stm32f4xx_hal_uart.h:265
UART_ADVFEATURE_RXOVERRUNDISABLE_INIT
#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT
Definition: stm32f7xx_hal_uart.h:485
HAL_IS_BIT_SET
#define HAL_IS_BIT_SET(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:63
USART_CR3_RXFTIE
#define USART_CR3_RXFTIE
Definition: stm32h735xx.h:21601
IS_UART_STOPBITS
#define IS_UART_STOPBITS(STOPBITS)
Definition: stm32f4xx_hal_uart.h:778
HAL_RCCEx_GetPLL2ClockFreq
void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
HAL_DMA_GetError
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
HAL_UART_DeInit
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
UART_AdvFeatureInitTypeDef::MSBFirst
uint32_t MSBFirst
Definition: stm32f7xx_hal_uart.h:124
UART_DIV_SAMPLING8
#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_)
Definition: stm32f4xx_hal_uart.h:810
UART_ADVFEATURE_SWAP_INIT
#define UART_ADVFEATURE_SWAP_INIT
Definition: stm32f7xx_hal_uart.h:484
IS_UART_WORD_LENGTH
#define IS_UART_WORD_LENGTH(LENGTH)
Definition: stm32f4xx_hal_uart.h:775
USART_CR2_RTOEN
#define USART_CR2_RTOEN
Definition: stm32f769xx.h:15350
DMA_InitTypeDef::Mode
uint32_t Mode
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:70
READ_REG
#define READ_REG(REG)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:222
USART_ISR_TEACK
#define USART_ISR_TEACK
Definition: stm32f769xx.h:15527
USART_ISR_IDLE
#define USART_ISR_IDLE
Definition: stm32f769xx.h:15479
SET_BIT
#define SET_BIT(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:212
HAL_UART_AbortTransmitCpltCallback
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
IS_UART_OVERSAMPLING
#define IS_UART_OVERSAMPLING(SAMPLING)
Definition: stm32f4xx_hal_uart.h:791
HAL_UART_TxHalfCpltCallback
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
USART_CR2_LINEN
#define USART_CR2_LINEN
Definition: stm32f407xx.h:12580
USART_CR3_DMAR
#define USART_CR3_DMAR
Definition: stm32f407xx.h:12603
UART_DIV_SAMPLING16
#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_)
Definition: stm32f4xx_hal_uart.h:801
HAL_UART_Receive_IT
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_MultiProcessor_EnterMuteMode
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
UART_SENDBREAK_REQUEST
#define UART_SENDBREAK_REQUEST
Definition: stm32f7xx_hal_uart.h:469
IS_UART_ADVFEATURE_DATAINV
#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__)
Ensure that UART frame data inversion setting is valid.
Definition: stm32f7xx_hal_uart.h:1311
IS_UART_ADVFEATURE_TXINV
#define IS_UART_ADVFEATURE_TXINV(__TXINV__)
Ensure that UART frame TX inversion setting is valid.
Definition: stm32f7xx_hal_uart.h:1295
UART_CLOCKSOURCE_D2PCLK2
@ UART_CLOCKSOURCE_D2PCLK2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:188
UART_ADVFEATURE_AUTOBAUDRATE_INIT
#define UART_ADVFEATURE_AUTOBAUDRATE_INIT
Definition: stm32f7xx_hal_uart.h:487
USART_CR3_IREN
#define USART_CR3_IREN
Definition: stm32f407xx.h:12588
__HAL_RCC_GET_HSI_DIVIDER
#define __HAL_RCC_GET_HSI_DIVIDER()
Macro to get the HSI divider.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:7145
__UART_HandleTypeDef::Instance
USART_TypeDef * Instance
Definition: stm32f4xx_hal_uart.h:143
UART_AdvFeatureInitTypeDef::AdvFeatureInit
uint32_t AdvFeatureInit
Definition: stm32f7xx_hal_uart.h:94
HAL_UART_AbortCpltCallback
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
IS_UART_ADVFEATURE_INIT
#define IS_UART_ADVFEATURE_INIT(__INIT__)
Ensure that UART advanced features initialization is valid.
Definition: stm32f7xx_hal_uart.h:1280
USART_CR1_TE
#define USART_CR1_TE
Definition: stm32f407xx.h:12514
USART_ISR_PE
#define USART_ISR_PE
Definition: stm32f769xx.h:15467
__HAL_UART_CLEAR_FLAG
#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__)
Clears the specified UART pending flag.
Definition: stm32f4xx_hal_uart.h:450
UART_FLAG_TXE
#define UART_FLAG_TXE
Definition: stm32f4xx_hal_uart.h:336
USART_CR2_DATAINV
#define USART_CR2_DATAINV
Definition: stm32f769xx.h:15336
HAL_UART_STATE_BUSY
@ HAL_UART_STATE_BUSY
Definition: stm32f4xx_hal_uart.h:123
__UART_HandleTypeDef::RxXferCount
__IO uint16_t RxXferCount
Definition: stm32f4xx_hal_uart.h:157
HAL_UART_MspDeInit
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
UART MSP De-Initialization This function freeze the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:369
HAL_UARTEx_WakeupCallback
void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
IS_LPUART_STOPBITS
#define IS_LPUART_STOPBITS(__STOPBITS__)
Ensure that LPUART frame number of stop bits is valid.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:1302
UART_AdvFeatureInitTypeDef::AutoBaudRateEnable
uint32_t AutoBaudRateEnable
Definition: stm32f7xx_hal_uart.h:117
HAL_UART_DMAPause
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
HAL_UARTEx_RxFifoFullCallback
void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
HAL_UART_Abort
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
__DMA_HandleTypeDef::XferErrorCallback
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:159
UART_InitTypeDef::Parity
uint32_t Parity
Definition: stm32f4xx_hal_uart.h:61
IS_UART_ADVFEATURE_AUTOBAUDRATEMODE
#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__)
Ensure that UART auto Baud rate detection mode is valid.
Definition: stm32f7xx_hal_uart.h:1196
USART_CR2_RXINV
#define USART_CR2_RXINV
Definition: stm32f769xx.h:15330
IS_UART_BAUDRATE
#define IS_UART_BAUDRATE(BAUDRATE)
Definition: stm32f4xx_hal_uart.h:798
USART_CR1_IDLEIE
#define USART_CR1_IDLEIE
Definition: stm32f407xx.h:12517
HAL_UART_STATE_READY
@ HAL_UART_STATE_READY
Definition: stm32f4xx_hal_uart.h:121
UART_AdvFeatureInitTypeDef::Swap
uint32_t Swap
Definition: stm32f7xx_hal_uart.h:108
HAL_UART_GetError
uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)

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