21 #ifndef STM32H7xx_HAL_I2C_H
22 #define STM32H7xx_HAL_I2C_H
57 uint32_t AddressingMode;
60 uint32_t DualAddressMode;
66 uint32_t OwnAddress2Masks;
69 uint32_t GeneralCallMode;
72 uint32_t NoStretchMode;
165 #define HAL_I2C_ERROR_NONE (0x00000000U)
166 #define HAL_I2C_ERROR_BERR (0x00000001U)
167 #define HAL_I2C_ERROR_ARLO (0x00000002U)
168 #define HAL_I2C_ERROR_AF (0x00000004U)
169 #define HAL_I2C_ERROR_OVR (0x00000008U)
170 #define HAL_I2C_ERROR_DMA (0x00000010U)
171 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U)
172 #define HAL_I2C_ERROR_SIZE (0x00000040U)
173 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U)
174 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
175 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U)
177 #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U)
186 typedef struct __I2C_HandleTypeDef
196 __IO uint16_t XferCount;
198 __IO uint32_t XferOptions;
201 __IO uint32_t PreviousState;
219 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
230 void (* AddrCallback)(
struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
238 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
244 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
245 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
246 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
247 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
248 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U,
249 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
250 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
251 HAL_I2C_ERROR_CB_ID = 0x07U,
252 HAL_I2C_ABORT_CB_ID = 0x08U,
254 HAL_I2C_MSPINIT_CB_ID = 0x09U,
255 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU
257 } HAL_I2C_CallbackIDTypeDef;
263 typedef void (*pI2C_AddrCallbackTypeDef)(
I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
282 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
283 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
284 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
285 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
286 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
287 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
292 #define I2C_OTHER_FRAME (0x000000AAU)
293 #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
301 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
302 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
310 #define I2C_DUALADDRESS_DISABLE (0x00000000U)
311 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
319 #define I2C_OA2_NOMASK ((uint8_t)0x00U)
320 #define I2C_OA2_MASK01 ((uint8_t)0x01U)
321 #define I2C_OA2_MASK02 ((uint8_t)0x02U)
322 #define I2C_OA2_MASK03 ((uint8_t)0x03U)
323 #define I2C_OA2_MASK04 ((uint8_t)0x04U)
324 #define I2C_OA2_MASK05 ((uint8_t)0x05U)
325 #define I2C_OA2_MASK06 ((uint8_t)0x06U)
326 #define I2C_OA2_MASK07 ((uint8_t)0x07U)
334 #define I2C_GENERALCALL_DISABLE (0x00000000U)
335 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
343 #define I2C_NOSTRETCH_DISABLE (0x00000000U)
344 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
352 #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
353 #define I2C_MEMADD_SIZE_16BIT (0x00000002U)
361 #define I2C_DIRECTION_TRANSMIT (0x00000000U)
362 #define I2C_DIRECTION_RECEIVE (0x00000001U)
370 #define I2C_RELOAD_MODE I2C_CR2_RELOAD
371 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
372 #define I2C_SOFTEND_MODE (0x00000000U)
380 #define I2C_NO_STARTSTOP (0x00000000U)
381 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
382 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
383 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
394 #define I2C_IT_ERRI I2C_CR1_ERRIE
395 #define I2C_IT_TCI I2C_CR1_TCIE
396 #define I2C_IT_STOPI I2C_CR1_STOPIE
397 #define I2C_IT_NACKI I2C_CR1_NACKIE
398 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
399 #define I2C_IT_RXI I2C_CR1_RXIE
400 #define I2C_IT_TXI I2C_CR1_TXIE
408 #define I2C_FLAG_TXE I2C_ISR_TXE
409 #define I2C_FLAG_TXIS I2C_ISR_TXIS
410 #define I2C_FLAG_RXNE I2C_ISR_RXNE
411 #define I2C_FLAG_ADDR I2C_ISR_ADDR
412 #define I2C_FLAG_AF I2C_ISR_NACKF
413 #define I2C_FLAG_STOPF I2C_ISR_STOPF
414 #define I2C_FLAG_TC I2C_ISR_TC
415 #define I2C_FLAG_TCR I2C_ISR_TCR
416 #define I2C_FLAG_BERR I2C_ISR_BERR
417 #define I2C_FLAG_ARLO I2C_ISR_ARLO
418 #define I2C_FLAG_OVR I2C_ISR_OVR
419 #define I2C_FLAG_PECERR I2C_ISR_PECERR
420 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
421 #define I2C_FLAG_ALERT I2C_ISR_ALERT
422 #define I2C_FLAG_BUSY I2C_ISR_BUSY
423 #define I2C_FLAG_DIR I2C_ISR_DIR
442 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
443 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
444 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
445 (__HANDLE__)->MspInitCallback = NULL; \
446 (__HANDLE__)->MspDeInitCallback = NULL; \
449 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
466 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
482 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
498 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \
499 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
524 #define I2C_FLAG_MASK (0x0001FFFFU)
525 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
526 (__FLAG__)) == (__FLAG__)) ? SET : RESET)
545 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
546 : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
552 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
558 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
564 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
587 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
589 pI2C_CallbackTypeDef pCallback);
611 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
613 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
625 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
627 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
649 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
651 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
715 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
716 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
718 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
719 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
721 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
722 ((MASK) == I2C_OA2_MASK01) || \
723 ((MASK) == I2C_OA2_MASK02) || \
724 ((MASK) == I2C_OA2_MASK03) || \
725 ((MASK) == I2C_OA2_MASK04) || \
726 ((MASK) == I2C_OA2_MASK05) || \
727 ((MASK) == I2C_OA2_MASK06) || \
728 ((MASK) == I2C_OA2_MASK07))
730 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
731 ((CALL) == I2C_GENERALCALL_ENABLE))
733 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
734 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
736 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
737 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
739 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
740 ((MODE) == I2C_AUTOEND_MODE) || \
741 ((MODE) == I2C_SOFTEND_MODE))
743 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
744 ((REQUEST) == I2C_GENERATE_START_READ) || \
745 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
746 ((REQUEST) == I2C_NO_STARTSTOP))
748 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
749 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
750 ((REQUEST) == I2C_NEXT_FRAME) || \
751 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
752 ((REQUEST) == I2C_LAST_FRAME) || \
753 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
754 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
756 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
757 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
759 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \
760 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
762 #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U))
763 #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U))
764 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
765 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
766 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
768 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
769 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
771 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
772 (uint16_t)(0xFF00U))) >> 8U)))
773 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
775 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
776 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
778 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \
779 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
780 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)