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21 #ifndef STM32H7xx_HAL_DMA_EX_H
22 #define STM32H7xx_HAL_DMA_EX_H
110 #define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 0U
111 #define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 1U
112 #define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 2U
113 #define HAL_DMAMUX1_SYNC_LPTIM1_OUT 3U
114 #define HAL_DMAMUX1_SYNC_LPTIM2_OUT 4U
115 #define HAL_DMAMUX1_SYNC_LPTIM3_OUT 5U
116 #define HAL_DMAMUX1_SYNC_EXTI0 6U
117 #define HAL_DMAMUX1_SYNC_TIM12_TRGO 7U
119 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH0_EVT 0U
120 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH1_EVT 1U
121 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH2_EVT 2U
122 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH3_EVT 3U
123 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH4_EVT 4U
124 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH5_EVT 5U
125 #define HAL_DMAMUX2_SYNC_LPUART1_RX_WKUP 6U
126 #define HAL_DMAMUX2_SYNC_LPUART1_TX_WKUP 7U
127 #define HAL_DMAMUX2_SYNC_LPTIM2_OUT 8U
128 #define HAL_DMAMUX2_SYNC_LPTIM3_OUT 9U
129 #define HAL_DMAMUX2_SYNC_I2C4_WKUP 10U
130 #define HAL_DMAMUX2_SYNC_SPI6_WKUP 11U
131 #define HAL_DMAMUX2_SYNC_COMP1_OUT 12U
132 #define HAL_DMAMUX2_SYNC_RTC_WKUP 13U
133 #define HAL_DMAMUX2_SYNC_EXTI0 14U
134 #define HAL_DMAMUX2_SYNC_EXTI2 15U
144 #define HAL_DMAMUX_SYNC_NO_EVENT 0x00000000U
145 #define HAL_DMAMUX_SYNC_RISING DMAMUX_CxCR_SPOL_0
146 #define HAL_DMAMUX_SYNC_FALLING DMAMUX_CxCR_SPOL_1
147 #define HAL_DMAMUX_SYNC_RISING_FALLING DMAMUX_CxCR_SPOL
158 #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT 0U
159 #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT 1U
160 #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT 2U
161 #define HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT 3U
162 #define HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT 4U
163 #define HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT 5U
164 #define HAL_DMAMUX1_REQ_GEN_EXTI0 6U
165 #define HAL_DMAMUX1_REQ_GEN_TIM12_TRGO 7U
167 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT 0U
168 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT 1U
169 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT 2U
170 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT 3U
171 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT 4U
172 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT 5U
173 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT 6U
174 #define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP 7U
175 #define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP 8U
176 #define HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP 9U
177 #define HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT 10U
178 #define HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP 11U
179 #define HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT 12U
181 #define HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP 13U
184 #define HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP 14U
186 #define HAL_DMAMUX2_REQ_GEN_I2C4_WKUP 15U
187 #define HAL_DMAMUX2_REQ_GEN_SPI6_WKUP 16U
188 #define HAL_DMAMUX2_REQ_GEN_COMP1_OUT 17U
189 #define HAL_DMAMUX2_REQ_GEN_COMP2_OUT 18U
190 #define HAL_DMAMUX2_REQ_GEN_RTC_WKUP 19U
191 #define HAL_DMAMUX2_REQ_GEN_EXTI0 20U
192 #define HAL_DMAMUX2_REQ_GEN_EXTI2 21U
193 #define HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT 22U
194 #define HAL_DMAMUX2_REQ_GEN_SPI6_IT 23U
195 #define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT 24U
196 #define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT 25U
198 #define HAL_DMAMUX2_REQ_GEN_ADC3_IT 26U
199 #define HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT 27U
201 #define HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT 28U
202 #define HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT 29U
213 #define HAL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U
214 #define HAL_DMAMUX_REQ_GEN_RISING DMAMUX_RGxCR_GPOL_0
215 #define HAL_DMAMUX_REQ_GEN_FALLING DMAMUX_RGxCR_GPOL_1
216 #define HAL_DMAMUX_REQ_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL
260 #define IS_DMA_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_TIM12_TRGO)
261 #define IS_BDMA_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_SYNC_EXTI2)
263 #define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
265 #define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \
266 ((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \
267 ((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \
268 ((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING))
270 #define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE))
272 #define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \
275 #define IS_DMA_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQ_GEN_TIM12_TRGO)
276 #define IS_BDMA_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT)
278 #define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
280 #define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQ_GEN_NO_EVENT) || \
281 ((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING) || \
282 ((POLARITY) == HAL_DMAMUX_REQ_GEN_FALLING) || \
283 ((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING_FALLING))
HAL_StatusTypeDef
HAL Status structures definition
DMA handle Structure definition.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
HAL DMAMUX request generator parameters structure definition.
HAL DMAMUX Synchronization configuration structure definition.
HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
HAL_DMA_MemoryTypeDef
HAL DMA Memory definition.
FunctionalState SyncEnable
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig)
void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
FunctionalState EventEnable