Classes | Macros | Functions
stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h File Reference

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Classes

struct  ARM_MPU_Region_t
 

Macros

#define ARM_MPU_AP_(RO, NP)   (((RO & 1U) << 1U) | (NP & 1U))
 Memory access permissions. More...
 
#define ARM_MPU_ARMV8_H
 
#define ARM_MPU_ATTR(O, I)   (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
 Memory Attribute. More...
 
#define ARM_MPU_ATTR_DEVICE   ( 0U )
 Attribute for device memory (outer only) More...
 
#define ARM_MPU_ATTR_DEVICE_GRE   (3U)
 Device memory type Gathering, Re-ordering, Early Write Acknowledgement. More...
 
#define ARM_MPU_ATTR_DEVICE_nGnRE   (1U)
 Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement. More...
 
#define ARM_MPU_ATTR_DEVICE_nGnRnE   (0U)
 Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement. More...
 
#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)
 Device memory type non Gathering, Re-ordering, Early Write Acknowledgement. More...
 
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA)   (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
 Attribute for normal memory (outer and inner) More...
 
#define ARM_MPU_ATTR_NON_CACHEABLE   ( 4U )
 Attribute for non-cacheable, normal memory. More...
 
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN)
 Region Base Address Register value. More...
 
#define ARM_MPU_RLAR(LIMIT, IDX)
 Region Limit Address Register value. More...
 
#define ARM_MPU_SH_INNER   (3U)
 Normal memory inner shareable
More...
 
#define ARM_MPU_SH_NON   (0U)
 Normal memory non-shareable
More...
 
#define ARM_MPU_SH_OUTER   (2U)
 Normal memory outer shareable
More...
 

Functions

__STATIC_INLINE void ARM_MPU_ClrRegion (uint32_t rnr)
 
__STATIC_INLINE void ARM_MPU_ClrRegionEx (MPU_Type *mpu, uint32_t rnr)
 
__STATIC_INLINE void ARM_MPU_Disable (void)
 
__STATIC_INLINE void ARM_MPU_Enable (uint32_t MPU_Control)
 
__STATIC_INLINE void ARM_MPU_Load (uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt)
 
__STATIC_INLINE void ARM_MPU_LoadEx (MPU_Type *mpu, uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt)
 
__STATIC_INLINE void ARM_MPU_SetMemAttr (uint8_t idx, uint8_t attr)
 
__STATIC_INLINE void ARM_MPU_SetMemAttrEx (MPU_Type *mpu, uint8_t idx, uint8_t attr)
 
__STATIC_INLINE void ARM_MPU_SetRegion (uint32_t rnr, uint32_t rbar, uint32_t rlar)
 
__STATIC_INLINE void ARM_MPU_SetRegionEx (MPU_Type *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
 
__STATIC_INLINE void orderedCpy (volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len)
 

Macro Definition Documentation

◆ ARM_MPU_AP_

#define ARM_MPU_AP_ (   RO,
  NP 
)    (((RO & 1U) << 1U) | (NP & 1U))

Memory access permissions.

Parameters
RORead-Only: Set to 1 for read-only memory.
NPNon-Privileged: Set to 1 for non-privileged memory.

Definition at line 80 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ARMV8_H

#define ARM_MPU_ARMV8_H

◆ ARM_MPU_ATTR

#define ARM_MPU_ATTR (   O,
 
)    (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))

Memory Attribute.

Parameters
OOuter memory attributes
IO == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes

Definition at line 65 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ATTR_DEVICE

#define ARM_MPU_ATTR_DEVICE   ( 0U )

Attribute for device memory (outer only)

Definition at line 35 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ATTR_DEVICE_GRE

#define ARM_MPU_ATTR_DEVICE_GRE   (3U)

Device memory type Gathering, Re-ordering, Early Write Acknowledgement.

Definition at line 59 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ATTR_DEVICE_nGnRE

#define ARM_MPU_ATTR_DEVICE_nGnRE   (1U)

Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement.

Definition at line 53 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ATTR_DEVICE_nGnRnE

#define ARM_MPU_ATTR_DEVICE_nGnRnE   (0U)

Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement.

Definition at line 50 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ATTR_DEVICE_nGRE

#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)

Device memory type non Gathering, Re-ordering, Early Write Acknowledgement.

Definition at line 56 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ATTR_MEMORY_

#define ARM_MPU_ATTR_MEMORY_ (   NT,
  WB,
  RA,
  WA 
)    (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))

Attribute for normal memory (outer and inner)

Parameters
NTNon-Transient: Set to 1 for non-transient data.
WBWrite-Back: Set to 1 to use write-back update policy.
RARead Allocation: Set to 1 to use cache allocation on read miss.
WAWrite Allocation: Set to 1 to use cache allocation on write miss.

Definition at line 46 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ATTR_NON_CACHEABLE

#define ARM_MPU_ATTR_NON_CACHEABLE   ( 4U )

Attribute for non-cacheable, normal memory.

Definition at line 38 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_RBAR

#define ARM_MPU_RBAR (   BASE,
  SH,
  RO,
  NP,
  XN 
)
Value:
((BASE & MPU_RBAR_BASE_Msk) | \
((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))

Region Base Address Register value.

Parameters
BASEThe base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
SHDefines the Shareability domain for this memory region.
RORead-Only: Set to 1 for a read-only memory region.
NPNon-Privileged: Set to 1 for a non-privileged memory region. \oaram XN eXecute Never: Set to 1 for a non-executable memory region.

Definition at line 89 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_RLAR

#define ARM_MPU_RLAR (   LIMIT,
  IDX 
)
Value:
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))

Region Limit Address Register value.

Parameters
LIMITThe limit address bits [31:5] for this memory region. The value is one extended.
IDXThe attribute index to be associated with this memory region.

Definition at line 99 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_SH_INNER

#define ARM_MPU_SH_INNER   (3U)

Normal memory inner shareable

Definition at line 74 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_SH_NON

#define ARM_MPU_SH_NON   (0U)

Normal memory non-shareable

Definition at line 68 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_SH_OUTER

#define ARM_MPU_SH_OUTER   (2U)

Normal memory outer shareable

Definition at line 71 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

Function Documentation

◆ ARM_MPU_ClrRegion()

__STATIC_INLINE void ARM_MPU_ClrRegion ( uint32_t  rnr)

Clear and disable the given MPU region.

Parameters
rnrRegion number to be cleared.

Definition at line 215 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_ClrRegionEx()

__STATIC_INLINE void ARM_MPU_ClrRegionEx ( MPU_Type *  mpu,
uint32_t  rnr 
)

Clear and disable the given MPU region of the given MPU.

Parameters
mpuPointer to MPU to be used.
rnrRegion number to be cleared.

Definition at line 206 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_Disable()

__STATIC_INLINE void ARM_MPU_Disable ( void  )

Disable the MPU.

Definition at line 127 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_Enable()

__STATIC_INLINE void ARM_MPU_Enable ( uint32_t  MPU_Control)

Enable the MPU.

Parameters
MPU_ControlDefault access permissions for unconfigured regions.

Definition at line 115 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_Load()

__STATIC_INLINE void ARM_MPU_Load ( uint32_t  rnr,
ARM_MPU_Region_t const *  table,
uint32_t  cnt 
)

Load the given number of MPU regions from a table.

Parameters
rnrFirst region number to be configured.
tablePointer to the MPU configuration table.
cntAmount of regions to be configured.

Definition at line 315 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_LoadEx()

__STATIC_INLINE void ARM_MPU_LoadEx ( MPU_Type *  mpu,
uint32_t  rnr,
ARM_MPU_Region_t const *  table,
uint32_t  cnt 
)

Load the given number of MPU regions from a table to the given MPU.

Parameters
mpuPointer to the MPU registers to be used.
rnrFirst region number to be configured.
tablePointer to the MPU configuration table.
cntAmount of regions to be configured.

Definition at line 285 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_SetMemAttr()

__STATIC_INLINE void ARM_MPU_SetMemAttr ( uint8_t  idx,
uint8_t  attr 
)

Set the memory attribute encoding.

Parameters
idxThe attribute index to be set [0-7]
attrThe attribute value to be set.

Definition at line 186 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_SetMemAttrEx()

__STATIC_INLINE void ARM_MPU_SetMemAttrEx ( MPU_Type *  mpu,
uint8_t  idx,
uint8_t  attr 
)

Set the memory attribute encoding to the given MPU.

Parameters
mpuPointer to the MPU to be configured.
idxThe attribute index to be set [0-7]
attrThe attribute value to be set.

Definition at line 169 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_SetRegion()

__STATIC_INLINE void ARM_MPU_SetRegion ( uint32_t  rnr,
uint32_t  rbar,
uint32_t  rlar 
)

Configure the given MPU region.

Parameters
rnrRegion number to be configured.
rbarValue for RBAR register.
rlarValue for RLAR register.

Definition at line 248 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ ARM_MPU_SetRegionEx()

__STATIC_INLINE void ARM_MPU_SetRegionEx ( MPU_Type *  mpu,
uint32_t  rnr,
uint32_t  rbar,
uint32_t  rlar 
)

Configure the given MPU region of the given MPU.

Parameters
mpuPointer to MPU to be used.
rnrRegion number to be configured.
rbarValue for RBAR register.
rlarValue for RLAR register.

Definition at line 236 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

◆ orderedCpy()

__STATIC_INLINE void orderedCpy ( volatile uint32_t *  dst,
const uint32_t *__RESTRICT  src,
uint32_t  len 
)

Memcopy with strictly ordered memory access, e.g. for register targets.

Parameters
dstDestination data is copied to.
srcSource data is copied from.
lenAmount of data words to be copied.

Definition at line 270 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h.

ARM_MPU_AP_
#define ARM_MPU_AP_(RO, NP)
Memory access permissions.
Definition: stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/mpu_armv8.h:80


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autogenerated on Fri Apr 1 2022 02:15:00