25 #include "stm32f4xx_hal.h"
36 #ifdef HAL_RCC_MODULE_ENABLED
74 #if defined(STM32F446xx)
91 uint32_t tickstart = 0U;
92 uint32_t tmpreg1 = 0U;
93 uint32_t plli2sp = 0U;
94 uint32_t plli2sq = 0U;
95 uint32_t plli2sr = 0U;
96 uint32_t pllsaip = 0U;
97 uint32_t pllsaiq = 0U;
98 uint32_t plli2sused = 0U;
99 uint32_t pllsaiused = 0U;
105 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1))
108 assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection));
111 __HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection);
113 if(PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)
121 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2))
124 assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection));
127 __HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection);
129 if(PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)
245 assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection));
248 __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection);
284 assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection));
287 __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection);
300 if(PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP)
331 if(((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1) && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) ||
332 ((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)))
499 RCC_PERIPHCLK_CEC | RCC_PERIPHCLK_FMPI2C1 |\
500 RCC_PERIPHCLK_CLK48 | RCC_PERIPHCLK_SDIO |\
501 RCC_PERIPHCLK_SPDIFRX;
510 PeriphClkInit->
PLLSAI.PLLSAIM = (uint32_t)((
RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIM) >> RCC_PLLSAICFGR_PLLSAIM_Pos);
525 PeriphClkInit->I2sApb1ClockSelection = __HAL_RCC_GET_I2S_APB1_SOURCE();
528 PeriphClkInit->I2sApb2ClockSelection = __HAL_RCC_GET_I2S_APB2_SOURCE();
538 PeriphClkInit->Fmpi2c1ClockSelection = __HAL_RCC_GET_FMPI2C1_SOURCE();
544 PeriphClkInit->SdioClockSelection = __HAL_RCC_GET_SDIO_SOURCE();
573 uint32_t tmpreg1 = 0U;
575 uint32_t frequency = 0U;
577 uint32_t vcoinput = 0U;
579 uint32_t saiclocksource = 0U;
580 uint32_t srcclk = 0U;
582 uint32_t vcooutput = 0U;
588 saiclocksource =
RCC->DCKCFGR;
589 saiclocksource &= (RCC_DCKCFGR_SAI1SRC | RCC_DCKCFGR_SAI2SRC);
590 switch (saiclocksource)
599 vcoinput = (
HSI_VALUE / (uint32_t)(
RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIM));
604 vcoinput = ((
HSE_VALUE / (uint32_t)(
RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIM)));
613 frequency = frequency/(tmpreg1);
616 case RCC_DCKCFGR_SAI1SRC_0:
617 case RCC_DCKCFGR_SAI2SRC_0:
639 frequency = frequency/(tmpreg1);
642 case RCC_DCKCFGR_SAI1SRC_1:
643 case RCC_DCKCFGR_SAI2SRC_1:
664 case RCC_DCKCFGR_SAI1SRC:
669 case RCC_DCKCFGR_SAI2SRC:
690 case RCC_PERIPHCLK_I2S_APB1:
693 srcclk = __HAL_RCC_GET_I2S_APB1_SOURCE();
697 case RCC_I2SAPB1CLKSOURCE_EXT:
704 case RCC_I2SAPB1CLKSOURCE_PLLI2S:
726 case RCC_I2SAPB1CLKSOURCE_PLLR:
748 case RCC_I2SAPB1CLKSOURCE_PLLSRC:
769 case RCC_PERIPHCLK_I2S_APB2:
772 srcclk = __HAL_RCC_GET_I2S_APB2_SOURCE();
776 case RCC_I2SAPB2CLKSOURCE_EXT:
783 case RCC_I2SAPB2CLKSOURCE_PLLI2S:
805 case RCC_I2SAPB2CLKSOURCE_PLLR:
827 case RCC_I2SAPB2CLKSOURCE_PLLSRC:
853 #if defined(STM32F469xx) || defined(STM32F479xx)
870 uint32_t tickstart = 0U;
871 uint32_t tmpreg1 = 0U;
872 uint32_t pllsaip = 0U;
873 uint32_t pllsaiq = 0U;
874 uint32_t pllsair = 0U;
894 assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection));
897 __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection);
906 (((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == RCC_PERIPHCLK_SAI_PLLI2S) ||
942 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == (RCC_PERIPHCLK_SAI_PLLI2S))
990 if((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == RCC_PERIPHCLK_SAI_PLLSAI) ||
1015 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == (RCC_PERIPHCLK_SAI_PLLSAI))
1047 __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->
PLLSAIDivR);
1116 RCC->BDCR = tmpreg1;
1159 RCC_PERIPHCLK_SAI_PLLI2S | RCC_PERIPHCLK_LTDC |\
1161 RCC_PERIPHCLK_CLK48 | RCC_PERIPHCLK_SDIO;
1183 PeriphClkInit->SdioClockSelection = __HAL_RCC_GET_SDIO_SOURCE();
1206 uint32_t frequency = 0U;
1208 uint32_t vcoinput = 0U;
1209 uint32_t srcclk = 0U;
1211 uint32_t vcooutput = 0U;
1217 srcclk = __HAL_RCC_GET_I2S_SOURCE();
1263 #if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
1280 uint32_t tickstart = 0U;
1281 uint32_t tmpreg1 = 0U;
1282 #if defined(STM32F413xx) || defined(STM32F423xx)
1283 uint32_t plli2sq = 0U;
1285 uint32_t plli2sused = 0U;
1291 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1))
1294 assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection));
1297 __HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection);
1299 if(PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)
1307 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2))
1310 assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection));
1313 __HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection);
1315 if(PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)
1322 #if defined(STM32F413xx) || defined(STM32F423xx)
1327 assert_param(IS_RCC_SAIACLKSOURCE(PeriphClkInit->SaiAClockSelection));
1330 __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(PeriphClkInit->SaiAClockSelection);
1332 if(PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLI2SR)
1337 if(PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLR)
1340 assert_param(IS_RCC_PLL_DIVR_VALUE(PeriphClkInit->PLLDivR));
1343 __HAL_RCC_PLL_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLDivR);
1352 assert_param(IS_RCC_SAIBCLKSOURCE(PeriphClkInit->SaiBClockSelection));
1355 __HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG(PeriphClkInit->SaiBClockSelection);
1357 if(PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLI2SR)
1362 if(PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLR)
1365 assert_param(IS_RCC_PLL_DIVR_VALUE(PeriphClkInit->PLLDivR));
1368 __HAL_RCC_PLL_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLDivR);
1406 RCC->BDCR = tmpreg1;
1440 assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection));
1443 __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection);
1468 assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection));
1471 __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection);
1495 assert_param(IS_RCC_PLLI2SCLKSOURCE(PeriphClkInit->PLLI2SSelection));
1499 __HAL_RCC_PLL_I2S_CONFIG(PeriphClkInit->PLLI2SSelection);
1502 if(((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1) && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) ||
1503 ((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)) ||
1505 ((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO) && (PeriphClkInit->SdioClockSelection == RCC_SDIOCLKSOURCE_CLK48) && (PeriphClkInit->
Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)))
1517 #if defined(STM32F413xx) || defined(STM32F423xx)
1519 if(((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAIA) == RCC_PERIPHCLK_SAIA) && (PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLI2SR)) ||
1520 ((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAIB) == RCC_PERIPHCLK_SAIB) && (PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLI2SR)))
1525 assert_param(IS_RCC_PLLI2S_DIVR_VALUE(PeriphClkInit->PLLI2SDivR));
1536 __HAL_RCC_PLLI2S_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLI2SDivR);
1581 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO)
1584 assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection));
1587 __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection);
1591 #if defined(STM32F413xx) || defined(STM32F423xx)
1596 assert_param(IS_RCC_DFSDM2CLKSOURCE(PeriphClkInit->Dfsdm2ClockSelection));
1599 __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
1604 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_DFSDM2_AUDIO) == RCC_PERIPHCLK_DFSDM2_AUDIO)
1607 assert_param(IS_RCC_DFSDM2AUDIOCLKSOURCE(PeriphClkInit->Dfsdm2AudioClockSelection));
1610 __HAL_RCC_DFSDM2AUDIO_CONFIG(PeriphClkInit->Dfsdm2AudioClockSelection);
1641 #if defined(STM32F413xx) || defined(STM32F423xx)
1646 RCC_PERIPHCLK_DFSDM1_AUDIO | RCC_PERIPHCLK_DFSDM2 |\
1648 RCC_PERIPHCLK_SAIA | RCC_PERIPHCLK_SAIB;
1654 RCC_PERIPHCLK_DFSDM1_AUDIO;
1664 #if defined(STM32F413xx) || defined(STM32F423xx)
1666 PeriphClkInit->PLLI2SDivR = (uint32_t)((
RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVR) >> RCC_DCKCFGR_PLLI2SDIVR_Pos);
1667 PeriphClkInit->PLLDivR = (uint32_t)((
RCC->DCKCFGR & RCC_DCKCFGR_PLLDIVR) >> RCC_DCKCFGR_PLLDIVR_Pos);
1671 PeriphClkInit->I2sApb1ClockSelection = __HAL_RCC_GET_I2S_APB1_SOURCE();
1674 PeriphClkInit->I2sApb2ClockSelection = __HAL_RCC_GET_I2S_APB2_SOURCE();
1681 PeriphClkInit->Fmpi2c1ClockSelection = __HAL_RCC_GET_FMPI2C1_SOURCE();
1687 PeriphClkInit->SdioClockSelection = __HAL_RCC_GET_SDIO_SOURCE();
1693 PeriphClkInit->Dfsdm1AudioClockSelection = __HAL_RCC_GET_DFSDM1AUDIO_SOURCE();
1695 #if defined(STM32F413xx) || defined(STM32F423xx)
1697 PeriphClkInit->Dfsdm2ClockSelection = __HAL_RCC_GET_DFSDM2_SOURCE();
1700 PeriphClkInit->Dfsdm2AudioClockSelection = __HAL_RCC_GET_DFSDM2AUDIO_SOURCE();
1706 PeriphClkInit->SaiAClockSelection = __HAL_RCC_GET_SAI_BLOCKA_SOURCE();
1709 PeriphClkInit->SaiBClockSelection = __HAL_RCC_GET_SAI_BLOCKB_SOURCE();
1735 uint32_t frequency = 0U;
1737 uint32_t vcoinput = 0U;
1738 uint32_t srcclk = 0U;
1740 uint32_t vcooutput = 0U;
1743 case RCC_PERIPHCLK_I2S_APB1:
1746 srcclk = __HAL_RCC_GET_I2S_APB1_SOURCE();
1750 case RCC_I2SAPB1CLKSOURCE_EXT:
1757 case RCC_I2SAPB1CLKSOURCE_PLLI2S:
1759 if((
RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SSRC) == RCC_PLLI2SCFGR_PLLI2SSRC)
1786 case RCC_I2SAPB1CLKSOURCE_PLLR:
1808 case RCC_I2SAPB1CLKSOURCE_PLLSRC:
1829 case RCC_PERIPHCLK_I2S_APB2:
1832 srcclk = __HAL_RCC_GET_I2S_APB2_SOURCE();
1836 case RCC_I2SAPB2CLKSOURCE_EXT:
1843 case RCC_I2SAPB2CLKSOURCE_PLLI2S:
1845 if((
RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SSRC) == RCC_PLLI2SCFGR_PLLI2SSRC)
1872 case RCC_I2SAPB2CLKSOURCE_PLLR:
1894 case RCC_I2SAPB2CLKSOURCE_PLLSRC:
1920 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
1935 uint32_t tickstart = 0U;
1936 uint32_t tmpreg1 = 0U;
1973 RCC->BDCR = tmpreg1;
2006 assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection));
2009 __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection);
2027 assert_param(IS_RCC_I2SAPBCLKSOURCE(PeriphClkInit->I2SClockSelection));
2062 PeriphClkInit->Fmpi2c1ClockSelection = __HAL_RCC_GET_FMPI2C1_SOURCE();
2065 PeriphClkInit->I2SClockSelection = __HAL_RCC_GET_I2S_SOURCE();
2080 uint32_t frequency = 0U;
2082 uint32_t vcoinput = 0U;
2083 uint32_t srcclk = 0U;
2085 uint32_t vcooutput = 0U;
2091 srcclk = __HAL_RCC_GET_I2S_SOURCE();
2095 case RCC_I2SAPBCLKSOURCE_EXT:
2102 case RCC_I2SAPBCLKSOURCE_PLLR:
2124 case RCC_I2SAPBCLKSOURCE_PLLSRC:
2150 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
2167 uint32_t tickstart = 0U;
2168 uint32_t tmpreg1 = 0U;
2178 (((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == RCC_PERIPHCLK_SAI_PLLI2S) ||
2214 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == (RCC_PERIPHCLK_SAI_PLLI2S))
2262 if((((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == RCC_PERIPHCLK_SAI_PLLSAI) ||
2285 if(((PeriphClkInit->
PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == (RCC_PERIPHCLK_SAI_PLLSAI))
2313 __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->
PLLSAIDivR);
2363 RCC->BDCR = tmpreg1;
2444 uint32_t frequency = 0U;
2446 uint32_t vcoinput = 0U;
2447 uint32_t srcclk = 0U;
2449 uint32_t vcooutput = 0U;
2455 srcclk = __HAL_RCC_GET_I2S_SOURCE();
2501 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) ||\
2502 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
2517 uint32_t tickstart = 0U;
2518 uint32_t tmpreg1 = 0U;
2530 #if defined(STM32F411xE)
2547 #if defined(STM32F411xE)
2606 RCC->BDCR = tmpreg1;
2626 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
2653 #if defined(STM32F411xE)
2660 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
2684 uint32_t frequency = 0U;
2686 uint32_t vcoinput = 0U;
2687 uint32_t srcclk = 0U;
2689 uint32_t vcooutput = 0U;
2695 srcclk = __HAL_RCC_GET_I2S_SOURCE();
2708 #if defined(STM32F411xE)
2755 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
2756 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
2768 void HAL_RCCEx_SelectLSEMode(uint8_t
Mode)
2772 if(
Mode == RCC_LSE_HIGHDRIVE_MODE)
2798 #if defined(RCC_PLLI2S_SUPPORT)
2812 #if defined(RCC_PLLI2SCFGR_PLLI2SM)
2813 assert_param(IS_RCC_PLLI2SM_VALUE(PLLI2SInit->PLLI2SM));
2815 #if defined(RCC_PLLI2SCFGR_PLLI2SP)
2816 assert_param(IS_RCC_PLLI2SP_VALUE(PLLI2SInit->PLLI2SP));
2818 #if defined(RCC_PLLI2SCFGR_PLLI2SQ)
2837 #if defined(STM32F446xx)
2844 #elif defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
2845 defined(STM32F413xx) || defined(STM32F423xx)
2851 #elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
2852 defined(STM32F469xx) || defined(STM32F479xx)
2857 #elif defined(STM32F411xE)
2860 __HAL_RCC_PLLI2S_I2SCLK_CONFIG(PLLI2SInit->PLLI2SM, PLLI2SInit->
PLLI2SN, PLLI2SInit->
PLLI2SR);
2911 #if defined(RCC_PLLSAI_SUPPORT)
2925 #if defined(RCC_PLLSAICFGR_PLLSAIM)
2926 assert_param(IS_RCC_PLLSAIM_VALUE(PLLSAIInit->PLLSAIM));
2928 #if defined(RCC_PLLSAICFGR_PLLSAIP)
2931 #if defined(RCC_PLLSAICFGR_PLLSAIR)
2950 #if defined(STM32F446xx)
2957 #elif defined(STM32F469xx) || defined(STM32F479xx)
2963 PLLSAIInit->
PLLSAIQ, PLLSAIInit->PLLSAIR);
3019 #if defined(STM32F446xx)
3056 uint32_t pllvco = 0U;
3059 uint32_t sysclockfreq = 0U;
3091 sysclockfreq = pllvco/pllp;
3094 case RCC_CFGR_SWS_PLLR:
3111 sysclockfreq = pllvco/pllr;
3120 return sysclockfreq;
3212 #if defined(RCC_PLLI2S_SUPPORT)
3229 #if defined(RCC_PLLSAI_SUPPORT)
3247 #if defined(STM32F412Cx) || defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || \
3248 defined(STM32F423xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
3250 #elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
3257 #if defined(STM32F412Cx) || defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || \
3258 defined(STM32F423xx) || defined(STM32F446xx)
3260 #elif defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
3262 #elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
3264 #elif defined(STM32F411xE)
3269 #if defined(STM32F427xx) || defined(STM32F429xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
3271 #elif defined(STM32F446xx)
3278 #if defined(RCC_CIR_PLLI2SRDYIE)
3282 #if defined(RCC_CIR_PLLSAIRDYIE)
3289 #if defined(RCC_CIR_PLLI2SRDYC)
3293 #if defined(RCC_CIR_PLLSAIRDYC)
3317 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
3318 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
3337 uint32_t tickstart = 0U;
3347 #if defined(STM32F446xx)
3405 #if defined(STM32F446xx)
3523 pwrclkchanged =
SET;
3576 if(pwrclkchanged ==
SET)