Collaboration diagram for DMA Peripheral Access Layer:
Modules | |
| DMA Register Masks | |
Classes | |
| struct | DMA_Type |
Macros | |
| #define | DMA0 ((DMA_Type *)DMA0_BASE) |
| #define | DMA0_BASE (0x400E8000u) |
| #define | DMA_BASE_ADDRS { DMA0_BASE } |
| #define | DMA_BASE_PTRS { DMA0 } |
| #define | DMA_CHN_IRQS { { DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn, DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn, DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn, DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn, DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn, DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn } } |
| #define | DMA_ERROR_IRQS { DMA_ERROR_IRQn } |
Detailed Description
Macro Definition Documentation
◆ DMA0
Peripheral DMA0 base pointer
Definition at line 15036 of file MIMXRT1052.h.
◆ DMA0_BASE
| #define DMA0_BASE (0x400E8000u) |
Peripheral DMA0 base address
Definition at line 15034 of file MIMXRT1052.h.
◆ DMA_BASE_ADDRS
| #define DMA_BASE_ADDRS { DMA0_BASE } |
Array initializer of DMA peripheral base addresses
Definition at line 15038 of file MIMXRT1052.h.
◆ DMA_BASE_PTRS
| #define DMA_BASE_PTRS { DMA0 } |
Array initializer of DMA peripheral base pointers
Definition at line 15040 of file MIMXRT1052.h.
◆ DMA_CHN_IRQS
Interrupt vectors for the DMA peripheral type
Definition at line 15042 of file MIMXRT1052.h.
◆ DMA_ERROR_IRQS
| #define DMA_ERROR_IRQS { DMA_ERROR_IRQn } |
Definition at line 15043 of file MIMXRT1052.h.